TQP3M9019
High Linearity LNA Gain Block
Data Sheet: Rev J 11/01/11 - 1 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
Applications
Repeaters
Mobile Infrastructure
LTE / WCDMA / CDMA / EDGE
General purpose Wireless
16-pin 3x3 QFN package
Product Features Functional Block Diagram
20-4000 MHz
22 dB Gain @ 1900 MHz
1.3 dB Noise Figure @ 1900 MHz
+39.5 dBm Output IP3
50 Ohm Cascadable Gain Block
Unconditionally Stable
High Input Power Capability
+5V Single Supply, 125mA Current
3x3 mm QFN Package
General Description Pin Configuration
The TQP3M9019 is a cascadable, high linearity gain
block amplifier in a low-cost surface-mount package. At
1.9 GHz, the amplifier typically provides 22 dB gain,
+39.5 dBm OIP3, and 1.3 dB Noise Figure while only
drawing 115 mA current. The device is housed in a
leadfree/green/RoHS-compliant industry-standard 16-pin
3x3mm QFN package.
The TQP3M9019 has the benefit of having high gain
across a broad range of frequencies while also providing
very low noise. This allows the device to be used in both
receiver and transmitter chains for high performance
systems. The amplifier is internally matched using a high
performance E-pHEMT process and only requires an
external RF choke and blocking/bypass capacitors for
operation from a single +5V supply. The internal active
bias circuit also enables stable operation over bias and
temperature variations.
The TQP3M9019 covers the 0.02 – 4 GHz frequency band
and is targeted for wireless infrastructure or other
applications requiring high linearity and/or low noise
figure.
Pin # Symbol
2 RF Input
11 RF Output / Vdd
All Other Pins N/C or GND
Backside Paddle GND
Ordering Information
Part No. Description
TQP3M9019 High Linearity LNA Gain Block
TQP3M9019-PCB_IF 50-500 MHz Evaluation Board
TQP3M9019-PCB_RF 0.5-4 GHz Evaluation Board
Standard T/R size = 2500 pieces on a 7” reel.
TQP3M9019
High Linearity LNA Gain Block
Specifications
Absolute Maximum Ratings
Parameter Rating
Storage Temperature -65 to 150 oC
RF Input Power,CW,50 , T=25ºC +23 dBm
Device Voltage,Vdd +7 V
Reverse Device Voltage -0.3 V
Operation of this device outside the parameter ranges given
above may cause permanent damage.
Recommended Operating Conditions
Parameter Min Typ Max Units
Vdd 4.75 5 5.25
V
Tcase -40 +85
oC
Tch (for>106 hours MTTF) 190
oC
Electrical specifications are measured at specified test conditions.
Specifications are not guaranteed over all recommended operating
conditions.
E
lectrical Specifications
Test conditions unless otherwise noted: +25ºC, +5V Vsupply, 50 system.
Parameter Conditions Min Typical Max Units
Operational Frequency Range 20 4000 MHz
Test Frequency 1900 MHz
Gain 20 22 23 dB
Input Return Loss 10 dB
Output Return Loss 13 dB
Output P1dB +22 dBm
Output IP3 See Note 1. +36 +39.5 dBm
Noise Figure 1.3 dB
Vdd +5 V
Current, Idd 125 150 mA
Thermal Resistance (channel to case) jc 34
oC/W
Notes:
1. OIP3 is measured with two tones at an output power of 3 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product is
used to calculate the OIP3 using 2:1 rule. 2:1 rule gives relative value w.r.t. fundamental tone.
Data Sheet: Rev J 11/01/11 - 2 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
TQP3M9019
High Linearity LNA Gain Block
Data Sheet: Rev J 11/01/11 - 3 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
Application Circuit Configuration
Notes:
1. See PC Board Layout, page 8 for more information.
2. Components shown on the silkscreen but not on the schematic are not used.
3. B1 (0 jumper) may be replaced with copper trace in the target application layout.
4. The recommended component values are dependent upon the frequency of operation.
5. All components are of 0603 size unless stated on the schematic.
Bill of Material
Reference Designation TQP3M9019-PCB_RF TQP3M9019-PCB_IF
500 MHz - 4000 MHz 50 MHz - 500 MHz
Q1 TQP3M9019 TQP3M9019
C2, C6 100 pF 1000 pF
C1 0.01 uF 0.01 uF
L2 68 nH 330 nH
L1, D1, C3, C4 Do Not Place Do Not Place
B1 0 0
Notes:
1. Performances can be optimized at frequency of interest by using recommended component values shown in the table below.
Frequency (MHz)
Reference
Designation 50 200 500 2000 2500 3500
C2, C6 0.01 uF 1000 pF 100 pF 22 pF 22 pF 22 pF
L2 470 nH 220 nH 82 nH 22 nH 18 nH 15 nH
TQP3M9019
High Linearity LNA Gain Block
Typical Performance (TQP3M9019-PCB_RF)
Test conditions unless otherwise noted: +25ºC, +5V, 125 mA, 50 system on TriQuint’s TQP3M9019-PCB_RF evaluation board.
Frequency MHz 500 900 1900 2700 3500 4000
Gain dB 25.6 24.6 22 20.5 19 18.3
Input Return Loss dB 11 10.5 10 11.5 8 6
Output Return Loss dB 10.5 12 13 9 10 11
Output P1dB dBm +22.4 +22.3 +22 +21.7 +21.4 +20.8
OIP3 [1] dBm +41.8 +40.6 +40.6 +38.5 +38.8 +37.9
Noise Figure [2] dB 0.9 0.9 1.3 1.7 2.1 2.4
Notes:
1. OIP3 measured with two tones at an output power of +4 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product is
used to calculate the OIP3 using 2:1 rule.
2. Noise figure data shown in the table above is measured on evaluation board which includes board losses of around 0.1dB @ 2 GHz.
RF Performance Plots (TQP3M9019-PCB_RF)
Data Sheet: Rev J 11/01/11 - 4 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
16
20
24
28
0.511.522.533.54
Gain (dB)
Frequency (GHz)
Gain vs. Frequency over Temp
-40 C
-20 C
+25 C
S11 vs. Frequency over Temp
-20
-15
-10
-5
0
0.5 1 1.5 2 2.5 3 3.5 4
S11 (dB)
Frequency (GHz)
+85 C
+85 C
+25 C
-20 C
-40 C
-20
-15
-10
-5
0
0.511.522.533.54
S22 (dB)
Frequency (GHz)
S22 vs. Frequency over Temp
-40 C
-20 C
+25 C
0
1
2
3
4
500 1000 1500 2000 2500 3000 3500 4000
NF (dB)
Frequency (MHz)
Noise Figure vs. Frequency over Temp
+85 C
+25 C
-40 C
+85 C
TQP3M9019
High Linearity LNA Gain Block
RF Performance Plots (TQP3M9019-PCB_RF)
25
30
35
40
45
02468
OIP3 ( dBm)
Pout/t one (d Bm)
OIP3 vs. Pout/tone over Temp
F=1900 MHz, 1 MHz tone spacing
+25 C
-20 C
-40 C
25
30
35
40
45
0.511.522.533.54
OIP3 ( dBm)
Frequency (GHz)
OIP3 vs. Frequency ov er Temp
1 MHz tone spacing, 4 dBm/tone
+25 C
-20 C
-40 C
+85 C
+85 C
25
30
35
40
02468
OIP3 ( dBm)
Pout/t one (d Bm)
1.9 GHz
0.9 GHz
3.5 GHz
45
O IP 3 vs. Pou t / t one ov er F r eq
+25°C, 1 MHz tone spacing
16
18
20
22
0.511.522.533.54
P1dB (dBm)
Frequency (GHz)
-40 C
-20 C
+25 C
24 P1dB vs. Frequency over Temp
Data Sheet: Rev J 11/01/11 - 5 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
2.7 GHz
+85 C
105
110
115
120
125
3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25
Idd (mA)
Vdd (V)
130
Idd vs. Vdd
T=25⁰C, CW Signal
105
110
115
120
125
-40 -15 10 35 60 85
Idd (mA)
Temperature (⁰C)
130
Idd vs. Tempera tur e
CW Signal
TQP3M9019
High Linearity LNA Gain Block
Typical Performance 50-500 MHz (TQP3M9019-PCB_IF)
Test conditions unless otherwise noted: +25ºC, +5V, 125 mA, 50 system on TriQuint’s TQP3M9019-PCB_IF evaluation board.
Frequency
MHz 70 100 200 500
Gain dB 27 26.8 26.4 25.8
Input Return Loss dB 12 13 13 13
Output Return Loss dB 11 11 12 13
Output P1dB dBm +21.6 +21.9 +21.9 +22.2
OIP3 [1] dBm +37.6 +38.8 +39 +41.4
Noise Figure [2] dB 1.4 1.3 0.9 0.9
Notes:
1. OIP3 measured with two tones at an output power of +3 dBm / tone separated by 1 MHz. The suppression on the largest IM3 product is
used to calculate the OIP3 using 2:1 rule.
IF Performance Plots (TQP3M9019-PCB_IF)
Data Sheet: Rev J 11/01/11 - 6 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
16
20
24
28
Gain (dB)
Gain vs. Frequency over Temp
-20
-15
-10
-5
0
S11 (dB)
S11 vs. Fre que ncy ov er Temp
-40 C
-20 ⁰C
+25 C
+85 C
-40 C
-20 ⁰C
+25 C
+85 C
0100 200 300 400 500
Frequency (MHz)
0 100 200 300 400 500
Frequency (MHz)
-20
-15
-10
-5
0
S22 (dB)
S22 vs. Frequency over Temp
0
1
2
3
4
NF (dB)
Noise Figure vs. Frequency over Temp
0100 200 300 400 500
Frequency (MHz)
-40 C
+20 C
+25 C
0100 200 300 400 500
Frequency (MHz)
+85 C
+85 ⁰C+25 C
-40 C
TQP3M9019
High Linearity LNA Gain Block
IF Performance Plots (TQP3M9019-PCB_IF)
Data Sheet: Rev J 11/01/11 - 7 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
25
30
35
40
45
0 100 200 300 400 500
OIP3 (dBm)
Pout / tone (dBm)
OIP3 vs. Frequency over Temp
1 MHz Spacing, 3 dBm/tone
14
16
18
20
22
24
0 100 200 300 400 500
P1dB ( dB)
Frequency (MHz)
P1dB vs. Frequency over Temp
-40 C
+25 C -40 C
+25 C
+85 C+85 C
TQP3M9019
High Linearity LNA Gain Block
Pin Description
Pin Symbol Description
2 RF Input Input, matched to 50 ohms. External DC Block is required.
11 Vdd / RFout Output, matched to 50 ohms, External DC Block is required and supply voltage
All other pins GND These pins are not connected internally but are recommended to be grounded on the PCB
for optimal isolation.
GND Paddle Backside Paddle. Multiple vias should be employed to minimize inductance and thermal
resistance; see page 7 for suggested footprint.
Applications Information
PC Board Layout
Top RF layer is .014” NELCO N4000-13, r = 3.9, 4 total layers (0.062”
thick) for mechanical rigidity. Metal layers are 1-oz copper. 50 ohm
Microstrip line details: width = .029”, spacing = .035”.
The pad pattern shown has been developed and tested for optimized
assembly at TriQuint Semiconductor. The PCB land pattern has been
developed to accommodate lead and package tolerances. Since surface
mount processes vary from company to company, careful process
development is recommended.
For further technical information, Refer to www.TriQuint.com
Data Sheet: Rev J 11/01/11 - 8 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
TQP3M9019
High Linearity LNA Gain Block
Mechanical Information
Package Information and Dimensions
This package is lead-free/RoHS-compliant.
The plating material on the leads is annealed
matte tin. It is compatible with both lead-
free (maximum 260 °C reflow temperature)
and lead (maximum 245 °C reflow
temperature) soldering processes.
The component will be marked with an
“9019” designator with an alphanumeric lot
code on the top surface of package.
TriQuint
9019
YYWW
aXXXX
Mounting Configuration
All dimensions are in millimeters (inches). Angles are in degrees.
Notes:
1. Ground / thermal vias are critical for the proper performance of this device. Vias should use a .35mm (#80 / .0135”) diameter drill and
have a final plated thru diameter of .25 mm (.010”).
2. Add as much copper as possible to inner and outer layers near the part to ensure optimal thermal performance.
Data Sheet: Rev J 11/01/11 - 9 of 10 - Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
TQP3M9019
High Linearity LNA Gain Block
Product Compliance Information
ESD Information
ESD Rating: Class 1A
Value: Passes 250V to < 500 V
Test: Human Body Model (HBM)
Standard: JEDEC Standard JESD22-A114
ESD Rating: Class IV
Value: Passes 1000 V
Test: Charged Device Model (CDM)
Standard: JEDEC Standard JESD22-C101
MSL Rating
Level 1 at +260 °C convection reflow
The part is rated Moisture Sensitivity Level 1 at 260°C per JEDEC
standard IPC/JEDEC J-STD-020.
Solderability
Compatible with the latest version of J-STD-020, Lead
free solder, 260°
This part is compliant with EU 2002/95/EC RoHS
directive (Restrictions on the Use of Certain Hazardous
Substances in Electrical and Electronic Equipment).
This product also has the following attributes:
Lead Free
Halogen Free (Chlorine, Bromine)
Antimony Free
TBBP-A (C15H12Br402) Free
PFOS Free
SVHC Free
Contact Information
For the latest specifications, additional product information, worldwide sales and distribution locations, and information about
TriQuint:
Web: www.triquint.com Tel: +1.503.615.9000
Email: info-sales@tqs.com Fax: +1.503.615.8902
For technical questions and application information:
Email: sjcapplications.engineering@tqs.com
Important Notice
The information contained herein is believed to be reliable. TriQuint makes no warranties regarding the information contained
herein. TriQuint assumes no responsibility or liability whatsoever for any of the information contained herein. TriQuint
assumes no responsibility or liability whatsoever for the use of the information contained herein. The information contained
herein is provided "AS IS, WHERE IS" and with all faults, and the entire risk associated with such information is entirely with
the user. All information contained herein is subject to change without notice. Customers should obtain and verify the latest
relevant information before placing orders for TriQuint products. The information contained herein or any use of such
information does not grant, explicitly or implicitly, to any party any patent rights, licenses, or any other intellectual property
rights, whether with regard to such information itself or anything described by such information. TriQuint products are not
warranted or authorized for use as critical components in medical, life-saving, or life-sustaining applications, or other
applications where a failure would reasonably be expected to cause severe personal injury or death.
Data Sheet: Rev J 11/01/11 - 10 of 10 Disclaimer: Subject to change without notice
© 2010 TriQuint Semiconductor, Inc. Connecting the Digital World to the Global Network®
