September 2001
2001 Fairchild Semiconductor Corporation FDC638P Rev F1 (W)
FDC638P
P-Channel 2.5V PowerTrench Specified MOSFET
General Description
This P-Channel 2.5V specified MOSFET is produced
using Fairchild Semiconductor’s advanced
PowerTrench process that has been especially tailored
to minimize the on-state resistance and yet maintain
low gate charge for superior switching performance
These devices are well suited for battery power
applications: load switching and power management,
battery charging circuits, and DC/DC conversion.
Features
4.5 A, 20 V. RDS(ON) = 48 m @ VGS = 4.5 V
RDS(ON) = 65 m @ VGS = 2.5 V
Low gate charge (10 nC typical)
High performance trench technology for extremely
low RDS(ON)
SuperSOT ™ 6 package: small footprint (72%
smaller than standard SO-8; low profile (1mm thick)
D
D
D
S
D
G
SuperSOT -6
TM
pin 1 3
5
6
4
1
2
3
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol Parameter Ratings Units
VDSS Drain-Source Voltage 20 V
VGSS Gate-Source Voltage ±8 V
ID Drain Current Continuous (Note 1a) 4.5 A
Pulsed –20
Power Dissipation for Single Operation (Note 1a) 1.6 PD (Note 1b) 0.8 W
TJ, TSTG Operating and Storage Junction Temperature Range 55 to +150 °C
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient (Note 1a) 78 °C/W
RθJC Thermal Resistance, Junction-to-Case (Note 1) 30 °C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
.638 FDC638P 7’’ 8mm 3000 units
FDC638P
FDC638P Rev F (W)
Electrical Characteristics TA = 25°C unless otherwise noted
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS DrainSource Breakdown Voltage VGS = 0 V, ID = 250 µA –20 V
BVDSS
TJ Breakdown Voltage Temperature
Coefficient ID = 250 µA,Referenced to 25°C –14 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 16 V, VGS = 0 V –1 µA
IGSSF GateBody Leakage, Forward VGS = 8 V, VDS = 0 V 100 nA
IGSSR GateBody Leakage, Reverse VGS = 8 V, VDS = 0 V –100 nA
On Characteristics (Note 2)
VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 0.4 0.8 1.5 V
VGS(th)
TJ Gate Threshold Voltage
Temperature Coefficient ID = 250 µA,Referenced to 25°C
3 mV/°C
RDS(on) Static DrainSource
OnResistance VGS = 4.5 V, ID = 4.5 A
VGS = 2.5 V, ID = 3.8 A
VGS = 4.5 V, ID = 4.5 TJ=125°C
39
52
54
48
65
72
m
ID(on) OnState Drain Current VGS = 4.5 V, VDS = 5 V –20 A
gFS Forward Transconductance VDS = 10 V, ID = 4.5 A 15 S
Dynamic Characteristics
Ciss Input Capacitance 1160 pF
Coss Output Capacitance 195 pF
Crss Reverse Transfer Capacitance
VDS = 10 V, V GS = 0 V,
f = 1.0 MHz 105 pF
Switching Characteristics (Note 2)
td(on) TurnOn Delay Time 12 22 ns
tr TurnOn Rise Time 9 18 ns
td(off) TurnOff Delay Time 33 53 ns
tf TurnOff Fall Time
VDD = 5 V, ID = 1 A,
VGS = 4.5 V, RGEN = 6
12 22 ns
Qg Total Gate Charge 10 14 nC
Qgs GateSource Charge 2.2 nC
Qgd GateDrain Charge
VDS = –10 V, ID = 4.5 A,
VGS = 4.5 V
1.5 nC
DrainSource Diode Characteristics and Maximum Ratings
IS Maximum Continuous DrainSource Diode Forward Current 1.3 A
VSD DrainSource Diode Forward
Voltage VGS = 0 V, IS = 1.3 A (Note 2) 0.73 1.2 V
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design.
a) 78°C/W when
mounted on a 1in2 pad
of 2 oz copper
b) 156°C/W when mounted
on a minimum pad of 2 oz
copper
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDC638P
FDC638P Rev F (W)
Typical Characteristics
0
5
10
15
20
01234
-VDS , DRAIN TO SOURCE VOLTAGE (V)
-ID
, DRAIN CURRENT (A)
VGS = -4.5V -2.5V
-2.0V
-3.0V
0.8
1
1.2
1.4
1.6
0 5 10 15 20
-ID, DRAIN CURRENT (A)
RDS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
VGS = -2.5V
-4.5V
-3.0V -3.5V -4.0V
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.6
0.8
1
1.2
1.4
1.6
-50 -25 0 25 50 75 100 125 150
TJ
, JUNCTION TEMPERATURE (oC)
RDS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
ID = -4.5A
VGS = -4.5V
0
0.03
0.06
0.09
0.12
0.15
12345
-VGS, GATE TO SOURCE VOLTAGE (V)
RDS(ON)
, ON-RESISTANCE (OHM)
ID = -2.2A
TA = 125oC
TA = 25oC
Figure 3. On-Resistance Variation with
Temperature. Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
0
3
6
9
12
15
0.5 11.5 22.5
-VGS, GATE TO SOURCE VOLTAGE (V)
-ID
, DRAIN CURRENT (A)
TA = -55oC25oC
125oC
VDS = -5V
0.0001
0.001
0.01
0.1
1
10
100
00.2 0.4 0.6 0.8 11.2
-VSD , BODY DIODE FORWARD VOLTAGE (V)
-IS, REVERSE DRAIN CURRENT (A)
VGS = 0V
TA = 125oC
25oC
-55oC
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDC638P
FDC638P Rev F (W)
Typical Characteristics
0
1
2
3
4
5
0 3 6 9 12
Qg, GATE CHARGE (nC)
-VGS
, GATE-SOURCE VOLTAGE (V)
ID = -4.5A VDS = -5V -10V
-15V
0
300
600
900
1200
1500
0 5 10 15 20
-VDS, DRAIN TO SOURCE VOLTAGE (V)
CAPACITANCE (pF)
CISS
COSS
CRSS
f = 1 MHz
VGS = 0 V
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
0.01
0.1
1
10
100
0.1 1 10 100
-VDS , DRAIN-SOURCE VOLTAGE (V)
-ID
, DRAIN CURRENT (A)
DC 10s
1s
100ms
RDS(ON) LIMIT
VGS = -4.5V
SINGLE PULSE
RθJA = 156oC/W
TA = 25oC
10ms
1ms
0
10
20
30
40
50
0.001 0.01 0.1 1 10 100
t1
, TIME (sec)
P(pk), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 156°C/W
TA = 25°C
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
0.001
0.01
0.1
1
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
RθJA(t) = r(t) + RθJA
RθJA = 156 oC/W
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
P(pk)
t1t2
SINGLE PULSE
0.01
0.02
0.05
0.1
0.2
D = 0.5
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b
Transient thermal response will change depending on the circuit board design.
FDC638P
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER
NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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not intended to be an exhaustive list of all such trademarks.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body, or (b) support or sustain life, or (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in significant injury to the
user.
2. A critical component is any component of a life
support device or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Obsolete
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Formative or
In Design
First Production
Full Production
Not In Production
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