Publication# 17344 Rev. AAmendment/0
Issue Date: July 1993 4-95
Am27X400
4 Megabit (524,288 x 8-Bit/262,144 x 16-Bit)
CMOS ExpressROM Device
Advanced
Micro
Devices
FINAL
■As an OTP EPROM alternative:
— Factory optimized programming
— Fully tested and guaranteed
■As a Mask ROM alternative:
— Shorter leadtime
— Lower volume per code
■Fast access time
— 120 ns
■Single +5 V power supply
■Compatible with JEDEC-approved EPROM
pinout
■±10% power supply tolerance
■High noise immunity
■Low power dissipation
— 100 µA maximum CMOS standby current
■Available in Plastic Dual In-Line Package (PDIP)
and Plastic Leaded Chip Carrier (PLCC)
■Latch-up protected to 100 mA from –1 V to
VCC +1 V
■Versatile features for simple interfacing
—Both CMOS and TTL input/output compatibility
— Two line control functions
GENERAL DESCRIPTION
The Am27X400 is a factory programmed and tested
OTP EPROM. It is programmed after packaging prior
to final test. Every device is rigorously tested under
AC and DC operating conditions to your stable code. It
is organized as 524,288 by 8 bits/262,144 by 16 bits
and is available in plastic dual in-line (PDIP) as well as
plastic leaded chip carrier (PLCC) packages.
ExpressROM devices provide a board-ready memory
solution for medium to high volume codes with short
leadtimes. This offers manufacturers a cost-effective
and flexible alternative to OTP EPROMs and mask
programmed ROMs.
Access times as fast as 120 ns allow operation with
high-performance microprocessors with reduced WAIT
states. The Am27X400 offers separate Output Enable
(OE) and Chip Enable (CE) controls, thus eliminating
bus contention in a multiple bus microprocessor system.
AMD’s CMOS process technology provides high speed,
low power, and high noise immunity. Typical power con-
sumption is only 150 mW in active mode, and 100 µW in
standby mode.
BLOCK DIAGRAM
Output
Buffers
Y
Gating
Output Enable
Chip Enable
Y
Decoder
X
Decoder
Data Outputs
DQ0–DQ15
VCC
OE
4,194,304-Bit
Cell Matrix
A0–A17
Address
Inputs,
AB
17344A-1
CE
VSS
BYTE
AMD
4-96 Am27X400
PRODUCT SELECTOR GUIDE
Family Part No Am27X400
Ordering Part No:
VCC ±5% -125 -255
VCC ±10% -120 -150 -200
Max Access Time (ns) 120 150 200 250
CE (E) Access (ns) 120 150 200 250
OE (G) Access (ns) 50 65 75 100
CONNECTION DIAGRAMS
Top View PLCC
Note:
1. JEDEC nomenclature is in parentheses.
17344A-2
A10
PDIP
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE(E)
VSS
OE(G)
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
A9
A8
A11
A12
A14
A15
A16
BYTE/VPP
VSS
DQ15/AB
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21 17344A-3
A13
144 43 42
5432
641
40
7
8
9
10
11
12
13
14
15
16
17 23 24 25 26
19 20 21 22
18 27 28
39
38
37
36
35
34
33
32
31
30
29
A4
A3
A2
A1
A0
CE (E)
VSS
OE
DQ0
DQ8
DQ1
A12
A13
A14
A15
A16
BYTE/VPP
VSS
DQ15/AB
DQ7
DQ14
DQ6
A18
NC
NC
A8
A9
A10
A11
DQ9
DQ2
DQ10
DQ3
DQ11
NC
VCC
DQ4
DQ12
DQ5
DQ13
A17
A7
A6
A5
PIN DESIGNATIONS
AB = Address Input (BYTE Mode)
A0–A17 = Address Inputs
BYTE = Byte/Word Switch
CE (E) = Chip Enable Input
DQ0–DQ15 = Data Inputs/Outputs
DU = No External Connection (Do Not Use)
NC = No Internal Connection
OE (G) = Output Enable Input
VCC =V
CC Supply Voltage
VPP = Program Supply Voltage
VSS = Ground
LOGIC SYMBOL
CE (E)
OE (G)
DQ0–DQ15
A0–A17
18
16
17344A-4
BYTE
AB
AMD
4-97Am27X400
ORDERING INFORMATION
Standard Products
AMD standard products are available in several packages and operating ranges. The ordering number (Valid Combination) is
formed by a combination of:
AM27X400 J
e. CODE DESIGNATION
d. TEMPERATURE RANGE
C = Commercial (0°C to +70°C)
I = Industrial (–40°C to +85°C)
c. PACKAGE TYPE
P = 40-Pin Plastic Dual In-Line Package (PD 040)
J = 44-Pin Rectangular Plastic Leaded
Chip Carrier (PL 044)
b. SPEED OPTION
See Product Selector Guide and
Valid Combinations
a. DEVICE NUMBER/DESCRIPTION
Am27X400
4 Megabit (524,288 x 8-Bit/262,144 x 16-Bit)
CMOS ExpressROM Device
Valid Combinations
Valid Combinations list configurations planned to
be supported in volume for this device. Consult
the local AMD sales office to confirm availability of
specific valid combinations and to check on newly
released combinations.
Valid Combinations
C
Assigned by AMD
-120 XXXXX
AM27X400-120
AM27X400-125
AM27X400-150
AM27X400-200
AM27X400-255
PC, JC, PI, JI
AMD
4-98 Am27X400
FUNCTIONAL DESCRIPTION
Read Mode
The Am27X400 has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip Enable (CE) is the power control and
should be used for device selection. Output Enable (OE)
is the output control and should be used to gate data to
the output pins, independent of device selection.
Assuming that addresses are stable, address access
time (tACC) is equal to the delay from CE to output (tCE).
Data is available at the outputs tOE after the falling edge
of OE, assuming that CE has been LOW and addresses
have been stable for at least tACC–tOE.
Byte Mode
The user has the option of reading data in either 16-bit
words or 8-bit bytes under control of the BYTE input.
With the BYTE input HIGH, inputs A0–A17 will address
256K words of 16-bit data. When the BYTE input is
LOW, AB functions as the least significant address input
and 512K bytes of data can be accessed. The 8 bits of
data will appear on DQ0–DQ7.
Standby Mode
The Am27X400 has a CMOS standby mode which re-
duces the maximum VCC current to 100 µA. It is placed in
CMOS-standby when CE is at VCC ± 0.3 V. The
Am27X400 also has a TTL-standby mode which re-
duces the maximum VCC current to 1.0 mA. It is placed in
TTL-standby when CE is at VIH. When in standby mode,
the outputs are in a high-impedance state, independent
of the OE input.
Output OR-Tieing
To accommodate multiple memory connections, a two-
line control function is provided to allow for:
■Low memory power dissipation
■Assurance that output bus contention will not occur
It is recommended that CE be decoded and used as the
primary device-selecting function, while OE be made a
common connection to all devices in the array and con-
nected to the READ line from the system control bus.
This assures that all deselected memory devices are in
their low-power standby mode and that the output pins
are only active when data is desired from a particular
memory device.
System Applications
During the switch between active and standby
conditions, transient current peaks are produced on
the rising and falling edges of Chip Enable. The
magnitude of these transient current peaks is
dependent on the output capacitance loading of the
device. At a minimum, a 0.1 µF ceramic capacitor (high
frequency, low inherent inductance) should be used on
each device between VCC and VSS to minimize transient
effects. In addition, to overcome the voltage drop
caused by the inductive effects of the printed circuit
board traces on ExpressROM device arrays, a 4.7 µF
bulk electrolytic capacitor should be used between VCC
and VSS for each eight devices. The location of the
capacitor should be close to where the power supply is
connected to the array.
MODE SELECT TABLE
CE OE VPP Outputs
Read VIL VIL X DOUT
Output Disable VIL VIH X Hi-Z
Standby (TTL) VIH X X Hi-Z
Standby (CMOS) VCC ± 0.3 V X X Hi-Z
Mode Pins
Note:
1. X = Either VIH or VIL
AMD
4-99Am27X400
ABSOLUTE MAXIMUM RATINGS
Storage Temperature
OTP Products –65°C to +125°C. . . . . . . . . . . . . . .
All Other Products –65°C to +150°C. . . . . . . . . . . .
Ambient Temperature
with Power Applied –55°C to +125°C. . . . . . . . . . . . .
Voltage with Respect to VSS
All pins except VCC –0.6 V to VCC + 0.6 V. . . . . . .
VCC –0.6 V to +7.0 V. . . . . . . . . . . . . . . . . . . . . . .
Note:
1. Minimum DC voltage on input or I/O pins is –0.5 V. During
transitions, the inputs may overshoot V
SS
to –2.0 V for pe-
riods of up to 20 ns. Maximum DC voltage on input and
I/O pins is V
CC
+ 0.5 V which may overshoot to V
CC
+
2.0 V for periods up to 20ns.
Stresses above those listed under “Absolute Maximum Rat-
ings” may cause permanent damage to the device. This is a
stress rating only; functional operation of the device at these
or any other conditions above those indicated in the opera-
tional sections of this specification is not implied. Exposure of
the device to absolute maximum rating conditions for ex-
tended periods may affect device reliability.
OPERATING RANGES
Commercial (C) Devices
Ambient Temperature (TA)0°C to +70°C. . . . . . .
Industrial (I) Devices
Ambient Temperature (TA) –40°C to +85°C. . . . .
Supply Read Voltages
VCC for Am27X400-XX5 +4.75 V to +5.25 V. . . . .
VCC for Am27X400-XX0 +4.50 V to +5.50 V. . . . .
Operating ranges define those limits between which the
functionality of the device is guaranteed.
AMD
4-100 Am27X400
DC CHARACTERISTICS over operating range unless otherwise specified
(Notes 1, 2 and 4)
Parameter Parameter
Symbol Description Test Conditions Min Max Unit
VOH Output HIGH Voltage IOH = –400 µA 2.4 V
VOL Output LOW Voltage IOL = 2.1 mA 0.45 V
VIH Input HIGH Voltage 2.0 VCC + 0.5 V
VIL Input LOW Voltage –0.5 +0.8 V
ILI Input Load Current VIN = 0 V to +VCC 1.0 µA
ILO Output Leakage Current VOUT = 0 V to +VCC 5.0 µA
ICC1 VCC Active Current CE = VIL, f = 5 MHz, 50 mA
(Note 3) IOUT = 0 mA
ICC2 VCC TTL Standby Current CE = VIH 1.0 mA
ICC3 VCC CMOS Standby Current CE = VCC ± 0.3 V 100 µA
Notes:
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. Caution: The Am27X400 must not be removed from (or inserted into) a socket when V
CC
or V
PP
is applied.
3. I
CC1
is tested with
OE
= V
IH
to simulate open outputs.
4. Minimum DC Input Voltage is –0.5 V during transactions, the inputs may overshoot to –2.0 V for periods less than 20 ns. Maxi-
mum DC Voltage on output pins is V
CC
+0.5 V, which may overshoot to V
CC
+2.0 V for periods less than 20 ns.
–75 –50 –25 0 25 50 75 100 125 150
30
28
26
24
22
Frequency in MHz
17344A-6
12345678910
35
30
25
20
15
Supply Current
in mA
Supply Current
in mA
Temperature in °C
Figure 1. Typical Supply Current
vs. Frequency
VCC = 5.5 V, T = 25°C
Figure 2. Typical Supply Current
vs. Temperature
VCC = 5.5 V, f = 5 MHz
17344A-5
AMD
4-101Am27X400
CAPACITANCE
Parameter
Symbol Parameter Description Test Conditions Typ Max Typ Max Unit
CIN Input Capacitance VIN = 0 V 6 8 9 11 pF
COUT Output Capacitance VOUT = 0 V 9 11 13 15 pF
PD 040 PL 044
Notes:
1. This parameter is only sampled and not 100% tested.
2. T
A
= +25
°
C, f = 1 MHz.
SWITCHING CHARACTERISTICS over operating range unless otherwise specified
(Notes 1, 3 and 4)
Parameter Test -125
JEDEC Standard Description Conditions -120 -150 -200 -255 Unit
tAVQV tRCC Address to CE = OE = Min – – – –
Output Delay VIL Max 120 150 200 250 ns
tELQV tCE Chip Enable to OE = VIL Min – – – –
Output Delay Max 120 150 200 250 ns
tGLQV tOE Output Enable to CE = VIL Min – – – –
Output Delay Max 50 55 60 75 ns
tEHQZ tDF Min 0 0 0 0
tGHQZ (Note 2) Max 30 30 40 60 ns
tAXQX tOH Output Hold from Min 0 0 0 0
Addresses,CE,orOE, Max – – – – ns
whicheveroccurredfirst
Parameter
Symbols Am27X400
Notes:
1. V
CC
must be applied simultaneously or before V
PP
, and removed simultaneously or after V
PP
.
2. This parameter is only sampled and not 100% tested.
3. Caution: The Am27X400 must not be removed from (or inserted into) a socket or board when V
PP
or V
CC
is applied.
4. Output Load: 1 TTL gate and C
L
= 100 pF
Input Rise and Fall Times: 20 ns
Input Pulse Levels: 0.45 V to 2.4 V
Timing Measurement Reference Level: 0.8 V and 2 V for inputs and outputs
Chip Enable HIGH or
Output Enable HIGH,
whichever comes
first, to Output Float
AMD
4-102 Am27X400
SWITCHING TEST CIRCUIT
Device
Under
Test
Diodes = IN3064
or Equivalent
CL
CL = 100 pF including jig capacitance
6.2 kΩ
2.7 kΩ
17344A-7
+5.0 V
SWITCHING TEST WAVEFORM
AC Testing: Inputs are driven at 2.4 V for a Logic “1” and 0.45 V for a Logic “0”. Input pulse rise and fall times are ≤ 20 ns.
2.4 V
0.45 V
2.0 V
0.8 V
Test Points
2.0 V
0.8 V
Input Output
17344A-8
AMD
4-103Am27X400
KEY TO SWITCHING WAVEFORMS
KS000010
Must be
Steady
May
Change
from H to L
May
Change
from L to H
Does Not
Apply
Don’t Care,
Any Change
Permitted
Will be
Steady
Will be
Changing
from H to L
Will be
Changing
from L to H
Changing,
State
Unknown
Center
Line is High-
Impedance
“Off” State
WAVEFORM INPUTS OUTPUTS
SWITCHING WAVEFORMS
Addresses
CE
OE
Output
17344A-9
Addresses Valid
High Z High Z
tCE
Valid Output
2.4
0.45
2.0
0.8 2.0
0.8
tACC
(Note 1)
tOE tDF
(Note 2)
tOH
Notes:
1.
OE
may be delayed up to t
ACC
–t
OE
after the falling edge of the addresses without impact on t
ACC.
2. t
DF
is specified from
OE
or
CE
, whichever occurs first.
