EV-ADF4372SD2Z User Guide UG-1548 One Technology Way * P.O. Box 9106 * Norwood, MA 02062-9106, U.S.A. * Tel: 781.329.4700 * Fax: 781.461.3113 * www.analog.com Evaluating the ADF4372 Microwave Wideband Synthesizer with Integrated VCO FEATURES REQUIRED SOFTWARE Self contained board, including ADF4372 frequency synthesizer with integrated VCO, loop filter (180 kHz), USB interface, and voltage regulators Windows-based software allows control of synthesizer functions from a PC Externally powered by 6 V ACE software, Version 1.10 or newer ADF4372 plugin, latest version GENERAL DESCRIPTION The EV-ADF4372SD2Z evaluates the performance of the ADF4372 frequency synthesizer with an integrated voltage controlled oscillator (VCO) for phase-locked loops (PLLs). A photograph of the evaluation board is shown in Figure 1. The evaluation board contains the ADF4372 frequency synthesizer with an integrated VCO, a USB interface, power supply connectors, and subminiature Version A (SMA) connectors. EVALUATION KIT CONTENTS EV-ADF4372SD2Z evaluation board EQUIPMENT NEEDED Windows(R)-based PC with USB port for evaluation software System demonstration platform, serial only (SDP-S) EVAL-SDP-CS1Z controller board Power supply (6 V) Spectrum analyzer 50 terminators Low noise REFIN source (optional) The EV-ADF4372SD2Z requires an SDP-S board (not supplied with the kit). The SDP-S allows software programming of the EV-ADF4372SD2Z. Full specifications for the ADF4372 frequency synthesizer are available in the product data sheet, which must be consulted in conjunction with this user guide when working with the evaluation board. DOCUMENTS NEEDED ADF4372 data sheet EV-ADF4372SD2Z user guide 20393-001 EV-AD4372SD2Z EVALUATION BOARD PHOTOGRAPH Figure 1. PLEASE SEE THE LAST PAGE FOR AN IMPORTANT WARNING AND LEGAL TERMS AND CONDITIONS. Rev. 0 | Page 1 of 21 UG-1548 EV-ADF4372SD2Z User Guide TABLE OF CONTENTS Features .............................................................................................. 1 RF Output .......................................................................................4 Evaluation Kit Contents ................................................................... 1 Loop Filter ......................................................................................4 Equipment Needed ........................................................................... 1 Additional Optimization on Loop Filter ....................................4 Documents Needed .......................................................................... 1 Reference Source ...........................................................................4 Required Software ............................................................................ 1 Default Configuration ..................................................................4 General Description ......................................................................... 1 Doubler Output .............................................................................4 EV-AD4372SD2Z Evaluation Board Photograph ........................ 1 Evaluation Board Software ...............................................................6 Revision History ............................................................................... 2 Main Controls ................................................................................7 Getting Started .................................................................................. 3 Output Controls ............................................................................7 Software Installation Procedures ................................................ 3 Evaluation and Test ...........................................................................9 Evaluation Board Setup Procedures........................................... 3 Evaluation Board Schematics and Artwork ................................ 10 Evaluation Board Hardware ............................................................ 4 Ordering Information .................................................................... 20 Power Supplies .............................................................................. 4 Bill of Materials ........................................................................... 20 REVISION HISTORY 4/2019--Revision 0: Initial Version Rev. 0 | Page 2 of 21 EV-ADF4372SD2Z User Guide UG-1548 GETTING STARTED SOFTWARE INSTALLATION PROCEDURES EVALUATION BOARD SETUP PROCEDURES To install the ACE software and ADF4372 plugin, perform the following steps: To run the software, perform the following steps: 1. 2. 3. 4. Install the latest version of the ACE software platform. If the ADF4372 plugin appears automatically, proceed to Step 4. Double click the ADF4372 plugin file, Board.ADF4372.1.2019.12300.acezip or the latest version. Check that the ADF4372 plugin appears when the EV-ADF4372SD2Z board is attached through the system demonstration platform (SDP-S) connector to the PC. 1. 2. 3. Rev. 0 | Page 3 of 21 Select Start > All Programs > Analog Devices > ACE. On the Start tab, choose ADF4372 and the ADF4372 board appears under Attached Hardware. When connecting the EV-ADF4372SD2Z board, allow 5 sec to 10 sec for the label on the status bar to change. UG-1548 EV-ADF4372SD2Z User Guide EVALUATION BOARD HARDWARE In general, narrower loop filter bandwidths have lower spurious signals. Wide loop filters in Integer N mode can achieve <50 fs jitter with very clean reference frequency input (REFIN) signals. The EV-ADF4372SD2Z requires the SDP-S platform that uses the EVAL-SDP-CS1Z. The SDP-B is not recommended. The EV-ADF4372SD2Z schematics are shown in Figure 9, Figure 10, Figure 11, and Figure 12. The silkscreens for the evaluation board are shown in Figure 13 and Figure 14. ADDITIONAL OPTIMIZATION ON LOOP FILTER POWER SUPPLIES The EV-ADF4372SD2Z board is powered by a 6 V power supply connected to the VSUPPLY SMA, or the red banana plug, P2. Connect GND to the black banana plug, P4. The power supply circuitry has two LT3045, high performance, low noise, and low dropout (LDO) regulators. One LT3045 is used to generate 5 V to drive the VCO supply pins. The remaining supplies are powered from the other LT3045, which is set to 3.3 V voltage. Use Switch S1 to switch the 6 V to the EV-ADF4372SD2Z on and off. RF OUTPUT The EV-ADF4372SD2Z has three pairs of SMA, 3.5 mm output connectors: RF8P/RF8N, RFAUX8P/RFAUX8N, and RF16P/RF16N (differential outputs). Because these ports are sensitive to impedance mismatch, connect the radio frequency (RF) outputs to equal load impedances. The PLL loop bandwidth can be optimized for different parameters like reference spurs or VCO noise, depending on the system requirements. Reducing - Modulator (SDM) Noise In fractional mode, SDM noise becomes apparent and starts to contribute to overall phase noise. This noise can be reduced to insignificant levels by using a series resistor between the CPOUT pin and the loop filter. Place this resistor close to the CPOUT pin. Select a reasonable resistor value that does not affect the loop bandwidth and phase margin of the designed loop filter. In most cases, a 91 resistor value produces the best results. This resistor is not required in Integer N mode (SDM not enabled) or when a narrow-band loop filter (SDM noise attenuated) is used. This resistor is labeled as RCPOUT in schematics. Optimizing Spurious Signals If only one port of a differential pair is used, terminate the complementary port with an equal load terminator (in general, a 50 terminator). The loop filter is placed at the secondary side of the EVADF4372SD2Z to create a more compact layout and so that the board is more tolerant to external signals. Using a capacitor on the same side with the ADF4372 (the primary side) results in higher isolation on internally generated spurious signals. For this purpose, a small valued capacitor (C26 = 10 pF) is placed close to the VTUNE pin on the primary side. LOOP FILTER REFERENCE SOURCE The loop filter schematic is included in the board schematic in Figure 9. Figure 2 shows the loop filter component placement. The loop filter on the evaluation board is optimized for fractional mode performance with a phase frequency detector (PFD) frequency of 100 MHz and 1.8 mA charge pump current. The values of the loop filter components are as follows: The EV-ADF4372SD2Z board is supplied with a low noise 100 MHz crystal oscillator (XO) from Crystek (CCHD-575-50100.000). * Resistors: RCPOUT = 91 , R2 = 400 , R4 = 200 , R15 = 0 Capacitors: C20 = 220 pF, C19 = 0.018 F, C23 = 330 pF C22 C12 C1 C3 C8 C9 All components necessary for local oscillator (LO) generation are inserted on the EV-ADF4372SD2Z board. The EV-ADF4372SD2Z board is shipped with a 100 MHz XO, the ADF4372 synthesizer with an integrated VCO, and a 180 kHz loop filter (charge pump current (ICP) = 1.8 mA). C20 R15 RCPOUT C1T DEFAULT CONFIGURATION R2 R4 C19 C23 RVTUNE 20393-002 * To use an external single-ended REFIN, connect a low noise reference source to the REFP SMA connector. Remove Resistor R19 (0 ) and Resistor R20 (0 ) to remove power from the crystal and break the connection to the REFP input. DOUBLER OUTPUT Figure 2. Loop Filter Component Placement The lowest rms jitter is achieved in integer mode by using a high PFD frequency. This jitter can be tested by using the same filter with a PFD frequency of 200 MHz (enabling the doubler) and 2.4 mA charge pump current. Additional optimization is still possible depending on target frequency and integration limits. The ADF4372 contains a frequency doubler to double the 4 GHz to 8 GHz VCO signal on RF16P and RF16N. Rev. 0 | Page 4 of 21 EV-ADF4372SD2Z User Guide UG-1548 SDP-S BOARD PC SPECTRUM ANALYZER VSUPPLY POWER SUPPLY SIGNAL GENERATOR EXTERNAL POWER SWITCH +6V GND REFERENCE (OPTIONAL) REFP LOOP FILTER RF16N (UNDERNEATH BOARD) XO ADF4372 RF16P 50 TERMINATION RFAUX8N RF8P RFAUX8P 20393-003 RF8N Figure 3. Evaluation Board Setup Diagram Rev. 0 | Page 5 of 21 UG-1548 EV-ADF4372SD2Z User Guide EVALUATION BOARD SOFTWARE The ACE software is the main platform that is used to control the EV-ADF4372SD2Z. The ADF4372 plugin includes user interfaces that relate to the ADF4372 and allow evaluation of the device. Use the following steps to open the main control window for ADF4372: 3. Launch the ACE application. With the SDP-S board connected to the EV-ADF4372SD2Z, the attached hardware 20393-004 1. 2. appears in the graphical user interface (GUI) as shown in Figure 4. Double click the ADF4372 Board icon, and the tab shown in Figure 5 appears. Double click the ADF4372 icon that appears on the ADF4372 Board tab to open the main control window shown in Figure 7. Figure 4. ACE Start Page, Attached Hardware (ADF4372 Evaluation Board) Rev. 0 | Page 6 of 21 EV-ADF4372SD2Z User Guide UG-1548 Figure 5. ACE Board Page, Device Selection MAIN CONTROLS The main controls are available in the high level register map shown in Figure 7. To modify registers, perform the following steps: 1. 2. 3. Click Write All Registers / Initialize to load all registers and initialize the device. Modify the registers as desired. Click Apply Changes to load the modified settings to the device. This action loads the updated registers only. All registers can be reloaded using the Write All Registers / Initialize button. OUTPUT CONTROLS For the main, auxiliary, and doubler outputs, the optimal harmonic performance is achieved by using the automatic filter outputs. If desired, disable the automatic filter and change the filter settings manually. The settings are available in the RF16 section (shown in Figure 6). The output settings include the Filter Mode box that can be set to automatic or manual, the x2 Bias box that varies from the lowest setting 0 to the highest of 3, and the x2 Filter box that varies from 0 to 7. The bias and filter settings in Table 1 are recommended for doubler output. Table 1. Bias and Filter Settings for Doubler Output Frequency (GHz) 8.4 >8.4 to 9.4 >9.4 to 10 >10 to 11.5 >11.5 to 12.2 >12.2 to 13.7 >13.7 to 14.5 >14.5 Bias 3 3 3 3 3 3 3 3 Filter 7 6 5 4 3 2 1 0 The recommended settings for doubler frequencies greater than 14.5 GHz are shown in Figure 6. Rev. 0 | Page 7 of 21 UG-1548 EV-ADF4372SD2Z User Guide Figure 6. Recommended Doubler Filter Settings, 16 GHz to 18 GHz Figure 7. Software Front Panel Display, Main Controls Rev. 0 | Page 8 of 21 EV-ADF4372SD2Z User Guide UG-1548 EVALUATION AND TEST To evaluate and test the performance of the ADF4372, prepare the hardware and software setup as explained in the Evaluation Board Hardware section and the Evaluation Board Software section. Run the software and set the VCO Fundamental Output box to 5 GHz (see Figure 7). Measure the output spectrum and single sideband phase noise on a spectrum analyzer. Figure 8 shows a phase noise plot of the SMA RF8P pin equal to 5 GHz. Figure 8. Single Sideband Phase Noise Rev. 0 | Page 9 of 21 SHIELD VTUNE AND CPOUT POSSIBLE TO VTUNE PIN. 330pF C23 DNI GND 200 R4 GND 0 TBD0603 R15 GND 91 C22 C3 RCPOUT PLACE C23 AND R4 AS CLOSE AS VTUNE CPOUT IN AS POSSIBLE TO RCPOUT PIN. PLACE RCPOUT RESISTOR AS CLOSE VCO_LDO IN VCC_VCO IN VTUNE IN VCC_X4 IN R2 C19 IN C26 GND 10pF GND C20 VCC_VCAL 400 0.018UF 1UF VDD_X4 VCC_X1 IN GND LOOP FILTER VALUES TBD SHIELD SIGNALS WITH VIAS PLACE ON BOTTOM SIDE OF PCB LOOP FILTER IN C3 VCCVCO, C17 VCC REF, WERE SEEN TO BE THE MOST IMPORTANT CAPS FROM PREVIOUS MEASUREMENTS 220pF VDD_PFD IN C17 C1 IN 9 8 7 6 5 4 3 2 1 12 11 CPOUT 47 GND NC NC GND VCC_LDO VCC_VCO VCC_REG_OUT VTUNE VCC_VCAL RS_SW GND RF8P 1000pF RF8P SMA-18G 7.4nH L1 32K243-40ML5 GND GND C15 C39 0.01UF GND GND 10 VDD_X1 GND 0 R3 GND VDD_X1 DNI CPOUT IN IN VP IN GND 1UF IN GND GND 1UF C9 10pF 13 1UF VCC_REF C28 PAD PAD 46 VDD_VP 45 VDD_PFD 48 GND GND GND RF8_P GND 100 R27 C42 U1 ADF4372 C11 DNI 19 RF8P 18 10pF VCC_X4 14 REFP 43 REFN 44 VCC_REF 1000PF C41 IN 1000pF 42 GND IN RF8N RF8_N SMA-18G 7.4nH L2 GND DNI 0 36 25 26 27 28 29 30 31 32 33 34 35 IN VDD_X1 GND 32K243-40ML5 GND RF8N GND GND GND RF16P RF16N GND VCC_MUX VCC_3V VDD_NDIV VDD_LS CS SDIO SCLK 5 4 CSB SDIO SCLK IN GND IN IN IN L3 NC 2 0 R20 GND SMA-18G ATC400Z SERIES L4 VALUE TBD RF16P RF16N VCC_3V 7.4nH GND GND 1UF IN VDD_X1 C12 10pF 32K243-40ML5 GND SMA-18G 60MHZ TO 16GHZ/ 1GHZ TO 16GHZ 7.4nH 1 GND 4 VDD OUT GND RFAUX8P RFAUX8N GND Y1 3 100MHZ 0.01UF C16 1UF C24 32K243-40ML5 VDD_X1 IN VCC_X2 GND 3 2 IN VCO_LDO_3V GND GND GND R19 51 R10 TEST MUXOUT 41 IN CE VBAT33 40 MUXOUT 39 CE 37 GND 38 20 GND GND 51 10pF TEST RFAUX8P 22 VCC_X1 16 50R 1UF VCC_LDO_3V 24 RFAUX8N 23 VDD_X1 17 1 GND DNIR8 C8 GND C29 VDD_X4 15 C10 2 3 C30 RF8N 1 10pF GND 50R C32 50R 21 10pF 2 10pF RFAUX8P REFP 1 1 50R VCC_X2 3 2 3 10pF 2 C33 1 RFAUX8N Rev. 0 | Page 10 of 21 3 Figure 9. Evaluation Board Schematic, ADF4372 Connections and Loop Filter C35 8 TO 16GHZ IN VCC_3V IN VCC_MUX IN VDD_NDIV IN VDD_LS 50R 50R SMA-18G SMA-18G 1 1 GND 3 2 32K243-40ML5 RF16P RF16N 32K243-40ML5 GND 3 2 UG-1548 EV-ADF4372SD2Z User Guide EVALUATION BOARD SCHEMATICS AND ARTWORK 20393-009 VCO_LDO OUT 0 R14 0 0 R16 TP3 RED C13 10UF GND 1 Rev. 0 | Page 11 of 21 TP4 BLK GND GND R6 49.9K C18 4.7UF 10 9 8 7 6 0 R13 GND PAD DNI 1 2 3 4 5 GND LT3045EDD#PBF OUT IN OUTS IN GND EN/UV SET PG PGFB ILIM GND U2 VTUNE GND C21 10UF GND 0 C14/REGULATOR INPUT TRACE PLACE PIN1/2 INPUT TRACE DIRECTLY ABOVE THE RETURN (GND) TRACE 5.5V R17 1 S1 GND 22UF VCC_VCO 1 3 ZD1 1 3 R1 GND VSUPPLY J4 J1 GND GND 5 4 3 2 1 0 R7 0 R32 PLACE VTUNE,CPOUT & SW RESISTORS CLOSE TO DUT PINS SHIELD SIGNALS WITH VIAS ALLTHE WAY TO THE DUT PINS. 571-0100 571-0500 P4 P2 DNI RVTUNE VTUNE IN 0 GND 1 2 1 2 GND 5 4 3 2 1 VSUPPLY MUXOUT TEST 20393-010 OUT EV-ADF4372SD2Z User Guide UG-1548 Figure 10. Evaluation Board Schematic, 5 V LDO Regulator CV37 N P OUT OUT OUT OUT OUT OUT OUT OUT OUT RLV3 WILL BE USED IF THE REG O/P'S NEED TO SHORT TOGETHER. RLV2 WILL BE USED IF THE REG O/P'S NEED TO SHORT TOGETHER. RLV1 WILL BE USED IF THE REG O/P'S NEED TO SHORT TOGETHER. VDD_LS VDD_NDIV VCC_3V VCC_MUX VCC_VCAL VCC_X2 VCC_X1 VDD_X1 VCC_X4 OUT VDD_PFD VCC_REF VP VCO_LDO_3V OUT OUT OUT OUT GND C2 0.01UF E1 2 C4 10UF 80OHM AT 100MHZ 1 GND C5 0.01UF C6 10UF 0 R18 C7 10UF TP5 1 RED GND GND R12 33.2K C25 4.7UF GND 1 2 3 4 5 GND LT3045EDD#PBF OUT IN OUTS IN GND EN/UV SET PG PGFB ILIM GND PAD U3 10 9 8 7 6 GND C14 10UF C14/REGULATOR INPUT TRACE PLACE PIN1/2 INPUT TRACE DIRECTLY ABOVE THE RETURN (GND) TRACE 5.5V 20393-011 VDD_X4 0 Rev. 0 | Page 12 of 21 0 Figure 11. Evaluation Board Schematic, 3.3 V LDO Regulator R11 UG-1548 EV-ADF4372SD2Z User Guide R9 CE TEST IN IN R42 GND 1.5K DNI R229 1.5K R43 1 LE2 0 DNI R30 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 1.5K Figure 12. Evaluation Board Schematic, Board Connector Rev. 0 | Page 13 of 21 FX8-120S-SV(21) GND 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 P1 RESET_IN_N BMODE1 UART_RX UART_TX GND GND SLEEP_N RESET_OUT_N WAKE_N EEPROM_A0 NC NC NC NC NC NC GND GND NC NC CLKOUT NC TMR_D TMR_C TMR_B TMR_A GPIO7 GPIO6 GND GND GPIO5 GPIO4 GPIO3 GPIO2 GPIO1 GPIO0 SCL_0 SCL_1 SDA_0 SDA_1 GND GND SPI_CLK SPI_SEL1/SPI_SS_N SPI_MISO SPI_SEL_C_N SPI_MOSI SPI_SEL_B_N SPI_SEL_A_N GND GND SERIAL_INT SPORT_TSCLK SPI_D3 SPORT_DT0 SPI_D2 SPORT_TFS SPORT_DT1 SPORT_RFS SPORT_DR1 SPORT_DR0 SPORT_TDV1 SPORT_RSCLK SPORT_TDV0 GND GND PAR_CLK PAR_FS1 PAR_FS2 PAR_FS3 PAR_A0 PAR_A1 PAR_A2 PAR_A3 GND GND PAR_INT PAR_CS_N PAR_WR_N PAR_RD_N PAR_D0 PAR_D1 PAR_D2 PAR_D3 PAR_D4 PAR_D5 GND GND PAR_D6 PAR_D7 PAR_D8 PAR_D9 PAR_D10 PAR_D11 PAR_D12 PAR_D13 GND PAR_D14 PAR_D15 GND PAR_D16 PAR_D17 PAR_D18 PAR_D19 PAR_D20 PAR_D21 PAR_D22 PAR_D23 GND GND VIO USB_VBUS GND GND GND GND NC NC NC VIN R74 SCL_0 GND R78 DNI DNI TP1 1 WHT GND R79 0 TBD0603 100K R47 DNI SDA_0 1 2 3 6 7 8 U6 1 TP2 YEL GND A0 VCC A1 5 A2 SDA SCL WP VSS 4 24LC32A-I/MS 1 1 1 1 CSB SDIO MUX SCLK R84 1.5K R46 1.5K R45 0 R44 1.5K CSB SDIO MUXOUT SCLK IN IO IN IO VIO_+3-3V EV-ADF4372SD2Z User Guide UG-1548 20393-012 100K EV-ADF4372SD2Z User Guide 20393-013 UG-1548 Figure 13. Evaluation Board Silk Screen, Top Side Rev. 0 | Page 14 of 21 UG-1548 20393-014 EV-ADF4372SD2Z User Guide Figure 14. Evaluation Board Silk Screen, Bottom Side Rev. 0 | Page 15 of 21 UG-1548 EV-ADF4372SD2Z User Guide Figure 15. Evaluation Board Layer 1, Primary Rev. 0 | Page 16 of 21 EV-ADF4372SD2Z User Guide UG-1548 Figure 16. Evaluation Board Layer 2, Ground Rev. 0 | Page 17 of 21 UG-1548 EV-ADF4372SD2Z User Guide Figure 17. Evaluation Board Layer 3, Power Rev. 0 | Page 18 of 21 EV-ADF4372SD2Z User Guide UG-1548 Figure 18. Evaluation Board Layer 4, Secondary Rev. 0 | Page 19 of 21 UG-1548 EV-ADF4372SD2Z User Guide ORDERING INFORMATION BILL OF MATERIALS Table 2. Reference Designator RFAUX8N, RFAUX8P, RF8N, RF8P, RF16N, RF16P C1, C3, C8, C9, C12, C17, C24 C10, C11, C28, C29, C30, C35 C4, C6, C7, C13, C14, C21 C2, C5, C15, C16 C18, C25 C19 C20 C23 C26 C32, C33 Description Printed circuit boards (PCBs), SMA, right angle jack connectors Value 32K243-40ML5 Manufacturer Rosenberger Part Number 32K243-40ML5 Capacitors, ceramic, X6S 1 F TDK C1005X6S1C105K050BC Ceramic capacitors, C0G (NP0), general-purpose 10 pF Murata GRM0335C1E100JA01D Ceramic capacitors, X5R, general-purpose 10 F Murata GRM21BR61C106KE15L Ceramic capacitors, X7R, general-purpose Ceramic capacitors, X5R, general-purpose Ceramic capacitor, X7R 0603 Chip capacitor, C0G, 0603 Capacitor, ceramic, NP0 Ceramic capacitors, C0G (NP0), general-purpose Multilayer ceramic capacitors (MLCCs), NP0, RF and microwave 0.01 F 4.7 F 0.018 F 220 pF 330 pF 10pF 10 pF GRM155R71E103KA01D GRM21BR61E475KA12L 06033C183JAT2A C1608C0G1H221J CGJ3E3C0G2D331J080AA GJM1555C1H100GB01D 400Z100FT16T Ceramic capacitors, C0G (NP0), general-purpose PCB test point connectors 1000 pF Yellow Murata Murata AVX TDK TDK Murata American Technical Ceramics Murata Components Corporation Tantalum solid electrolytic ceramic Chip ferrite bead PCBs, coaxial, SMA, end launch connectors 22 F 80 at 100 MHz 142-0701-801 AVX Murata Cinch Connectivity Solutions TCJC226M025R0100 BLM15PX800SN1D 142-0701-801 PCB, SMA, right angle jack connector Chip inductors PCB, vertical type receptacle, surface-mount device (SMD) connector PCB, single socket connector PCB, single socket connector Thick film, chip resistors 02K243-40M 7.4 nH FX8-120S-SV(21) Rosenberger Coilcraft Hirose 02K243-40M 0302CS-7N4XJLU FX8-120S-SV(21) Red Black 0 Deltron Deltron Multicomp 571-0500 571-0100 MC00625W040210R Thick film, chip resistor Film, SMD resistors, 0603 Precision, thin film, chip resistor High frequency, thin film, chip resistor Thick film, chip resistor 33.2 k 0 400 100 200 Vishay Multicomp Vishay Vishay Multicomp R42, R43, R45, R46, R84 R6 R74, R79 Thick film, chip resistors 1.5 k Multicomp CRCW040233K2FKED MC0603WG00000T5E-TC PAT0603E4000BST1 FC0402E1000BST1 MC 0.063W 0603 1% 200R MC 0.063W 0603 1% 1K5 Antisurge, high power, thick film, chip resistor Thick film, chip resistors 49.9 k 100 k Vishay Multicomp RCPOUT S1 Thick film, chip resistor Single-pole, single-throw, momentary switch 91 TT11AGPC104 Yageo TE Connectivity C39, C41, C42 CSB, LE2, MUX, SCLK, SDIO, TP2 CV37 E1 J1, J4, REFP, VSUPPLY, VTUNE J3 L1, L2, L3, L4 P1 P2 P4 R1, R7, R9, R11, R14, R16, R17, R18, R19, R20, R32 R12 R15, R44 R2 R27 R4 Rev. 0 | Page 20 of 21 GRM1555C1H102JA01 TP-104-01-04 RCS040249K9FKED MC 0.063W 0603 1% 100K RC0603FR-0791RL TT11AGPC104 EV-ADF4372SD2Z User Guide UG-1548 Reference Designator TP3, TP5 Description PCB test point connectors Value Red TP4 PCB test point connector Black U1 Microwave, wideband synthesizer with integrated VCO 20 V, 500 mA, ultralow noise, ultrahigh power supply rejection ratio (PSRR), linear regulators 32 kB, serial electronically erasable programmable read only memory (EEPROM) Ultralow, phase noise XO, high density, complementary metal-oxide semiconductor (HCMOS) BZX84C 6.8 V, Zener, SOT-23 diode U2, U3 U6 Y1 ZD1 ADF4372BCCZ Manufacturer Keystone Electronics Keystone Electronics Analog Devices, Inc. Part Number 5000 ADF4372BCCZ LT3045EDD#PBF Analog Devices, Inc. LT3045EDD#PBF 24LC32A-I/MS 24LC32A-I/MS 100 MHz Microchip Technology Crystek BZX84-C6V8 Philips BZX84-C6V8 5006 CCHD-575-50-100.000 ESD Caution ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality. Legal Terms and Conditions By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the "Evaluation Board"), you are agreeing to be bound by the terms and conditions set forth below ("Agreement") unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you ("Customer") and Analog Devices, Inc. ("ADI"), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal, temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term "Third Party" includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board. Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED "AS IS" AND ADI MAKES NO WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER'S POSSESSION OR USE OF THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI'S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed. (c)2019 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. UG20393-0-4/19(0) Rev. 0 | Page 21 of 21