DS-104 REV E01
SaRonix
NTH / NCH Series
SaRonix
Crystal Clock Oscillator
Technical Data
5V, HCMOS
141 Jefferson Drive • Menlo Park, CA 94303 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
500 kHz to 106.25 MHz
Frequency Stability:
*See Part Numbering Guide
Frequency Range:
±20*, ±25, ±50 or ±100 ppm over all conditions: calibration
tolerance, operating temperature, input voltage change, load
change, 30 day aging, shock and vibration.
ACTUAL SIZE
Description
A 5V crystal controlled, low current, low
jitter and high frequency oscillator with
precise rise and fall times demanded in
networking applications, such as Gigabit
Ethernet and Fibre Channel. The tri-state
function on the NTH enables the output
to go high impedance. Device is pack-
aged in a 14 or an 8-pin DIP compatible
resistance welded, all metal grounded
case, to reduce EMI.
Applications & Features
Fibre Channel
Gigabit Ethernet
32 Bit Microprocessors
Tri-State output on NTH
HCMOS/TTL compatible
SMD plastic available
3.3V version available
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Mechanical:
Shock:
Solderability:
Terminal Strength:
Vibration:
Solvent Resistance:
Resistance to Soldering Heat:
MIL-STD-883, Method 2002, Condition B
MIL-STD-883, Method 2003
MIL-STD-883, Method 2004, Conditions B2
MIL-STD-883, Method 2007, Condition A
MIL-STD-202, Method 215
MIL-STD-202, Method 210, Condition A, B or C
( I or J for Gull Wing)
Output Waveform
80% VDD
1 Level
0 Level
50% VDD
20% VDD
2.5 VDC
1.5 VDC
0.5 VDC
GND
VDD
TrTfTf
Tr
SYMMETRY SYMMETRY
CMOS TTL
Environmental:
Gross Leak Test:
Fine Leak Test:
Thermal Shock:
Moisture Resistance:
MIL-STD-883, Method 1014, Condition C
MIL-STD-883, Method 1014, Condition A2
MIL-STD-883, Method 1011, Condition A
MIL-STD-883, Method 1004
Tri-State Logic Table (NTH only)
Pin 1 Input
Logic 1 or NC
Logic 0 or GND
Pin 8 (5) Output
Oscillation
High Impedance
Required Input Levels on Pin 1:
Logic 1 = 3.0 V min
Logic 0 = 0.5V max
Output Drive:
HCMOS Symmetry:
Rise and Fall Times:
Logic 0:
Logic 1:
Load:
RMS Period Jitter:
TTL measured @1.5V level, See Part Numbering Guide
6ns max to 24 MHz @ 0.5 to 2.5V
3ns max 24+ to 80 MHz
1.5ns max 80+ to 106.25 MHz
0.5 V max
VCC -0.6V min
10TTL to 50MHz, 5TTL 50+ to 106.25 MHz
8ps max
measured @50%VDD, See Part Numbering Guide
8ns max to 24 MHz @20% to 80% VDD
5ns max 24+ to 80 MHz
2ns max 80+ to 106.25 MHz
10% VDD max
90% VDD min
50pF to 50MHz, 30pF 50+ to 70 MHz, 15pF 70+ to 106.25 MHz
8ps max
Symmetry:
Rise and Fall Times:
Logic 0:
Logic 1:
Load:
RMS Period Jitter:
Temperature Range:
Operating:
Storage:
Supply Voltage:
Recommended Operating: +5VDC ±10%
-55 to +125°C
0 to +70°C or -40 to +85°C
Supply Current:
0.5 to 8 MHz:
8+ to 24 MHz:
24+ to 50 MHz:
50+ to 80 MHz
80+ to 106.25 MHz:
12mA
20mA
35mA
50mA
65mA
DS-104 REV E01
SaRonix
NTH / NCH Series
SaRonix
Crystal Clock Oscillator
Technical Data
5V, HCMOS
141 Jefferson Drive • Menlo Park, CA 94025 • USA • 650-470-7700 • 800-227-8974 • Fax 650-462-9894
All specifications are subject to change without notice.
Series
NTH = Tri-State, HCMOS compat.
NCH = Pin1 N/C, HCMOS compat.
N T H 0 6 0 B – 24.0000
Package Details Part Numbering Guide
21.0
.825 max
5.08
.200 max
.46±.08
.018±.003
15.24±.13
.600±.005
12.19±.13
.480±.005
4.57±.13
.180±.005
13.0
.510
(4) Glass
Insulators
Pin 7
GND
Pin 8 Output
HALF SIZE PACKAGE
max
0.91
.036
FULL SIZE PACKAGE
Pin 1
Tri-State - NTH
N/C - NCH
max
Pin 14
+5VDC
7.75
.305
120°
120°
120°
Pin 1
Tri-State - NTH
N/C - NCH
1.5
.059
13.0
.510
max
Pin 4
GND
1.7
.067
Pin 8
+5VDC 6.0
.236
Pin 5
Output
7.62±.20
.300±.008
7.62±.20
.300±.008
5.08
.200 max
.46±.08
.018±.003
0.91
.036 max
10.87
.428 max
13.0
.510 max
SARONIX
SARONIX
Marking Format
**
Includes Date Code, Frequency & Model
Denotes Pin 1
6.35±.51
.250±.020
6.35±.051
0.25±0.02
Scale: None (Dimensions in )
mm
inches
Denotes Pin 1
**
Exact location of items may vary
Marking Format
**
Includes Date Code, Frequency & Model
Test Circuits
mA
M
POWER
SUPPLY
V M OSCILLATOR
Pin 14 (8)
TEST
POINT
Pin 8 (5)
VCC OUT
GND
Pin 7 (4)
Pin 1 (1)*
TRI-STATE INPUT (NTH only)
NOTE A: CL includes probe and fixture capacitance
*( ) Indicates pin numbers for half-size package
HCMOS (Used at SaRonix)
CL = see specs on previous pg
(Note A)
Pin 14 (8)
V M
TEST
POINT
VCC OUT
OSCILLATOR
Pin 8 (5)
GND
Pin 7 (4)
Pin 1 (1)*
POWER
SUPPLY
mA
M
CL = 15 pF
(Note A)
RL = 390
Ω
MMBD7000
or Equiv
TRI-STATE INPUT (NTH only)
NOTE A: CL includes probe and fixture capacitance
*( ) Indicates pin numbers for half-size package
TTL (Optional load)
Frequency (MHz)
Symmetry / Temperature Range
0 = 40/60%, 0 to +70°C
2 = 40/60%, -40 to +85°C
4 = 45/55%, -40 to +85°C,
0.5 to 40 MHz only (TTL)
6 = 45/55%, 0 to +70°C,
0.5 to 50 MHz only (TTL)
A = 45/55%, 0 to +70°C,
0.5 to 70 MHz only (CMOS)
C = 45/55%, -40 to +85°C,
0.5 to 50 MHz only (CMOS)
Frequency Range
3 = 0.5 to 6 MHz
6 = 6+ to 24 MHz
8 = 24+ to 106.25 MHz
Stability Tolerance
C = ±100ppm
B = ±50ppm
A = ±25ppm, 0 to +70°C only
AA = ±20ppm, 0 to +70°C only, 80MHz max
Package
0 = Full Size, Thru Hole
9 = Half Size, Thru Hole
K = Full Size, Gull Wing
J = Half Size, Gull Wing
N = Half Size, Gull Wing, Spanked Leads
Example PN: NTH030C-6.0000
max
