December 2002 Advance Information PulseC re P1817A/B Low-Power Mobile VGA EMI Reduction IC Features * * * * * * * FCC approved method of EMI attenuation Generates a low EMI spread spectrum and a nonspread reference signal of the input clock frequency Optimized for frequency range from * P1817A: 20 to 32 MHz operation * P1817B: 10 to 20 MHz operation Internal loop filter minimizes external components and board space Two selectable spread ranges Low inherent cycle-to-cycle jitter 3.3 and 5.0 V operating voltage * * * * * CMOS/TTL compatible inputs and outputs Ultra low power CMOS design: 3.17mA @3.3V, 10 MHz 6.20mA @5.0V, 10 MHz 4.28mA @3.3V, 14 MHz 7.50mA @5.0V, 14 MHz 5.50mA @3.3V, 20 MHz 9.50mA @5.0V, 20 MHz Supports notebook VGA and other LCD timing controller applications SSON pin for Spread Spectrum On/Off and Standby Mode controls Available in 8-pin SOIC and TSSOP Block Diagram SR0 VDD PLL Modulation XIN XOUT SSON Crystal oscillator Frequency divider Feedback divider Phase detector Loop filter VCO Output divider ModOUT Ref VSS Applications Product Description The P1817 is targeted toward the notebook VGA chip The P1817 is a versatile spread spectrum frequency modulator designed specifically for a wide range of clock and other displays using an LVDS interface, PC frequencies. It reduces electromagnetic interference (EMI) peripheral devices, and embedded systems. at the clock source allowing system-wide reduction of EMI of downstream clock and data dependent signals. It allows Pin Diagram significant system cost savings by reducing the number of circuit board layers and shielding traditionally required to pass EMI regulations. 8 XOUT CLKIN 1 The P1817 modulates the output of a single PLL in order to spread the bandwidth of a synthesized clock, thereby VSS 2 7 VDD decreasing the peak amplitudes of its harmonics. This 6 REF SR0 3 results in significantly lower system EMI compared to the typical narrow band signal produced by oscillators and 5 ModOUT SSON/SBM 4 most clock generators. Lowering EMI by increasing a signal's bandwidth is called spread spectrum clock generation. The P1817 uses the most efficient and optimized modulation profile approved by the FCC and is implemented by using a proprietary all-digital method. 12/20/02, v. 0.4 Alliance Semiconductor P. 1 of 6 &RS\ULJKW$OOLDQFH6HPLFRQGXFWRU$OOULJKWVUHVHUYHG P1817A/B Standby Mode Selection CLKIN SSON/SBM Spread Spectrum ModOUT PLL Mode Disabled 0 N/A Disabled Disabled Standby Disabled 1 N/A Disabled Free running Free running Enabled 0 Off Reference Disabled Buffer out Enabled 1 On Normal Normal Normal Spread Range Selection SR0 Spreading range Modulation rate 0 1.50% (Fin/10) * 20.83 KHz 1 1.25% (Fin/10) * 20.83 KHz Pin Description Pin # Name Type Description 1 CLKIN I Connect to externally generated clock signal. To put the part into standby mode, disable the input clock signal to this pin and pull SSON/SBM (pin 4) low. (See Standby Mode Selection.) 2 VSS P Ground connection. Connect to system ground. 3 SR0 I Digital logic input used to select Spreading Range. (See Spread Spectrum Selection.) This pin has an internal pull-up resistor. 4 SSON/SBM I Spread Spectrum On/Off and Standby Mode control. (See Standby Mode Selection.) This pin has an internal pull-up resistor. 5 ModOUT O Spread Spectrum clock output or Reference output. (See Standby Mode Selection.) 6 REF O Reference output. 7 VDD P Connect to +3.3 V or 5.0 V. 8 XOUT I Connect to crystal. No connect if externally generated clock signal is used. 12/20/02, v. 0.4 Alliance Semiconductor P. 2 of 6 P1817A/B Schematic for Notebook VGA Application 1 CLKIN XOUT 8 2 VSS VDD 7 3 SR0 REF 6 Ferrite bead 0.1 uF VDD 4 SSON/SBM ModOUT 5 P1817A/B Tie pin 3 SR0 high/low according to spread range desired. External resistors are not needed to pull these pins high. 10 MHz to 32 MHz EMI reduced clock output. Pin 4 SSON should be left unconnected to turn on Spread Spectrum. Pull this pin low to turn Spread Spectrum off and enable Standby Mode.1 1 To set the P1817 to standby mode, disable the input clock (pin 1 CLKIN), and pull pin 4 SSON/SBM low. 12/20/02, v. 0.4 Alliance Semiconductor P. 3 of 6 P1817A/B Absolute Maximum Ratings Symbol VDD, VIN TSTG TA Parameter Rating Units Voltage on any pin with respect to GND -0.5 to +7.0 V Storage temperature -65 to +125 C 0 to +70 C Operating temperature DC Electrical Characteristics Symbol Parameter Min Typ Max Units VIL Input low voltage GND - 0.3 - 0.8 V VIH Input high voltage 2.0 - VDD + 0.3 V IIL Input low current (pull-up resistor on inputs SR0 and SSON/SBM) - - -35 A IIH Input high current - - 35 A at 0.4 V, VDD = 3.3V - 3 - mA at 0.4 V, VDD = 5.0 V - 20 - mA at 2.5 V, VDD = 3.3 V - 3 - mA at 4.5 V, VDD = 5.0 V - 20 - mA VDD = 3.3 V, IOL = 20 mA - - 0.4 V VDD = 5.0 V, IOL = 20 mA - - - V VDD = 3.3 V, IOL = 20 mA 2.5 - - V VDD = 5.0 V, IOL = 20 mA 4.5 - - V - 0.6 - mA Normal mode: 3.3 V and 10 pF loading fIN-min fIN-typ fIN-max 3.2 - 7.0 mA 5.0 V and 10 pF loading 6.2 - 13.6 mA IXOL XOUT output low current IXOH XOUT output high current VOL Output low voltage VOH Output high voltage IDD Static supply current standby mode ICC Dynamic supply current VDD Operating voltage 2.7 3.3 5.5 V tON Power-up time (first locked cycle after power up) - 0.18 - mS Clock output impedance - 50 - Min Typ Max Units Input frequency 10 - 32 MHz Output frequency 10 - 32 MHz Measured at 0.8 V to 2.0 V 0.7 0.9 1.1 ns Measured at 1.2 V to 3.75 V - 0.75 - ns Measured at 2.0 V to 0.8 V 0.6 0.8 1.0 ns Measured at 1.2 V to 3.75 V - 0.75 - ns ZOUT AC Electrical Characteristics Symbol fIN fOUT 1 tLH tHL 1 Parameter Output rise time Output fall time tJC Jitter (cycle to cycle) - - 360 ps tD Output duty cycle 45 50 55 % 1 tLH and tHL are measured into a capacitive load of 15 pF. 12/20/02, v. 0.4 Alliance Semiconductor P. 4 of 6 P1817A/B Mechanical Package Outline (8-Pin SOIC) INCHES C SYMBOL MIN A L P1817A/B LOT NUMBER YYWW H E a D A2 B e A A1 MILLIMETERS MAX MIN NOR MAX 0.057 0.064 0.071 1.45 1.63 1.80 A1 0.004 0.007 0.010 0.10 0.18 0.25 A2 0.053 0.061 0.069 1.35 1.55 1.75 B 0.012 0.016 0.020 0.31 0.41 0.51 C 0.004 0.006 0.001 0.10 0.15 0.25 D 0.186 0.194 0.202 4.72 4.92 5.12 E 0.148 0.156 0.164 3.75 3.95 4.15 e NOR 0.050 BSC 1.27 BSC H 0.224 0.236 0.248 5.70 6.00 6.30 L 0.012 0.020 0.028 0.30 0.50 0.70 a 0 0 5 8 5 8 Note: Controlling dimensions are millimeters. SOIC - 0.074 grams unit weight Mechanical Package Outline (8-Pin TSSOP) INCHES C SYMBOL Lot # YYWW P 1817A/B L H E a D MIN B e A1 A MAX MIN NOR MAX A - - 0.047 - - 1.10 A1 0.002 - 0.006 0.05 - 0.15 A2 0.031 0.039 0.041 0.80 1.00 1.05 B 0.007 - 0.012 0.19 - 0.30 C 0.004 - 0.008 0.09 - 0.20 D 0.114 0.118 0.122 2.90 3.00 3.10 E 0.169 0.173 0.177 4.30 4.40 4.50 e A2 NOR MILLIMETERS 0.026 BSC 0.65 BSC H 0.244 0.252 0.260 6.20 6.40 6.60 L 0.018 0.024 0.030 0.45 0.60 0.75 a 0 - 8 0 - 8 Note: Controlling dimensions are millimeters. TSSOP - 0.034 grams unit weight 12/20/02, v. 0.4 Alliance Semiconductor P. 5 of 6 P1817A/B Ordering Information Order Number Marking Input frequency (MHz) Package type P1817A-08ST P1817A 20 - 32 8-pin SOIC, tube P1817A-08SR P1817A 20 - 32 8-pin SOIC, tape & reel P1817A-08TT P1817A 20 - 32 8-pin TSSOP, tube P1817A-08TR P1817A 20 - 32 8-pin TSSOP, tape & reel P1817B-08ST P1817B 10 - 20 8-pin SOIC, tube P1817B-08SR P1817B 10 - 20 8-pin SOIC, tape & reel P1817B-08TT P1817B 10 - 20 8-pin TSSOP, tube P1817B-08TR P1817B 10 - 20 8-pin TSSOP, tape & reel Quantity/ reel Temperature 0 C to 70 C 2,500 0 C to 70 C 0 C to 70 C 2,500 0 C to 70 C 0 C to 70 C 2,500 0 C to 70 C 0 C to 70 C 2,500 0 C to 70 C Licensed under U.S. Patent Nos. 5,488,627 and 5,631,920. Preliminary datasheet. Specifications subject to change without notice. 12/20/02, v. 0.4 Alliance Semiconductor P. 6 of 6 (c) Copyright Alliance Semiconductor Corporation. All rights reserved. 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