MSC23B236A-xxBS8/DS8¡ Semiconductor
159
¡ Semiconductor
MSC23B236A-xxBS8/DS8
2,097,152-Word ¥ 36-Bit DRAM MODULE : FAST PAGE MODE TYPE
DESCRIPTION
The Oki MSC23B236A-xxBS8/DS8 is a fully decoded 2,097,152-word ¥ 36-bit CMOS dynamic
random access memory composed of four 16-Mb (1M ¥ 16) DRAMs in SOJ and four 2-Mb (1M
¥ 2) DRAMs in SOJ. The mounting of eight DRAMs together with decoupling capacitors on a 72-
pin glass epoxy SIMM Package supports any application where high density and large capacity
of storage memory are required.
FEATURES
2,097,152-word ¥ 36-bit (Parity) organization
72-pin SIMM
MSC23B236A-xxBS8 : Gold tab
MSC23B236A-xxDS8 : Solder tab
Single 5 V supply ±10% tolerance
Input : TTL compatible
Output : TTL compatible, 3-state, nonlatch
Refresh : 1024 cycles/16 ms
CAS before RAS refresh, CAS before RAS hidden refresh, RAS-only refresh capability
Fast Page Mode capability
PRODUCT FAMILY
Family Access Time (Max.) Cycle Time
(Min.)
Power Dissipation
Operating (Max.)
Standby (Max.)tRAC tAA tCAC
MSC23B236A-60BS8/DS8
MSC23B236A-70BS8/DS8
60 ns
70 ns
30 ns
35 ns
15 ns
20 ns
110 ns
130 ns
3410 mW
3080 mW 44 mW
MSC23B236A-xxBS8/DS8 ¡ Semiconductor
160
PIN CONFIGURATION
MSC23B236A-xxBS8/DS8
VSS A4 A8 NC
MSC23B236A
-70BS8/DS8
NC
MSC23B236A
-60BS8/DS8
NC
Pin No.
Pin Name
Pin No.
Pin Name
Pin No.
Pin Name
11631
Pin No.
Pin Name
46
Pin No. Pin Name
67 PD1
Pin No.
Pin Name
61 DQ14
DQ0 A5 A9 WE
2 17324762 DQ33
DQ18 A6 RAS3 NC
3 18334863 DQ15
DQ1 NC RAS2 DQ9
4 19344964 DQ34
DQ19 DQ4 DQ26 DQ27
5 20355065 DQ16
DQ2 DQ22 DQ8 DQ10
6 21365166 NC
DQ20 DQ5 DQ17 DQ28
7 22375267 PD1
DQ3 DQ23 DQ35 DQ11
8 23385368 PD2
DQ21 DQ6 VSS DQ29
9 24395469 PD3
VCC DQ24 CAS0 DQ12
10 25 40 55 70 PD4
NC DQ7 CAS2 DQ30
11 26 41 56 71 NC
A0 DQ25 CAS3 DQ13
12 27 42 57 72 VSS
A1 A7 CAS1 DQ31
13 28 43 58
A2 NC RAS0 VCC
14 29 44 59
A3 VCC RAS1 DQ32
15 30 45 60
NCNC68 PD2
VSS
NC69 PD3
NCNC70 PD4
Presence Detect Pins
(Unit : mm)
1.27 +0.1
–0.08
9.3 Max.
5.7 Min.
10.16
±0.13 6.35
±0.13
101.19 Typ.3.38 ±0.13
107.95 ±0.2
1.04 Typ.
95.25
2.03 ±0.13
3.18f
1.27 ±0.1
72
1
* 1
6.35
R1.57
25.4 ±0.13
6.35 Typ.
*1 The common size difference of the board width 12.5 mm of its height is
specified as ±0.2. The value above 12.5 mm is specified as ±0.5.
MSC23B236A-xxBS8/DS8¡ Semiconductor
161
BLOCK DIAGRAM
DQ12
V
SS
A0 - A9
DQ13
RAS
DQ14
OE
DQ16
DQ15
V
CC
A0 - A9
V
CC
C1 C8
DQ12
DQ13
DQ14
DQ15
V
SS
A0 - A9
DQ1
RAS DQ2
CAS1
CAS2
V
CC
DQ8
DQ17
DQ16
DQ11 DQ11
DQ10 DQ10
DQ9 DQ9
DQ8 DQ7
DQ7 DQ6
DQ6 DQ5
DQ5 DQ4
DQ4 DQ3
DQ3 DQ2
DQ2 DQ1
DQ1 DQ0
WE
UCAS
LCAS
WE
OE
DQ12
V
SS
A0 - A9
DQ13
RAS
DQ14
OE
DQ16
DQ15
V
CC
DQ30
DQ31
DQ32
DQ33
V
SS
A0 - A9
DQ1
RAS DQ2
CAS1
CAS2
V
CC
DQ26
DQ35
DQ34
DQ11 DQ29
DQ10 DQ28
DQ9 DQ27
DQ8 DQ25
DQ7 DQ24
DQ6 DQ23
DQ5 DQ22
DQ4 DQ21
DQ3 DQ20
DQ2 DQ19
DQ1 DQ18
WE
UCAS
LCAS
WE
OE
CAS0
CAS1
RAS0
WE
RAS2
CAS3
CAS2
V
SS
DQ12
DQ13
DQ14
DQ16
DQ15
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
A0 - A9
RAS
OE
WE
UCAS
LCAS
V
SS
V
CC
RAS1
A0 - A9
RAS
CAS1
CAS2
WE
OE
DQ1
DQ2
V
SS
V
CC
RAS3
DQ12
DQ13
DQ14
DQ16
DQ15
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
A0 - A9
RAS
OE
WE
UCAS
LCAS
V
CC
V
SS
A0 - A9
RAS
CAS1
CAS2
WE
OE
DQ1
DQ2
V
CC
V
SS
MSC23B236A-xxBS8/DS8 ¡ Semiconductor
162
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Note: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to the conditions as detailed in the
operational sections of this data sheet. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Recommended Operating Conditions
Capacitance
Note : Capacitance measured with Boonton Meter.
Voltage on Any Pin Relative to VSS
Parameter Symbol Rating Unit
VIN, VOUT –1.0 to 7.0 V
Voltage VCC Supply Relative to VSS VCC –1.0 to 7.0 V
Short Circuit Output Current IOS 50 mA
Power Dissipation PD9.2 W
Operating Temperature Topr 0 to 70 °C
Storage Temperature Tstg –40 to 125 °C
Parameter Symbol Unit
Power Supply Voltage V
CC
Input High Voltage
Typ.
Min. Max.
4.5 5.0 5.5 V
(Ta = 0°C to 70°C)
V
SS
000V
V
IH
2.4 6.5 V
V
IL
–1.0 0.8 V
Input Low Voltage
Parameter Symbol Unit
CIN1 pFInput Capacitance (A0 - A9)
Typ. Max.
—53
(Ta = 25°C, f = 1 MHz)
CIN2 pFInput Capacitance (WE)—65
C
IN3 pFInput Capacitance (RAS0 - RAS3)—20
C
IN4 pFInput Capacitance (CAS0 - CAS3)—35
C
DQ pFI/O Capacitance (DQ0 - DQ35) 20
MSC23B236A-xxBS8/DS8¡ Semiconductor
163
DC Characteristics
All other pins not
Parameter
MSC23B236A MSC23B236A
Unit
Condition
Input Leakage Current
Note
ILI µA
1, 2
(VCC = 5 V ±10%, Ta = 0°C to 70°C)
Symbol
0 V £ VI £ 6.5 V;
under test = 0 V
DOUT disable
0 V £ VO £ 5.5 V
IOH = –5.0 mA
IOL = 4.2 mA
RAS, CAS cycling,
tRC = Min.
RAS, CAS = VIH
RAS, CAS
VCC –0.2 V
RAS cycling,
CAS = VIH,
tRC = Min.
RAS cycling,
CAS before RAS,
tRC = Min.
RAS = VIL,
CAS cycling,
tPC = Min.
Output Leakage Current
Output High Voltage
Output Low Voltage
Average Power
Supply Current
(Operating)
Power Supply
Current (Standby)
Supply Current
(RAS-only Refresh)
Average Power
Supply Current
(CAS before RAS Refresh)
Average Power
Supply Current
(Fast Page Mode)
Average Power
ILO
VOH
VOL
ICC1
ICC2
ICC3
ICC6
ICC7
µA
V
V
mA
mA
mA
mA
mA
mA
Min.
–80
–20
2.4
0
Max.
80
20
VCC
0.4
620
16
8
620
620
480
Min.
–80
–20
2.4
0
Max.
80
20
VCC
0.4
560
16
8
560
560
450
1
1
1, 2
1, 2
1, 3
-60BS8/DS8 -70BS8/DS8
Notes: 1. ICC Max. is specified as ICC for output open condition.
2. Address can be changed once or less while RAS=VIL.
3. Address can be changed once or less while CAS=VIH.
MSC23B236A-xxBS8/DS8 ¡ Semiconductor
164
AC Characteristics (1/2)
Parameter
Symbol
MSC23B236A MSC23B236A
Unit
Random Read or Write Cycle Time
Note
(VCC = 5 V ±10%, Ta = 0°C to 70°C) Note 1,2,3
tRC ns
4, 5, 6
Fast Page Mode Cycle Time tPC ns
Access Time from RAS tRAC ns
Access Time from CAS tCAC ns
Access Time from Column Address tAA ns
Access Time from CAS Precharge tCPA ns
Output Low Impedance Time from CAS
tCLZ ns
Output Buffer Turn-off Delay Time tOFF ns
Transition Time tTns
Refresh Period tREF ms
RAS Precharge Time tRP ns
RAS Pulse Width tRAS ns
RAS Pulse Width (Fast Page Mode) tRASP ns
RAS Hold Time tRSH ns
CAS Precharge Time tCP ns
CAS Pulse Width tCAS ns
CAS Hold Time tCSH ns
CAS to RAS Precharge Time tCRP ns
RAS to CAS Delay Time tRCD ns
RAS to Column Address Delay Time tRAD ns
Row Address Set-up Time tASR ns
Row Address Hold Time tRAH ns
Column Address Set-up Time tASC ns
Column Address Hold Time tCAH ns
Column Address Hold Time from RAS tAR ns
Column Address to RAS Lead Time tRAL ns
4, 5
4, 6
4
4
7
3
5
6
-60BS8/DS8 -70BS8/DS8
Max.
70
20
35
40
20
50
16
10k
100k
10k
50
35
RAS Hold Time from CAS Precharge tRHCP
Min.
110
40
0
0
3
40
60
60
15
10
15
60
5
20
15
0
10
0
15
50
30
35
Max.
60
15
30
35
15
50
16
10k
100k
10k
45
30
Min.
130
45
0
0
3
50
70
70
20
10
20
70
5
20
15
0
10
0
15
55
35
40 ns
MSC23B236A-xxBS8/DS8¡ Semiconductor
165
AC Characteristics (2/2)
Parameter
Symbol
MSC23B236A MSC23B236A
Unit
Read Command Set-up Time
Note
tRCS ns
8
(VCC = 5 V ±10%, Ta = 0°C to 70°C) Note 1,2,3
Read Command Hold Time tRCH ns
Read Command Hold Time referenced to RAS
tRRH ns
Write Command Set-up Time tWCS ns
Write Command Hold Time tWCH ns
Write Command Hold Time from RAS tWCR ns
Write Command Pulse Width tWP ns
Write Command to RAS Lead Time tRWL ns
Write Command to CAS Lead Time tCWL ns
Data-in Set-up Time tDS ns
Data-in Hold Time tDH ns
Data-in Hold Time from RAS tDHR ns
CAS Active Delay Time from RAS Precharge
tRPC ns
RAS to CAS Set-up Time (CAS before RAS)t
CSR ns
RAS to CAS Hold Time (CAS before RAS)t
CHR ns
WE to RAS Precharge Time (CAS before RAS)
tWRP ns
WE Hold Time from RAS (CAS before RAS)t
WRH
Min.
0
0
0
0
10
45
10
15
15
0
15
50
5
5
10
10
10
Max.
Min.
0
0
0
0
15
55
15
20
20
0
15
55
5
5
15
10
10 ns
Max.
8
-60BS8/DS8 -70BS8/DS8
MSC23B236A-xxBS8/DS8 ¡ Semiconductor
166
Notes: 1. A start-up delay of 200 µs is required after power-up followed by a minimum of
eight initialization cycles (RAS-only refresh or CAS before RAS refresh) before
proper device operation is achieved.
When using the internal refresh counter, a minimum of eight CAS before RAS
initialization cycles is required.
2. AC mesurement assume tT = 5 ns.
3. VIH (Min.) and VIL (Max.) are reference levels for measuring input timing signals.
Transition times are measured between VIH and VIL.
4. Measured with a load circuit equivalent to 2 TTL loads and 100 pF.
5. Operation within the tRCD (Max.) limit ensures that tRAC (Max.) can be met. tRCD
(Max.) is specified as a reference point only. If tRCD is greater than the specified tRCD
(Max.) limit, access time is controlled by tCAC.
6. Operation within the tRAD (Max.) limit ensures that tRAC (Max.) can be met. tRAD
(Max.) is specified as a reference point only. If tRAD is greater than the specified tRAD
(Max.) limit, access time is controlled by tAA.
7. tOFF (Max.) defines the time at which the output achieves an open circuit condition
and is not referenced to output voltage levels.
8. tRCH or tRRH must be satisfied for a read cycle.
See ADDENDUM B for AC Timing Waveforms