TL7726
HEX CLAMPING CIRCUITS
SLAS078C – SEPTEMBER 1993 – REVISED JULY 1999
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Protects Against Latch-Up
D
25-mA Current Sink in Active State
D
Less Than 1-mW Dissipation in Standby
Condition
D
Ideal for Applications in Environments
Where Large Transient Spikes Occur
D
Stable Operation for All Values of
Capacitive Load
D
No Output Overshoot
description
The TL7726 consists of six identical clamping circuits that monitor an input voltage with respect to a reference
value, REF. For an input voltage (VI) in the range of GND to < REF, the clamping circuits present a very high
impedance to ground, drawing current of less than 10 µA. The clamping circuits are active for VI < GND or
VI > REF when they have a very low impedance and can sink up to 25 mA.
These characteristics make the TL7726 ideal as protection devices for CMOS semiconductor devices in
environments where there are large positive or negative transients to protect analog-to-digital converters in
automotive or industrial systems. The use of clamping circuits provides a safeguard against potential latch-up.
The TL7726C is characterized for operation over the temperature range of 0°C to 70°C. The TL7726I is
characterized for operation over the temperature range of –40°C to 85°C. The TL7726Q is characterized for
operation over the temperature range of –40°C to 125°C.
AVAILABLE OPTIONS
TASOIC (D) PLASTIC DIP (P)
0°C to 70°C TL7726CD TL7726CP
–40°C to 85°C TL7726ID TL7726IP
–40°C to 125°C TL7726QD TL7726QP
The D package is available taped and reeled. Add the suffix R to the
device type (i.e., TL7726CDR).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
3
4
8
7
6
5
GND
CLAMP
CLAMP
CLAMP
REF
CLAMP
CLAMP
CLAMP
D OR P PACKAGE
(TOP VIEW)
TL7726
HEX CLAMPING CIRCUITS
SLAS078C – SEPTEMBER 1993 – REVISED JULY 1999
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature (unless otherwise noted)†
Reference voltage, Vref 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Clamping current, IIK ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction temperature, TJ 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 1 and 2): D package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
P package 127°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can impact reliability.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
recommended operating conditions
MIN MAX UNIT
Reference voltage, Vref 4.5 5.5 V
In
p
ut clam
p
ing current IIK
VI ≥ Vref 25
mA
Inp
u
t
clamping
c
u
rrent
,
I
IK VI ≤ GND –25
mA
TL7726C 0 70
Operating free-air temperature range, TATL7726I –40 85 °C
TL7726Q –40 125
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP‡MAX UNIT
VIK+ Positive clamp voltage II = 20 mA Vref Vref+200 mV
VIK – Negative clamp voltage II = 20 mA –200 0 mV
IZReference current Vref = 5 V 25 60 µA
Vref – 50 mV ≤ VI ≤ Vref 10
IIInput current GND ≤ VI ≤ 50 mV –10 µA
50 mV ≤ VI ≤ Vref – 50 mV –1 1
‡All typical values are at TA = 25°C.
switching characteristics specified at TA = 25°C
PARAMETER TEST CONDITIONS MIN MAX UNIT
t
Settling time
V
I(system)
= ±13 V, R
I
= 600 Ω, t
t
< 1 µs,
30
µs
t
s
Settling
time
I(system) ,
Measured at 10% to 90%,
I,
See Figure 1
tµ,
30
µ
s
TL7726
HEX CLAMPING CIRCUITS
SLAS078C – SEPTEMBER 1993 – REVISED JULY 1999
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
13 V
–13 V
0 V
90%
10%
VI(system)
tt
VIK+
95%
5%
ts
VIK
600 Ω
VCC = 5 V
TL7726
REF
CLAMP
GND
VI(system)
VIK–
TEST CIRCUIT
INPUT WAVEFORM CLAMP WAVEFORM
ttts
Figure 1. Switching Characteristics
II
100 mA
10 mA
1 mA
100 µA
10 µA
1 µA
Vref –50 mV
50 mV
25 mA
VIK–
–VI
II
–25 mA
GND Vref
VI
–1 µA
–10 µA
–100 µA
–1 mA
–10 mA
–100 mA
VIK+
Figure 2. Tolerance Band for Clamping Circuit
TL7726
HEX CLAMPING CIRCUITS
SLAS078C – SEPTEMBER 1993 – REVISED JULY 1999
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
Device to Be
Protected, e.g.,
A/D Converter,
Microprocessor, etc.
VCC = 5 V
10 kΩ
II
VI
IZ
Vref
1/6
TL7726
VI(system)
(input signal)
II(system)
Example: If II >> II(system), i.e., VI(system) > Vref + 200 mV
where:
II(system) = Input current to the device being protected
VI(system) = Input voltage to the device being protected
then the maximum input voltage
VI(system)max = V ref + IImax(10kΩ)
= 5 V + 25 mA(10kΩ)
= 5 V + 250 V
= 255 V
Figure 3. Typical Application
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TL7726CD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726CDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726CDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726CDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726CP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7726CPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7726ID ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726IDE4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726IDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726IDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726IDRE4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726IDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726IP ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7726IPE4 ACTIVE PDIP P 8 50 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type
TL7726QD ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726QDG4 ACTIVE SOIC D 8 75 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 17-Aug-2012
Addendum-Page 2
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
TL7726QDR ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-3-260C-168 HR
TL7726QDRG4 ACTIVE SOIC D 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
TL7726QP ACTIVE PDIP P 8 TBD Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
TL7726CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7726IDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
TL7726QDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
TL7726CDR SOIC D 8 2500 340.5 338.1 20.6
TL7726IDR SOIC D 8 2500 340.5 338.1 20.6
TL7726QDR SOIC D 8 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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