IL510/IL511/IL514/IL515/IL516
IsoLoop is a registered trademark of NVE Corporation.
*U.S. Patent numbers 5,831,426; 6,300,617 and others.
REV. I
NVE Corporation 11409 Valley View Road, Eden Prairie, MN 55344-3617 Phone: ( 952) 829-9217 Fax: (952) 829-9189 www.IsoLoop.com ©NVE Corporation
Low-Cost Di
g
ital Isolators
Functional Diagrams
IL515
IL516
IN1
IN2
OUT3
OUT4
OUT1
OUT2
IN3
IN4
OUT1
OUT2
OUT3
OUT4
IN1
IN2
IN3
IN4
OUT1
IN1
IL510
IL511
IN1
IN2
OUT1
OUT2
VOE
IL514
OUT1
OUT2
IN1
IN2
IN3
OUT3
VOE
VOE
Features
+5 V / +3.3 V CMOS/TTL Compatible
2 Mbps Maximum Speed
40ºC to 85ºC Operating Temperature
2500 VRMS Isolation (1 min.)
10 ns Pulse Width Distortion
25 ns Propagation Delay
DC-Correct
30 kV/µs Typical Common Mode Rejection
Low EMC Footprint
8-pin MSOP; 0.3" and 0.15" 8-pin and 16-pin SOIC Packages
UL 1577 and IEC 61010-2001 Approved
Applications
ADCs and DACs
Digital Fieldbus
RS-485 and RS-422
Multiplexed Data Transmission
Data Interfaces
Board-to-Board Communication
Digital Noise Reduction
Ground Loop Elimination
Peripheral Interfaces
Parallel Bus
Logic Level Shifting
Description
IL500-Series isolators are low cost isolators operating up to 2Mbps over an
operating temperature range of 40ºC to 85ºC.
The devices use NVE’s patented* IsoLoop® spintronic Giant
Magnetoresistive (GMR) technology.
IL510/IL511/IL514/IL515/IL516
2
Absolute Maximum Ratings
Parameters Symbol Min. Typ. Max. Units Test Conditions
Storage Temperature TS 55 150 °C
Ambient Operating Temperature
(
1
)
T
A 55 150 °C
Supply Voltage VDD1, VDD2 0.5 7 V
Input Voltage VI 0.5 VDD+0.5 V
Output Voltage VO 0.5 VDD+0.5 V
Output Current Drive IO 10 mA
Lead Solder Temperature 260 °C 10 sec.
ESD 2 kV HBM
Recommended Operating Conditions
Parameters Symbol Min. Typ. Max. Units Test Conditions
Ambient Operating Temperature TA 40 85 °C
Supply Voltage VDD1, VDD2 3.0 5.5 V
Logic High Input Voltage VIH 2.4 VDD V
Logic Low Input Voltage VIL 0 0.8 V
Input Signal Rise and Fall Times
(
10
)
t
IR, tIF DC-Correct
Insulation Specifications
Parameters Symbol Min. Typ. Max. Units Test Conditions
Creepage Distance
MSOP 3.0 mm
0.15" SOIC (8-pin or 16-pin) 4.0 mm
0.3" SOIC 8.1 mm
Leakage Current 0.2 µA 240 VRMS, 60 Hz
Barrier Impedance >1014||3 || pF
Package Characteris tics
Parameters Symbol Min. Typ. Max. Units Test Conditions
Capacitance (Input–Output)
(
5
)
C
IO 4 pF f = 1 MHz
Thermal Resistance
MSOP θJC 168 °C/W
Thermocouple at
center underside
of package
0.15" 8-pin SOIC θJC 144 °C/W
0.15" 16-pin SOIC θJC 41 °C/W
0.3" 16-pin SOIC θJC 28 °C/W
Package Power Dissipation PPD 150 mW f = 1 MHz, VDD = 5 V
Safety and Approvals
IEC61010-1
TUV Certificate Numbers: N1502812, N1502812-101
Classification as Reinfor ced Insulation
Model Package
Pollution
Degree Material
Group Max. Working
Voltage
IL5xx-1 MSOP II III 150 VRMS
IL5xx-3 8-pin and 16-pin 0.15" SOIC II III 150 VRMS
IL5xx 0.3" SOIC II III 300 VRMS
UL 1577
Component Recognition Program File Number: E207481
Rated 2500VRMS for 1 minute
Soldering Profile
Per JEDEC J-STD-020C, MSL=2
IL510/IL511/IL514/IL515/IL516
3
IL510 Pin Connections
1 VDD1 Supply voltage
2 IN Data in
3 SYNC
Internal refresh clock disable
(normally enabled and inte rnally
held low with 10 k)
4 GND1 Ground return for VDD1
5 GND2 Ground return for VDD2
6 OUT Data out
7
VOE Output enable
(internally held low with 100 k)
8 VDD2 Supply voltage
V
DD1
V
DD2
IN V
OE
SYNC OUT
GND
1
GND
2
IL510
IL511 Pin Connections
1 VDD1 Supply voltage
2 IN1 Data in, channel 1
3 IN2 Data in, channel 2
4 GND1 Ground return for VDD1
5 GND2 Ground return for VDD2
6 OUT2 Data out, channel 2
7 OUT1 Data out, channel 1
8 VDD2 Supply voltage
1
2
3
45
6
7
8
IN
1
IN
2
V
DD1
GND
1
OUT
2
OUT
1
V
DD2
GND
2
IL511
IL514 Pin Connections
1 VDD1 Supply voltage 1
2 GND1 Ground return for VDD1
(pin 2 internally connected to pin 8)
3 IN1 Data in, channel 1
4 IN2 Data in, channel 2
5 OUT3 Data out, channel 3
6 NC No connection
7
VOE Output enable, channel 3
(internally held low with 100 k)
8 GND1 Ground return for VDD1
(pin 8 internally connected to pin 2)
9 GND2 Ground return for VDD2
(pin 9 internally connected to pin 15)
10 NC No connection
11 NC No connection
12 IN3 Data in, channel 3
13 OUT2 Data out, channel 2
14 OUT1 Data out, channel 1
15 GND2 Ground return for VDD2
(pin 15 internally connected to pin 9)
16 VDD2 Supply voltage
V
DD1
GND
1
GND
2
IN
1
OUT
1
OUT
2
IN
2
V
DD2
NC
IN
3
GND
1
GND
2
NC
V
OE
OUT
3
NC
IL514
IL510/IL511/IL514/IL515/IL516
4
IL515 Pin Connections
1 VDD1 Supply voltage
2 GND1 Ground return for VDD1
(pin 2 internally connected to pin 8)
3 IN1 Data in, channel 1
4 IN2 Data in, channel 2
5 IN3 Data in, channel 3
6 IN4 Data in, channel 4
7 SYNC
Internal refresh clock disable
(normally enabled and
internally held low with 10 k)
8 GND1 Ground return for VDD1
(pin 8 internally connected to pin 2)
9 GND2 Ground return for VDD2
(pin 9 internally connected to pin 15)
10
VOE Output enable
(internally held low with 100 k)
11 OUT4 Data out, channel 4
12 OUT3 Data out, channel 3
13 OUT2 Data out, channel 2
14 OUT1 Data out, channel 1
15 GND2 Ground return for VDD2
(pin 15 internally connected to pin 9)
16 VDD2 Supply voltage
VDD1
GND1GND2
OUT2
OUT3
OUT1
IN1
IN2
IN3
VDD2
IN4
SYNC
OUT4
GND1GND2
VOE
IL515
IL516 Pin Connections
1 VDD1 Supply voltage
2 GND1 Ground return for VDD1
(pin 2 internally connected to pin 8)
3 IN1 Data in, channel 1
4 IN2 Data in, channel 2
5 OUT3 Data out, channel 3
6 OUT4 Data out, channel 4
7 NC No connection
8 GND1 Ground return for VDD1
(pin 8 internally connected to pin 2)
9 GND2 Ground return for VDD2
(pin 9 internally connected to pin 15)
10 NC No connection
11 IN4 Data in, channel 4
12 IN3 Data in, channel 3
13 OUT2 Data out, channel 2
14 OUT1 Data out, channel 1
15 GND2 Ground return for VDD2
(pin 15 internally connected to pin 9)
16 VDD2 Supply voltage
VDD1
GND1GND2
OUT2
OUT3
OUT1
IN1
IN2
IN3
VDD2
IN4
NC NC
OUT4
GND1GND2
IL516
IL510/IL511/IL514/IL515/IL516
5
Timing Diagrams
Legend
tPLH Propagation Delay, Low to High
tPHL Propagation Delay, High to Low
tPW Minimum Pulse Width
tPLZ Propagation Delay, Low to High Impedance
tPZH Propagation Delay, High Impedance to High
tPHZ Propagation Delay, High to High Impedance
tPZL Propagation Delay, High Impedance to Low
tR Rise Time
tF Fall Time
Truth Tables
Output Enable
VI VOE VO
L L L
H L H
L H Z
H H Z
SYNC
SYNC Internal Refresh Clock
0 Enabled
1 Disabled
Note: SYNC should be left open or connected
to GND to enable the internal refresh clock,
or connected to VDD to disable the internal clock.
IL510/IL511/IL514/IL515/IL516
6
3.3 Volt Electrical Specifications
Electrical specifications are Tmin to Tmax unless otherwise stated.
Parameters Symbol Min. Typ. Max. Units Test Conditions
DC Specifications
Input Quiescent Supply Current
IL510, IL511, IL515 IDD1 15 30 µA
IL514 1.7 2 mA
IL516 3.3 4 mA
Output Quiescent Supply Current
IL510 IDD2 1.7 2 mA
IL511, IL514, IL516 3.3 4 mA
IL515 6.6 8 mA
Logic Input Current II 10 10 µA
Logic High Output Voltage VOH VDD 0.1 VDD V IO = 20 µA, VI = VIH
0.8 x VDD 0.9 x VDD I
O = 4 mA, VI = VIH
Logic Low Output Voltage VOL 0 0.1
V IO = 20 µA, VI = VIL
0.5 0.8 IO = 4 mA, VI = VIL
Switching Specifications
Maximum Data Rate 2 Mbps CL = 15 pF
Pulse Width(7) PW 20 ns VO 50% points; SYNC=0
25 ns VO 50% points; SYNC=1
Propagation Delay Input to Output
(High to Low) tPHL 25 ns CL = 15 pF
Propagation Delay Input to Output
(Low to High) tPLH 25 ns CL = 15 pF
Propagation Delay Enable to Output
(High to High Impedance) tPHZ 5 ns CL = 15 pF
Propagation Delay Enable to Output
(Low to High Impedance) tPLZ 5 ns CL = 15 pF
Propagation Delay Enable to Output
(High Impedance to High) tPZH 5 ns CL = 15 pF
Propagation Delay Enable to Output
(High Impedance to Low) tPZL 5 ns CL = 15 pF
Pulse Width Distortion
(
2
)
PWD 10 ns CL = 15 pF
Propagation Delay Skew
(
3
)
t
PS
K
10 ns CL = 15 pF
Output Rise Time (10%90%) tR 1 3 ns CL = 15 pF
Output Fall Time (10%90%) tF 1 3 ns CL = 15 pF
Common Mode Transient Immunity
(Output Logic High or Logic Low)(4) |CMH|,|CML| 20 30 kV/µs VCM = 300 V
Channel-to-Channel Skew tCSK 3 5 ns CL = 15 pF
SYNC Internal Clock Off Time
(
11
)
t
OFF 5 ns
Dynamic Power Consumption
(
6
140 240 μA/MHz per channel
Magnetic Field Immunity(8) (VDD2= 3V, 3V<VDD1<5.5V)
Power Frequency Magnetic Immunity HPF 1000 1500 A/m 50Hz/60Hz
Pulse Magnetic Field Immunity HPM 1800 2000 A/m t
p
= 8µs
Damped Oscillatory Magnetic Field HOSC 1800 2000 A/m 0.1Hz – 1MHz
Cross-axis Immunity Multiplier
(
9
)
K
X 2.5
IL510/IL511/IL514/IL515/IL516
7
5 Volt Electrical Specifications
Electrical specifications are Tmin to Tmax unless otherwise stated.
Parameters Symbol Min. Typ. Max. Units Test Conditions
DC Specifications
Input Quiescent Supply Current
IL510, IL511, IL515 IDD1 24 40 µA
IL514 2 3 mA
IL516 5 6 mA
Output Quiescent Supply Current
IL510 IDD2 2 3 mA
IL511, IL514, IL516 4 6 mA
IL515 9 12 mA
Logic Input Current II 10 10 µA
Logic High Output Voltage VOH VDD 0.1 VDD V IO = 20 µA, VI = VIH
0.8 x VDD 0.9 x VDD I
O = 4 mA, VI = VIH
Logic Low Output Voltage VOL 0 0.1
V IO = 20 µA, VI = VIL
0.5 0.8 IO = 4 mA, VI = VIL
Switching Specifications
Maximum Data Rate 2 Mbps CL = 15 pF
Pulse Width(7) PW 20 ns VO 50% points; SYNC=0
25 ns VO 50% points; SYNC=1
Propagation Delay Input to Output
(High to Low) tPHL 25 ns CL = 15 pF
Propagation Delay Input to Output
(Low to High) tPLH 25 ns CL = 15 pF
Propagation Delay Enable to Output
(High to High Impedance) tPHZ 5 ns CL = 15 pF
Propagation Delay Enable to Output
(Low to High Impedance) tPLZ 5 ns CL = 15 pF
Propagation Delay Enable to Output
(High Impedance to High) tPZH 5 ns CL = 15 pF
Propagation Delay Enable to Output
(High Impedance to Low) tPZL 5 ns CL = 15 pF
Pulse Width Distortion
(
2
)
PWD 10 ns CL = 15 pF
Propagation Delay Skew
(
3
)
t
PS
K
10 ns CL = 15 pF
Output Rise Time (10%90%) tR 1 3 ns CL = 15 pF
Output Fall Time (10%90%) tF 1 3 ns CL = 15 pF
Common Mode Transient Immunity
(Output Logic High or Logic Low)(4) |CMH|,|CML| 20 30 kV/µs Vcm = 300 V
Channel-to-Channel Skew tCSK 3 5 ns CL = 15 pF
SYNC Internal Clock Off Time
(
11
)
t
OFF 5 ns
Dynamic Power Consumption
(
6
200 340 μA/MHz per channel
Magnetic Field Immunity(8) (VDD2= 5V, 3V<VDD1<5.5V)
Power Frequency Magnetic Immunity HPF 2,800 3,500 A/m 50Hz/60Hz
Pulse Magnetic Field Immunity HPM 4,000 4,500 A/m t
p
= 8 µs
Damped Oscillatory Magnetic Field HOSC 4,000 4,500 A/m 0.1Hz – 1MHz
Cross-axis Immunity Multiplier
(
9
)
K
X 2.5
IL510/IL511/IL514/IL515/IL516
8
Notes (apply to both 3.3 V and 5 V specifications):
1. Absolute maximum ambient operating temperature means the device will not be damaged if operated under these conditions. It does not
guarantee performance.
2. PWD is defined as |tPHL tPLH|. %PWD is equal to PWD divided by pulse width.
3. tPSK is the magnitude of the worst-case difference in tPHL and/or tPLH between devices at 25°C.
4. CMH is the maximum common mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD2. CML is the maximum
common mode input voltage that can be sustained while maintaining VO < 0.8 V. The common mode voltage slew rates apply to both rising
and falling common mode voltage edges.
5. Device is considered a two terminal device: pins on each side of the package are shorted.
6. Dynamic power consumption is calculated per channel and is supplied by the channel’s input side power supply.
7. Minimum pulse width is the minimum value at which specified PWD is guaranteed.
8. The relevant test and measurement methods are given in the Electromagnetic Compatibility section on p. 9.
9. External magnetic field immunity is improved by this factor if the field direction is “end-to-end” rather than to “pin-to-pin” (see diagram on p. 9).
10. If internal clock i s used, devices will re spond to DC stat es on inputs within a maxi mum of 9 µs . O ut p u t s m ay o sc i l la t e i f t he SYNC input slew
rate is less than 1 V/ms.
11. toff is the maximum time for the internal refresh clock to shut down.
IL510/IL511/IL514/IL515/IL516
9
Application Information
Electrostatic Discharge Sensitivity
This product has been tested for electrostatic sensitivity to the
limits stated in the specifications. However, NVE recommends that
all integrated circuits be handled with appropriate care to avoid
damage. Damage caused by inappropriate handling or storage could
range from performance degradation to complete failure.
Electromagnetic Compatibility
IsoLoop Isolators have the lowest EMC footprint of any isolation
technology. IsoLoop Isolators’ Wheatstone bridge configuration
and differential magnetic field signaling ensure excellent EMC
performance against all relevant standards.
Additionally, on the IL510 and IL515, the internal clock can be
disabled for even better EMC performance.
These isolators are fully compliant with generic EMC standards
EN50081, EN50082-1 and the umbrella line-voltage standard for
Information Technology Equipment (ITE) EN61000. NVE has
completed compliance tests in the categories below:
EN50081-1
Residential, Commercial & Light Industrial
Methods EN55022, EN55014
EN50082-2: Industrial Environment
Methods EN61000-4-2 (ESD), EN61000-4-3 (Electromagnetic
Field Immunity), EN61000-4-4 (Electrical Transient Immunity),
EN61000-4-6 (RFI Immunity), EN61000-4-8 (Power Frequency
Magnetic Field Immunity), EN61000-4-9 (Pulsed Magnetic
Field), EN61000-4-10 (Damped Oscillatory Magnetic Field)
ENV50204
Radiated Field from Digital Telephones (Immunity Test)
Immunity to external magnetic fields is even higher if the field
direction is “end-to-end” rather than to “pin-to-pin” as shown in the
diagram below:
Cross-axis Field Direction
Dynamic Power Consumption
IsoLoop Isolators achieve their low power consumption from the
way they transmit data across the isolation barrier. A magnetic field
is created around the GMR Wheatstone bridge by detecting the
edge transitions of the input logic signal and converting them to
narrow current pulses. Depending on the direction of the magnetic
field, the bridge causes the output comparator to switch following
the input logic signal. Since the current pulses are narrow, about
2.5 ns, the power consumption is independent of mark-to-space
ratio and solely dependent on frequency. This has obvious
advantages over optocouplers, which have power consumption
heavily dependent on mark-to-space ratio.
Power Supply Decoupling
Both power supplies to these devices should be decoupled with low
ESR ceramic capacitors of at least 47 nF. Capacitors must be
located as close as possible to the VDD pins.
DC Correctness, EMC, and the SYNC Function
NVE digital isolators have the lowest EMC noise signature of any
high-speed digital isolator on the market today because of the dc
nature of the GMR sensors used. It is perhaps fair to include opto-
couplers in that dc category too, but their limited parametric
performance, physically large size, and wear-out problems
effectively limit side b y side comparisons between NVE’s isolators
and isolators coupled with RF, matched capacitors, or transformers.
IL500-Series isolators has an internal refresh clock which ensure
the synchronization of input and output within 9 μs of the supply
passing the 1.5 V threshold. The IL510 and IL515 allow external
control of the refresh clock through the SYNC pin thereby further
lowering the EMC footprint. This can be advantageous in
applications such as hi-fi, motor control and power conversion.
The isolators can be used with Power on Reset (POR) circuits
common in microcontroller applications, as the means of ensuring
the output of the device is in the same state as the input a short time
after power up. Figure 1 shows a practical Power on Reset circuit:
POR
SET
OUT
SYNC
IN
1
2
3
4
8
6
5
IL510
V
OE
7
V
dd1
V
dd2
Fig. 1. Typical Power On Reset Circuit for IL510
After POR, the SYNC line goes high, the internal clock is disabled,
and the EMC signature is optimized . Decoupling capacitors are
omitted for clarity.
IL510/IL511/IL514/IL515/IL516
10
Illustrative Applications
Isolated A/D Converter
Bridge +
Iso SD Out
Iso CS
Iso SCK
Bridge -
OSC
IL514
CS5532
Clock
Generator
Bridge
Bias
Delta Sigma A/D
SD Out
CS
SCK
SD OE
A delta-sigma A-D converter interfaced with the three-channel IL514. Multiple channels can easily be combined using the IL514’s output enable function.
IL510/IL511/IL514/IL515/IL516
11
12-Bit D/A Converter Isolation
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
OE
OE
OE
SYNC
RESET
Data
Bus
Latch
V
out
12-Bit DAC
3 x IL515
Latch
Latch
SYNC
SYNC
The IL515 fou r-channel iso lator is ideall y suited for para llel bus iso lation. The circuit above uses thre e IL515s to isolat e a 12-bit DAC. The unique SYNC
function automatically synchronizes the outputs to the inputs, ensureing correct data on the is olator outputs. After the reset pulse goes high , data transf er
from input to output is initiated by the leading edge of each changing data bit.
Intelligent DC-DC Converter With Synchronous Rectification
S
D
G
S
D
SD
G
G
Microcontroller
IL511
MOSFET1 MOSFET3
MOSFET2
10 Vdc
A typical primary-side controller uses the IL511 to drive the synchronous rectification signals from primary side to secondary side. IL511 pulse-
width distortion of 10 ns minimizes MOSFET dead time and maximizes efficiency. The ultra-small MSOP package minimizes board area.
IL510/IL511/IL514/IL515/IL516
12
Package Drawings, Dimensions, and Specifications
8-pin MSOP
0.114 (2.90)
0.114 (2.90)
0.016 (0.40)
0.005 (0.13)
0.009 (0.23)
0.027 (0.70)
0.010 (0.25)
0.028 (0.70) 0.002 (0.05)
0.043 (1.10)
0.032 (0.80)
0.006 (0.15)
0.016 (0.40)
0.024 (0.60)
0.189 (4.80)
0.197 (5.00)
0.122 (3.10)
0.122 (3.10)
Pin spacing is a BASIC
dimension; tolerances
do not accumulate
NOTE:
8-pin SOIC Package
0.013 (0.33)
0.020 (0.50)
0.189 (4.8)
0.197 (5.0)
0.150 (3.8)
0.157 (4.0)
Dimensions in inches (mm)
3
2
1
0.228 (5.8)
0.244 (6.2)
0.008 (0.19)
0.010 (0.25)
0.010 (0.25)
0.020 (0.50)
x45º
0º
8º
0.016 (0.40)
0.050 (1.27)
0.040 (1.0)
0.060 (1.5)
0.054 (1.37)
0.069 (1.75)
0.004 (0.10)
0.010 (0.25)
Pin spacing is a BASIC
dimension; tolerances
do not accumulate
NOTE:
IL510/IL511/IL514/IL515/IL516
13
16-pin 0.15" SOIC Package
0.054 (1.4)
0.072 (1.8)
0.040 (1.0)
0.060 (1.5)
0.016 (0.4)
0.050 (1.3)
0.386 (9.8)
0.394 (10.0)
Pin 1 identified
by either an
indent or a
marked dot
NOM
0.228 (5.8)
0.244 (6.2)
0.152 (3.86)
0.157 (3.99)
Dimensions in inches (mm)
0.007 (0.2)
0.013 (0.3)
0.004 (0.1)
0.012 (0.3)
0.040 (1.02)
0.050 (1.27)
0.013 (0.3)
0.020 (0.5)
Pin spacing is a BASIC
dimension; tolerances 
do not accumulate
NOTE:
16-pin 0.3" SOIC Package
NOM
Pin 1 identified by
either an indent
or a marked dot
0.287 (7.29)
0.300 (7.62)
Dimensions in inches (mm)
0.08 (2.0)
0.10 (2.5)
0.092 (2.34)
0.105 (2.67)
0.397 (10.1)
0.413 (10.5)
0.013 (0.3)
0.020 (0.5)
0.394 (10.00)
0.419 (10.64)
0.040 (1.0)
0.060 (1.5) 0.004 (0.1)
0.012 (0.3)
0.007 (0.2)
0.013 (0.3) 0.016 (0.4)
0.050 (1.3)
Pin spacing is a BASIC
dimension; tolerances 
do not accumulate
NOTE:
IL510/IL511/IL514/IL515/IL516
14
Ordering Information
IL 5 16 - 3 E TR13
Bulk Packaging
Blank = Tube
TR7 = 7'' Tape and Reel
TR13 = 13'' Tape and Reel
Package
Blank = 80/20 Tin/Lead Plating
E = RoHS Compliant
Package T ype
-1 = 8-pin MSOP
-3 = 0.15'' 8-pin or 16-pin SOIC (not available for IL515)
Blank = 0.30'' 16-pin SOIC
Channels
10 = 1 Drive Channel
11 = 2 Drive Channels
14 = 2 Drive Channels;
1 Receive Channel
15 = 4 Drive Channels
16 = 2 Drive Channels;
2 Receive Channels
Base Part Number
5 = 2 Mbps, DC-Correct
Product Family
IL = Isolators
RoHS
COMPLIANT
IL510/IL511/IL514/IL515/IL516
15
ISB-DS-001-IL500-I
February 2012
Changes:
Update terms and conditions.
ISB-DS-001-IL500-H Changes:
Added clarification of internal ground connections (p. 4).
ISB-DS-001-IL500-G
Changes:
Clarified SYNC function.
ISB-DS-001-IL500-F
Changes:
Changed pin spacing specification on MSOP drawing.
ISB-DS-001-IL500-E
Changes:
Added EMC details.
ISB-DS-001-IL500-D
Changes:
Add Output Enable to IL515.
IEC 61010-2001 Approval (removed “pending”).
Added 12-bit DAC illustrative application.
ISB-DS-001-IL500-C
Production release
ISB-DS-001-IL500-B
July 2008
Initial release
ISB-DS-001-IL500-A
June 2008
Preliminary release
IL510/IL511/IL514/IL515/IL516
16
Datasheet Limitations
The information and data provided in datasheets shall define the specification of the product as agreed between NVE and its customer, unless NVE and
customer have explicitly agreed otherwise in writing. All specifications are based on NVE test protocols. In no event however, shall an agreement be
valid in which the NVE product is deemed to offer functions and qualities beyond those described in the datasheet.
Limited Warranty and Liability
Information in this document is believed to be accurate and reliable. However, NVE does not give any representations or warranties, expressed or
implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information.
In no event shall NVE be liable for any indirect, incidental, punitive, special or consequential damages (including, without limitation, lost profits, lost
savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on
tort (including negligence), warranty, breach of contract or any other legal theory.
Right to Make Changes
NVE reserves the right to make changes to information published in this document including, without limitation, specifications and product descriptions
at any time and without notice. This document supersedes and replaces all information supplied prior to its publication.
Use in Life-Critical or Safety-Critical Applications
Unless NVE and a customer explicitly agree otherwise in writing, NVE products are not designed, authorized or warranted to be suitable for use in life
support, life-critical or safety-critical devices or equipment. NVE accepts no liability for inclusion or use of NVE products in such applications and such
inclusion or use is at the customer’s own risk. Should the customer use NVE products for such application whether authorized by NVE or not, the
customer shall indemnify and hold NVE harmless against all claims and damages.
Applications
Applications described in this datasheet are illustrative only. NVE makes no representation or warranty that such applications will be suitable for the
specified use without further testing or modification.
Customers are responsible for the design and operation of their applications and products using NVE products, and NVE accepts no liability for any
assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NVE product is suitable and fit for
the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customers. Customers should
provide appropriate design and operating safeguards to minimize the risks associated with their applications and products.
NVE does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party customers. The customer is responsible for all necessary testing for the
customer’s applications and products using NVE products in order to avoid a default of the applications and the products or of the application or use by
customer’s third party customers. NVE accepts no liability in this respect.
Limiting Values
Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the
device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the recommended
operating conditions of the datasheet is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the
quality and reliability of the device.
Terms and Conditions of Sale
In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NVE hereby expressly objects to
applying the customer’s general terms and conditions with regard to the purchase of NVE products by customer.
No Offer to Sell or License
Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication
of any license under any copyrights, patents or other industrial or intellectual property rights.
Export Control
This document as well as the items described herein may be subject to export control regulations. Export might require a prior authorization from national
authorities.
Automotive Qualified Products
Unless the datasheet expressly states that a specific NVE product is automotive qualified, the product is not suitable for automotive use. It is neither
qualified nor tested in accordance with automotive testing or application requirements. NVE accepts no liability for inclusion or use of non-automotive
qualified products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall
use the product without NVE’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the
product for automotive applications beyond NVE’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies
NVE for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NVE’s
standard warranty and NVE’s product specifications.
IL510/IL511/IL514/IL515/IL516
17
An ISO 9001 Certified Company
NVE Corporation
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Eden Prairie, MN 55344-3617 USA
Telephone: (952) 829-9217
Fax: (952) 829-9189
www.nve.com
e-mail: iso-info@nve.com
©NVE Corporation
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
ISB-DS-001-IL500-I February 2012