2953 Bunker Hill Lane, Suite 300, Santa Clara, CA 95054, Phone: (408) 217-7300 Fax: (408) 217-7350, sales@inphi.com
Copyright © 2010−2014 Inphi Corporation. All rights reserved. Inphi is a registered trademark of Inphi Corporation. Document Number: 450108 – 2.0
Functional Description
Functionality Designed to meet the requirements for systems and modules designed to SFF-8431
for both linear and limited
Equalizer capability designed to exceed the requirements of IEEE 802.3aq*
10GBASE-LRM and 10GBASE-KR
XFI interface complies to XFP MSA specifications
Optional support of 1.25 Gbps (IEEE 802.3ae* 1 GE)
Integrated design that does not require external processors or memory
Transmit Path 3 tap pre-empahsis compliant to 10GBASE-KR specifications
Programmable output voltage amplitude
Option to invert the polarity of TX+ and TX- signals
Integrated limiting amplifier with programmable equalizer
Operating range of 9.95 - 11.3 Gbps, 8.5 G, 6.25 G, 4.25 G, 2.5 G, 2.125 G,
1.0625 G, and 1.25 G
Programmable LOS level
Exceeds XFP jitter generation requirements
Receive Path Option of pre-emphasis with level programmability
Integrated EDC with option to bypass
Driver with programmable output voltage amplitude
Option to invert the polarity of RX+ and RX- signals
Integrated AGC controlled by DSP
Operating range of 9.95 - 11.3 Gbps, 8.5 G, 6.25 G, 4.25 G, 2.5 G, 2.125 G,
1.0625 G, and 1.25G
Exceeds XFP jitter generation and jitter tolerance requirements
EDC Optional EDC Equalizer exceeds the comprehensive stressed receiver test described
in 10GBASE-LRM specification
Adaptation algorithm does not require any external processor or memory
Default adaptation algorithm can be field upgradeable
Advanced methods to analyze adaptation success including line SNR
Continuously tracks and adapts to variations in channel characteristics
Physical
Characteristics 12x12mm
121-pin BGA
1.0mm ball pitch
Test and Monitoring Multiple loopback modes
Built-in PRBS generator and checkers
Extensive set of performance and status registers
GPIO pins with user programmable functionality
Registers and status programmable through MDIO, SPI, or I2C management
interface
Serial management interface can be used to reset and read error and statistical
counters
JTA G 1149 Scan support