LMH6639MFX - National Semiconductor

LMH6639

LMH6639 190MHz Rail-to-Rail Output Amplifier with Disable

Literature Number: SNOS989F

LMH6639

October 4, 2010

190MHz Rail-to-Rail Output Amplifier with Disable

General Description

The LMH6639 is a voltage feedback operational amplifier with

a rail-to-rail output drive capability of 110mA. Employing

National’s patented VIP10 process, the LMH6639 delivers a

bandwidth of 190MHz at a current consumption of only

3.6mA. An input common mode voltage range extending to

0.2V below the V− and to within 1V of V+, makes the LMH6639

a true single supply op-amp. The output voltage range ex-

tends to within 30mV of either supply rail providing the user

with a dynamic range that is especially desirable in low volt-

age applications.

The LMH6639 offers a slew rate of 172V/μs resulting in a full

power bandwidth of approximately 28MHz. The LMH6639 al-

so offers protection for the input transistors by using two anti-

parallel diodes and a series resistor connected across the

inputs. The TON value of 83nsec combined with a settling time

of 33nsec makes this device ideally suited for multiplexing

applications (see application note for details). Careful atten-

tion has been paid to ensure device stability under all oper-

ating voltages and modes. The result is a very well behaved

frequency response characteristic for any gain setting includ-

ing +1, and excellent specifications for driving video cables

including harmonic distortion of −60dBc, differential gain of

0.12% and differential phase of 0.045°

Features

(VS = 5V, Typical values unless specified)

■Supply current (no load) 3.6mA

■Supply current (off mode) 400μA

■Output resistance (closed loop 1MHz) 0.186Ω

■−3dB BW (AV = 1) 190MHz

■Settling time 33nsec

■Input common mode voltage −0.2V to 4V

■Output voltage swing 40mV from rails

■Linear output current 110mA

■Total harmonic distortion −60dBc

■Fully characterized for 3V, 5V and ±5V

■No output phase reversal with CMVR exceeded

■Excellent overdrive recovery

■Off Isolation 1MHz −70dB

■Differential Gain 0.12%

■Differential Phase 0.045°

Applications

■Active filters

■CD/DVD ROM

■ADC buffer amplifier

■Portable video

■Current sense buffer

20030246

FIGURE 1. Typical Single Supply Schematic

LMH6639 190MHz Rail-to-Rail Output Amplifier with Disable

Absolute Maximum Ratings (Note 1)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

ESD Tolerance 2KV (Note 2)

200V (Note 9)

VIN Differential ±2.5V

Input Current ±10mA

Supply Voltage (V+ – V−)13.5V

Voltage at Input/Output pins V+ +0.8V, V− −0.8V

Storage Temperature Range −65°C to +150°C

Junction Temperature (Note 4) +150°C

Soldering Information

Infrared or Convection (20 sec) 235°C

Wave Soldering (10 sec) 260°C

Operating Ratings (Note 1)

Supply Voltage (V+ to V−)3V to 12V

Operating Temperature Range (Note 4) −40°C to +85°C

Package Thermal Resistance (θJA) (Note 4)

SOT23-6 265°C/W

SOIC-8 190°C/W

3V Electrical Characteristics

Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 3V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2.

Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

BW −3dB BW AV = +1 120 170 MHz

AV = −1 63

BW0.1dB 0.1dB Gain Flatness RF = 2.65kΩ , RL = 1kΩ, 16.4 MHz

FPBW Full Power Bandwidth AV = +1, VOUT = 2VPP, −1dB

V+ = 1.8V, V− = 1.2V

21 MHz

GBW Gain Bandwidth product AV = +1 83 MHz

enInput-Referred Voltage Noise RF = 33kΩf = 10kHz 19 nV/

f = 1MHz 16

inInput-Referred Current Noise RF = 1MΩf = 10kHz 1.30 pA/

f = 1MHz 0.36

THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = +2,

RL = 1kΩ to V+/2

−50 dBc

TSSettling Time VO = 2VPP, ±0.1% 37 ns

SR Slew Rate AV = −1 (Note 8) 120 167 V/μs

VOS Input Offset Voltage 1.01 5

TC VOS Input Offset Average Drift (Note 11) 8 μV/°C

IBInput Bias Current (Note 7) −1.02 −2.6

−3.5

μA

IOS Input Offset Current 20 800

1000

RIN Common Mode Input

Resistance

AV = +1, f = 1kHz, RS = 1MΩ 6.1 MΩ

CIN Common Mode Input

Capacitance

AV = +1, RS = 100kΩ 1.35 pF

CMVR Input Common-Mode Voltage

Range

CMRR ≥ 50dB −0.3 −0.2

−0.1 V

1.8

1.6

CMRR Common Mode Rejection Ratio (Note 12) 72 93 dB

AVOL Large Signal Voltage Gain VO = 2VPP, RL = 2kΩ to V+/2 80

100

VO = 2VPP, RL = 150Ω to V+/2 74

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LMH6639

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

VOOutput Swing

High

RL = 2kΩ to V+/2, VID = 200mV 2.90 2.98

RL = 150Ω to V+/2, VID = 200mV 2.75 2.93

RL = 50Ω to V+/2, VID = 200mV 2.6 2.85

Output Swing

Low

RL = 2kΩ to V+/2, VID = −200mV 25 75

RL = 150Ω to V+/2, VID = −200mV 75 200

RL = 50Ω to V+/2, VID = −200mV 130 300

ISC Output Short Circuit Current Sourcing to V+/2, (Note 10) 50

120

Sinking to V+/2, (Note 10) 67

140

IOUT Output Current VO = 0.5V from either supply 99 mA

PSRR Power Supply Rejection Ratio (Note 12) 72 96 dB

ISSupply Current (Enabled) No Load 3.5 5.6

7.5 mA

Supply Current (Disabled) 0.3 0.5

0.7

TH_SD Threshold Voltage for Shutdown

Mode

V+−1.59 V

I_SD PIN Shutdown Pin Input Current SD Pin Connect to 0V (Note 7) −13 μA

TON On Time After Shutdown 83 nsec

TOFF Off Time to Shutdown 160 nsec

ROUT Output Resistance Closed Loop RF = 10kΩ, f = 1kHz, AV = −1 27

mΩ

RF = 10kΩ, f = 1MHz, AV = −1 266

5V Electrical Characteristics

Unless otherwise specified, all limits guaranteed for at TJ = 25°C, V+ = 5V, V− = 0V, VO = VCM = V+/2, and RL = 2kΩ to V+/2.

Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

BW −3dB BW AV = +1 130 190 MHz

AV = −1 64

BW0.1dB 0.1dB Gain Flatness RF = 2.51kΩ, RL = 1kΩ, 16.4 MHz

FPBW Full Power Bandwidth AV = +1, VOUT = 2VPP, −1dB 28 MHz

GBW Gain Bandwidth Product AV = +1 86 MHz

enInput-Referred Voltage Noise RF = 33kΩf = 10kHz 19 nV/

f = 1MHz 16

inInput-Referred Current Noise RF = 1MΩf = 10KHz 1.35 pA/

f = 1MHz 0.35

THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = +2

RL = 1kΩ to V+/2 −60 dBc

DG Differential Gain NTSC, AV = +2

RL = 150Ω to V+/2 0.12 %

DP Differential Phase NTSC, AV = +2

RL = 150Ω to V+/2 0.045 deg

TSSettling Time VO = 2VPP, ±0.1% 33 ns

SR Slew Rate AV = −1, (Note 8) 130 172 V/µs

VOS Input Offset Voltage 1.02 5

7mV

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LMH6639

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

TC VOS Input Offset Average Drift (Note 11) 8 µV/°C

IBInput Bias Current (Note 7) −1.2 −2.6

−3.25

µA

IOS Input Offset Current 20 800

1000

RIN Common Mode Input

Resistance

AV = +1, f = 1kHz, RS = 1MΩ 6.88 MΩ

CIN Common Mode Input

Capacitance

AV = +1, RS = 100kΩ 1.32 pF

CMVR Common-Mode Input Voltage

Range

CMRR ≥ 50dB −0.3 −0.2

−0.1 V

4 3.8

3.6

CMRR Common Mode Rejection Ratio (Note 12) 72 95 dB

AVOL Large Signal Voltage Gain VO = 4VPP

RL = 2kΩ to V+/2

100

VO = 3.75VPP

RL = 150Ω to V+/2

VOOutput Swing

High

RL = 2kΩ to V+/2, VID = 200mV 4.90 4.97

RL = 150Ω to V+/2, VID = 200mV 4.65 4.90

RL = 50Ω to V+/2, VID = 200mV 4.40 4.77

Output Swing

Low

RL = 2kΩ to V+/2, VID = −200mV 25 100

RL = 150Ω to V+/2, VID = −200mV 85 200

RL = 50Ω to V+/2, VID = −200mV 190 400

ISC Output Short Circuit Current Sourcing to V+/2, (Note 10) 100

160

Sinking from V+/2, (Note 10) 120

190

IOUT Output Current VO = 0.5V from either supply 110 mA

PSRR Power Supply Rejection Ratio (Note 12) 72 96 dB

ISSupply Current (Enabled) No Load 3.6 5.8

8.0 mA

Supply Current (Disabled) 0.40 0.8

1.0

TH_SD Threshold Voltage for Shutdown

Mode

V+ −1.65 V

I_SD PIN Shutdown Pin Input Current SD Pin Connected to 0V (Note 7) −30 μA

TON On Time after Shutdown 83 nsec

TOFF Off Time to Shutdown 160 nsec

ROUT Output Resistance Closed Loop RF = 10kΩ, f = 1kHz, AV = −1 29

mΩ

RF = 10kΩ, f = 1MHz, AV = −1 253

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LMH6639

±5V Electrical Characteristics

Unless otherwise specified, all limits guaranteed for at TJ = 25°C, VSUPPLY = ±5V, VO = VCM = GND, and RL = 2kΩ to V+/2.

Boldface limits apply at the temperature extremes.

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

BW −3dB BW AV = +1 150 228 MHz

AV = −1 65

BW0.1dB 0.1dB Gain Flatness RF = 2.26kΩ, RL = 1kΩ 18 MHz

FPBW Full Power Bandwidth AV = +1, VOUT = 2VPP, −1dB 29 MHz

GBW Gain Bandwidth Product AV = +1 90 MHz

enInput-Referred Voltage Noise RF = 33kΩf = 10kHz 19 nV/

f = 1MHz 16

inInput-Referred Current Noise RF = 1MΩf = 10kHz 1.13 pA/

f = 1MHz 0.34

THD Total Harmonic Distortion f = 5MHz, VO = 2VPP, AV = +2,

RL = 1kΩ −71.2 dBc

DG Differential Gain NTSC, AV = +2

RL = 150Ω 0.11 %

DP Differential Phase NTSC, AV = +2

RL = 150Ω 0.053 deg

TSSettling Time VO = 2VPP, ±0.1% 33 ns

SR Slew Rate AV = −1 (Note 8) 140 200 V/µs

VOS Input Offset Voltage 1.03 5

TC VOS Input Offset Voltage Drift (Note 11) 8 µV/°C

IBInput Bias Current (Note 7) −1.40 −2.6

−3.25

µA

IOS Input Offset Current 20 800

1000

RIN Common Mode Input

Resistance

AV +1, f = 1kHz, RS = 1MΩ 7.5 MΩ

CIN Common Mode Input

Capacitance

AV = +1, RS = 100kΩ 1.28 pF

CMVR Common Mode Input Voltage

Range

CMRR ≥ 50dB −5.3 −5.2

−5.1 V

3.8

3.6

4.0

CMRR Common Mode Rejection Ratio (Note 12) 72 95 dB

AVOL Large Signal Voltage Gain VO = 9VPP, RL = 2kΩ88

100

VO = 8VPP, RL = 150Ω 74

VOOutput Swing

High

RL = 2kΩ, VID = 200mV 4.85 4.96

RL = 150Ω, VID = 200mV 4.55 4.80

RL = 50Ω, VID = 200mV 3.60 4.55

Output Swing

Low

RL = 2kΩ, VID = −200mV −4.97 −4.90

RL = 150Ω, VID = −200mV −4.85 −4.55

RL = 50Ω, VID = −200mV −4.65 −4.30

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LMH6639

Symbol Parameter Conditions Min

(Note 6)

Typ

(Note 5)

Max

(Note 6)

Units

ISC Output Short Circuit Current Sourcing to Ground, (Note 10) 100

168

Sinking to Ground, (Note 10) 110

190

IOUT Output Current VO = 0.5V from either supply 112 mA

PSRR Power Supply Rejection Ratio (Note 12) 72 96 dB

ISSupply Current (Enabled) No Load 4.18 6.5

8.5 mA

Supply Current (Disabled) 0.758 1.0

1.3

TH_SD Threshold Voltage for Shutdown

Mode

V+ − 1.67 V

I_SD PIN Shutdown Pin Input Current SD Pin Connected to −5V (Note 7) −84 μA

TON On Time after Shutdown 83 nsec

TOFF Off Time to Shutdown 160 nsec

ROUT Output Resistance Closed Loop RF = 10kΩ, f = 1kHz, AV = −1 32

mΩ

RF = 10kΩ, f = 1MHz, AV = −1 226

Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is

intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.

Note 2: Human body model, 1.5kΩ in series with 100pF.

Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the

maximum allowed junction temperature of 150°C.

Note 4: The maximum power dissipation is a function of TJ(MAX), θJA, and TA. The maximum allowable power dissipation at any ambient temperature is

PD = (TJ(MAX) - TA)/ θJA . All numbers apply for packages soldered directly onto a PC board.

Note 5: Typical values represent the most likely parametric norm.

Note 6: All limits are guaranteed by testing or statistical analysis.

Note 7: Positive current corresponds to current flowing into the device.

Note 8: Slew rate is the average of the rising and falling slew rates.

Note 9: Machine Model, 0Ω in series with 200pF.

Note 10: Short circuit test is a momentary test.

Note 11: Offset voltage average drift determined by dividing the change in VOS at temperature extremes into the total temperature change.

Note 12: f ≤ 1kHz (see typical performance Characteristics)

Connection Diagrams

SOT23-6

20030201

Top View

SOIC-8

20030202

Top View

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LMH6639

Ordering Information

Package Part Number Package Marking Transport Media NSC Drawing

6-Pin SOT-23 LMH6639MF A81A 1k Units Tape and Reel MF06A

LMH6639MFX 3k Units Tape and Reel

8-Pin SOIC LMH6639MA LMH6639MA Rails M08A

LMH6639MAX 2.5k Units Tape and Reel

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LMH6639

Typical Performance Characteristics At TJ = 25°C, V+ = +2.5, V− = −2.5V, RF = 330Ω for AV = +2, RF =

1kΩ for AV = −1. Unless otherwise specified.

Output Sinking Saturation Voltage vs. IOUT

for Various Temperature

20030239

Output Sourcing Saturation Voltage vs. IOUT

for Various Temperature

20030237

Positive Output Saturation Voltage vs. VSUPPLY

for Various Temperature

20030233

Negative Output Saturation Voltage vs. VSUPPLY

for Various Temperature

20030234

VOUT from V+ vs. ISOURCE

20030238

VOUT from V− vs. ISINK

20030236

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LMH6639

IOS vs. VS for Various Temperature

20030232

VOS vs. VS for 3 Representative Units

20030245

VOS vs. VS for 3 Representative Units

20030244

VOS vs. VS for 3 Representative Units

20030243

VOS vs. VS for 3 Representative Units

20030242

ISUPPLY vs. VCM for Various Temperature

20030240

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LMH6639

ISUPPLY vs. VS for Various Temperature

20030241

IB vs. VS for Various Temperature

20030235

Bandwidth for Various VS

20030206

Bandwidth for Various VS

20030205

Gain vs. Frequency Normalized

20030207

Gain vs. Frequency Normalized

20030208

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LMH6639

0.1dB Gain Flatness

20030209

Gain and phase vs.

Frequency for Various Temperature

20030204

Frequency Response vs. Temperature

20030210

Harmonic Distortion

20030269

Differential Gain/Phase

20030270

On-Off Switching DC Voltage

20030211

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LMH6639

On-Off Switching 10MHz

20030212

Slew Rate (Positive)

20030214

Slew Rate (Negative)

20030213

On-Off Switching of Sinewave

20030215

Power Sweep

20030216

CMRR vs. Frequency

20030218

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LMH6639

PSRR vs. Frequency

20030217

Current Noise

20030220

Voltage Noise

20030219

Closed Loop Output Resistance vs. Frequency

20030221

Off Isolation

20030222

Small Signal Pulse Response (AV = +1, RL = 2k )

20030250

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LMH6639

Small Signal Pulse Response (AV = −1)

20030249

Large Signal Pulse Response (RL = 2k)

20030226

Large Signal Pulse Response

20030227

Large Signal Pulse Response

20030228

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LMH6639

Application Notes

INPUT AND OUTPUT TOPOLOGY

All input / output pins are protected against excessive volt-

ages by ESD diodes connected to V+ and V- rails (see Figure

2). These diodes start conducting when the input / output pin

voltage approaches 1Vbe beyond V+ or V- to protect against

over voltage. These diodes are normally reverse biased. Fur-

ther protection of the inputs is provided by the two resistors

(R in Figure 2), in conjunction with the string of anti-parallel

diodes connected between both bases of the input stage. The

combination of these resistors and diodes reduces excessive

differential input voltages approaching 2Vbe. The most com-

mon situation when this occurs is when the device is put in

shutdown and the LMH6639’s inputs no longer follow each

other. In such a case, the diodes may conduct. As a conse-

quence, input current increases, and a portion of signal may

appear at the Hi-Z output. Another possible situation for the

conduction of these diodes is when the LMH6639 is used as

a comparator (or with little or no feedback). In either case, it

is important to make sure that the subsequent current flow

through the device input pins does not violate the Absolute

Maximum Ratings of the device. To limit the current through

the protection circuit extra series resistors can be placed. To-

gether with the build in series resistors of several hundred

ohms this extra resistors can limit the input current to a safe

number depending on the used application. Be aware of the

effect that extra series resistors may impact the switching

speed of the device. A special situation occurs when the part

is configured for a gain of +1, which means the output is di-

rectly connected to the inverting input, see Figure 3. When

the part is now placed in shutdown mode the output comes in

a high impedance state and is unable to keep the inverting

input at the same level as the non-inverting input. In many

applications the output is connected to the ground via a low

impedance resistor. When this situation occurs and there is a

DC voltage offset of more than 2 volt between the non-invert-

ing input and the output, current flows from the non-inverting

input through the series resistors R via the bypass diodes to

the output. Now the input current becomes much bigger than

expected and in many cases the source at the input cannot

deliver this current and will drop down. Be sure in this situation

that no DC current path is available from the non-inverting

input to the output pin, or from the output pin to the load re-

sistor. This DC path is drawn by a curved line and can be

broken by placing one of the capacitors CIN or COUT or both,

depending on the used application.

20030274

FIGURE 2. Input Topology

20030275

FIGURE 3. DC path while in shutdown

MULTIPLEXING 5 AND 10MHz

The LMH6639 may be used to implement a circuit which mul-

tiplexes two signals of different frequencies. Three LMH6639

high speed op-amps are used in the circuit of Figure 4 to ac-

complish the multiplexing function. Two LMH6639 are used

to provide gain for the input signals, and the third device is

used to provide output gain for the selected signal.

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LMH6639

20030247

Note: Pin numbers pertain to SOIC-8 package

FIGURE 4. Multiplexer

Multiplexing signals “FREQ 1” and “FREQ 2” exhibit closed

loop non-inverting gain of +2 each based upon identical

330Ω resistors in the gain setting positions of IC1 and IC2.

The two multiplexing signals are combined at the input of IC3,

which is the third LMH6639. This amplifier may be used as a

unity gain buffer or may be used to set a particular gain for

the circuit.

20030248

FIGURE 5. Switching between 5 and 10MHz

1k resistors are used to set an inverting gain of −1 for IC3 in

the circuit of Figure 4. Figure 5 illustrates the waveforms pro-

duced. The upper trace shows the switching waveform used

to switch between the 5MHz and 10MHz multiplex signals.

The lower trace shows the output waveform consisting of

5MHz and 10MHz signals corresponding to the high or low

state of the switching signal.

In the circuit of Figure 4, the outputs of IC1 and IC2 are tied

together such that their output impedances are placed in par-

allel at the input of IC3. The output impedance of the disabled

amplifier is high compared both to the output impedance of

the active amplifier and the 330Ω gain setting resistors. The

closed loop output resistance for the LMH6639 is around

0.2Ω. Thus the active state amplifier output impedance dom-

inates the input node to IC3, while the disabled amplifier is

assured of a high level of suppression of unwanted signals

which might be present at the output.

SHUTDOWN OPERATION

With SD pin left floating, the device enters normal operation.

However, since the SD pin has high input impedance, it is best

tied to V+ for normal operation. This will avoid inadvertent

shutdown due to capacitive pick-up from nearby nodes.

LMH6639 will typically go into shutdown when SD pin is more

than 1.7V below V+, regardless of operating supplies.

The SD pin can be driven by push-pull or open collector (open

drain) output logic. Because the LMH6639's shutdown is ref-

erenced to V+, interfacing to the shutdown logic is rather

simple, for both single and dual supply operation, with either

form of logic used. Typical configurations are shown in Figure

6 and Figure 7 below for push-pull output:

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LMH6639

20030271

FIGURE 6. Shutdown Interface (Single Supply)

20030272

FIGURE 7. Shutdown Interface (Dual Supplies)

Common voltages for logic gates are +5V or +3V. To ensure

proper power on/off with these supplies, the logic should be

able to swing to 3.4V and 1.4V minimum, respectively.

LMH6639’s shutdown pin can also be easily controlled in ap-

plications where the analog and digital sections are operated

at different supplies. Figure 8 shows a configuration where a

logic output, SD, can turn the LMH6639 on and off, indepen-

dent of what supplies are used for the analog and the digital

sections:

20030273

FIGURE 8. Shutdown Interface (Single Supply, Open

Collector Logic)

The LMH6639 has an internal pull-up resistor on SD such that

if left un-connected, the device will be in normal operation.

Therefore, no pull-up resistor is needed on this pin. Another

common application is where the transistor in Figure 8 above,

would be internal to an open collector (open drain) logic gate;

the basic connections will remain the same as shown.

PCB LAYOUT CONSIDERATION AND COMPONENTS

SELECTION

Care should be taken while placing components on a PCB.

All standard rules should be followed especially the ones for

high frequency and/ or high gain designs. Input and output

pins should be separated to reduce cross-talk, especially un-

der high gain conditions. A groundplane will be helpful to

avoid oscillations. In addition, a ground plane can be used to

create micro-strip transmission lines for matching purposes.

Power supply, as well as shutdown pin de-coupling will re-

duce cross-talk and chances of oscillations.

Another important parameter in working with high speed am-

plifiers is the component values selection. Choosing high

value resistances reduces the cut-off frequency because of

the influence of parasitic capacitances. On the other hand

choosing the resistor values too low could "load down" the

nodes and will contribute to higher overall power dissipation.

Keeping resistor values at several hundreds of ohms up to

several kΩ will offer good performance.

National Semiconductor suggests the following evaluation

boards as a guide for high frequency layout and as an aid in

device testing and characterization:

Device Package Evaluation Board

LMH6639MA 8-Pin SOIC CLC730027

LMH6639MF SOT23-6 CLC730116

These free evaluation boards are shipped when a device

sample request is placed with National Semiconductor. For

normal operation, tie the SD pin to V+.

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LMH6639

Physical Dimensions inches (millimeters) unless otherwise noted

6-Pin SOT23

NS Package Number MF06A

8-Pin SOIC

NS Package Number M08A

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LMH6639

Notes

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LMH6639

Notes

LMH6639 190MHz Rail-to-Rail Output Amplifier with Disable

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