IR11672AS
1
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© 2013 International Rectifier
Nov 6, 2013
ADVANCED SMARTRECTIFIERTM CONTROL IC
Features
Secondary side high speed SR controller
DCM, CrCM flyback and Resonant half-bridge
topologies
200 V proprietary IC technology
Max 500 KHz switching frequency
Anti-bounce logic and UVLO protection
7 A peak turn off drive current
Micropower start-up & ultra low quiescent current
10.7 V gate drive clamp
50ns turn-off propagation delay
Vcc range from 11.3 V to 20 V
Direct sensing of MOSFET drain voltage
Enable function synchronized with MOSFET VDS
transition
Cycle by Cycle MOT Check Circuit prevents
multiple false trigger GATE pulses
Lead-free
Compatible with 0.3 W Standby, Energy Star,
CECP, etc.
Typical Applications
LCD & PDP TV, Telecom SMPS, AC-DC
adapters, ATX SMPS, Server SMPS
Product Summary
Topology
VD
VOUT
Io+ & I o- (typ.)
Turn on Propagation
Delay (typ.)
Turn off Propagation
Delay (typ.)
Package Options
8-Lead SOIC
Ordering Information
Base Part Number
Package Type
Standard Pack
Complete Part Number
Form
Quantity
IR11672AS
SOIC8N
Tube/Bulk
95
IR11672ASPBF
Tape and Reel
2500
IR11672ASTRPBF
IR11672AS
2
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© 2013 International Rectifier
Nov 6, 2013
Typical Connection Diagram
RMOT
Cdc
Rg
VD 5
VS 6
MOT
3OVT
2
EN
4
GND 7
VGATE 8
VCC
1U1
IR11671
Q1
XFM
Co
LOAD
Rdc
Vin
Rtn
Ci
Rs
Cs
IR11672AS
IR11672AS
3
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© 2013 International Rectifier
Nov 6, 2013
Table of Contents
Page
Ordering Information
1
Description
4
Absolute Maximum Ratings
5
Electrical Characteristics
6
Functional Block Diagram
8
Input / Output Pin Equivalent Circuit Diagram
9
Lead Definitions
10
Lead Assignments
10
Detailed Pin Description
11
Application Information and Additional Details
12
Package Details
23
Tape and Reel Details
24
Part Marking Information
25
Qualification Information
26
IR11672AS
4
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© 2013 International Rectifier
Nov 6, 2013
Description
IR11672A is a smart secondary-side driver IC designed to drive N-Channel power MOSFETs used as
synchronous rectifiers in isolated Flyback and resonant half-bridge converters. The IC can control one or more
paralleled N-MOSFETs to emulate the behavior of Schottky diode rectifiers. The drain to source voltage is sensed
differentially to determine the polarity of the current and turn the power switch on and off in proximity of the zero
current transition. The cycle-by-cycle MOT protection circuit can automatically detect no load condition and turn off
gate driver output to avoid negative current flowing through the MOSFETs. Ruggedness and noise immunity are
accomplished using an advanced blanking scheme and double-pulse suppression which allow reliable operation in
all operating modes.
IR11672AS
5
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© 2013 International Rectifier
Nov 6, 2013
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Parameters
Symbol
Min.
Max.
Units
Remarks
Supply Voltage
VCC
-0.3
20
V
Enable Voltage
VEN
-0.3
20
Cont. Drain Sense Voltage
VD
-3
200
Pulse Drain Sense Voltage
VD
-5
200
Source Sense Voltage
VS
-3
20
Gate Voltage
VGATE
-0.3
20
VCC=20V, Gate off
Operating Junction Temperature
TJ
-40
150
°C
Storage Temperature
TS
-55
150
Thermal Resistance
R
128
°C/W
SOIC-8
Package Power Dissipation
PD
970
mW
SOIC-8, TAMB=25°C
Switching Frequency
fsw
500
kHz
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
Definition
Min.
Max.
Units
VCC
Supply voltage
11.4
18
V
VD
Drain Sense Voltage
-3
200
TJ
Junction Temperature
-25
125
°C
Fsw
Switching Frequency
---
500
kHz
Recommended Component Values
Symbol
Component
Min.
Max.
Units
RMOT
MOT pin resistor value
5
75
k
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6
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© 2013 International Rectifier
Nov 6, 2013
Electrical Characteristics
VCC=15 V and TA = 25 °C unless otherwise specified. The output voltage and current (VO and IO) parameters are
referenced to GND (pin7).
Supply Section
Parameters
Symbol
Min.
Typ.
Max.
Units
Remarks
Supply Voltage Operating
Range
VCC
11.4
18
V
GBD
VCC Turn On Threshold
VCC ON
9.8
10.55
11.3
VCC Turn Off Threshold
VCC UVLO
8.4
9
9.7
(Under Voltage Lock Out)
VCC Turn On/Off Hysteresis
VCC HYST
1.55
Operating Current
ICC
8.5
10
mA
CLOAD=1nF,fSW=400kHz
50
65
CLOAD=10nF,fSW=400kHz
Quiescent Current
IQCC
1.8
2.2
Start-up Current
ICC START
100
200
µA
VCC=VCC ON - 0.1V
Sleep Current
I SLEEP
150
200
VEN=0V, VCC =15V
Enable Voltage High
VENHI
2.15
2.70
3.2
V
Enable Voltage Low
VENLO
1.2
1.6
2.0
Enable Pull-up Resistance
REN
1.5
M
GBD
Comparator Section
Parameters
Symbol
Min.
Typ.
Max.
Units
Remarks
Turn-off Threshold
VTH1
-7
-3.5
0
mV
OVT = 0V, VS=0V
-14
-9.5
-6
OVT floating, VS=0V
-22
-18
-14
OVT = VCC, VS=0V
Turn-on Threshold
VTH2
-150
-50
Hysteresis
VHYST
55
Input Bias Current
IIBIAS1
1
7.5
µA
VD = -50mV
IIBIAS2
30
100
VD = 200V
Comparator Input Offset
VOFFSET
2
mV
GBD
Input CM Voltage Range
VCM
-0.15
2
V
One-Shot Section
Parameters
Symbol
Min.
Typ.
Max.
Units
Remarks
Blanking pulse duration
tBLANK
9
17
25
µs
Reset Threshold
VTH3
2.5
V
VCC=10V – GBD
5.4
VCC=20V – GBD
Hysteresis
VHYST3
40
mV
VCC=10V – GBD
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7
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© 2013 International Rectifier
Nov 6, 2013
Electrical Characteristics
VCC=15 V and TA = 25 °C unless otherwise specified. The output voltage and current (VO and IO) parameters are
referenced to GND (pin7).
Minimum On Time Section
Parameters
Symbol
Min.
Typ.
Max.
Units
Remarks
Minimum on time
TONmin
190
240
290
ns
RMOT =5kVCC=12V
2.48
3.1
3.72
µs
RMOT =75kVCC=12V
Gate Driver Section
Parameters
Symbol
Min.
Typ.
Max.
Units
Remarks
Gate Low Voltage
VGLO
0.3
0.5
V
IGATE = 200mA
Gate High Voltage
VGTH
9.0
10.7
12.5
VCC=12V-18V
(internally clamped)
Rise Time
tr1
18
ns
CLOAD = 1nF, VCC=12V
tr2
125
CLOAD = 10nF, VCC=12V
Fall Time
tf1
10
CLOAD = 1nF, VCC=12V
tf2
30
CLOAD = 10nF, VCC=12V
Turn on Propagation Delay
tDon
60
95
VDS to VGATE -100mV overdrive
Turn off Propagation Delay
tDoff
50
75
VDS to VGATE -100mV overdrive
Pull up Resistance
rup
4

IGATE = 1A – GBD
Pull down Resistance
rdown
0.7
IGATE = -200mA
Output Peak Current(source)
IO source
2
A
CLOAD = 10nF – GBD
Output Peak Current (sink)
IO sink
7
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8
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© 2013 International Rectifier
Nov 6, 2013
Functional Block Diagram
UVLO
&
REGULATOR
VD
VCC
VTH1
GND
EN
VGATE
VS
VTH3
VTH1
VTH2 VTH3
Vgate
VDS
MOT
OVT
VCC
Min OFF Time
RESET
Min ON Time
RESET
DRIVER
VCC
Cycle by Cycle
MOT Check
Circuit
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9
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© 2013 International Rectifier
Nov 6, 2013
I/O Pin Equivalent Circuit Diagram
VCC
GND
MOT
OVT
ESD
Diode
ESD
Diode
RESD
VCC
GND
EN
ESD
Diode
ESD
Diode
RESD
VD
GND
ESD
Diode
200V
Diode
RESD
VCC
GND
GATE
ESD
Diode
ESD
Diode
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10
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© 2013 International Rectifier
Nov 6, 2013
Lead Definitions
PIN#
Symbol
Description
1
VCC
Supply Voltage
2
OVT
Offset Voltage Trimming
3
MOT
Minimum On Time
4
EN
Enable
5
VD
FET Drain Sensing
6
VS
FET Source Sensing
7
GND
Ground
8
VGATE
Gate Drive Output
Lead Assignments
VD
GND
VGATE
VS
VCC
MOT
EN
OVT
4
3
2
1
5
6
7
8
IR11672S
IR11672AS
11
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© 2013 International Rectifier
Nov 6, 2013
Detailed Pin Description
VCC: Power Supply
This is the supply voltage pin of the IC and it is monitored by the under voltage lockout circuit. It is possible to turn off the IC by
pulling this pin below the minimum turn off threshold voltage, without damage to the IC.
To prevent noise problems, a bypass ceramic capacitor connected to Vcc and COM should be placed as close as possible to
the IR11672A. This pin is internally clamped.
OVT: Offset Voltage Trimming
The OVT pin will program the amount of input offset voltage for the turn-off threshold VTH1.
The pin can be optionally tied to ground, to VCC or left floating, to select 3 ranges of input offset trimming.
This programming feature allows for accommodating different RDSon MOSFETs.
MOT: Minimum On Time
The MOT programming pin controls the amount of minimum on time. Once VTH2 is crossed for the first time, the gate signal will
become active and turn on the power FET. Spurious ringings and oscillations can trigger the input comparator off. The MOT
blanks the input comparator keeping the FET on for a minimum time.
The MOT is programmed between 200ns and 3us (typ.) by using a resistor referenced to COM.
EN: Enable
This pin is used to activate the IC “sleep” mode by pulling the voltage level below 1.6V (typ). In sleep mode the IC will consume
a minimum amount of current. All switching functions will be disabled and the gate will be inactive. The EN pin voltage cannot
linger between the Enable low and Enable high thresholds. The pin is intended to operate as a switch with the pin voltage either
above or below the threshold range. The Enable control pin (EN) is not intended to operate at high frequency. For proper
operation, EN positive pulse width needs to be longer than 20µs, EN negative pulse width needs to be longer than 10µs.
Please refer to Figure 12B for the definition of EN pulse width.
VD: Drain Voltage Sense
VD is the voltage sense pin for the power MOSFET Drain. This is a high voltage pin and particular care must be taken in
properly routing the connection to the power MOSFET drain.
Additional filtering and or current limiting on this pin are not recommended as it would limit switching performance of the IC.
VS: Source Voltage Sense
VS is the differential sense pin for the power MOSFET Source. This pin must not be connected directly to the power ground pin
(7) but must be used to create a Kelvin contact as close as possible to the power MOSFET source pin.
GND: Ground
This is ground potential pin of the integrated control circuit. The internal devices and gate driver are referenced to this point.
VGATE: Gate Drive Output
This is the gate drive output of the IC. Drive voltage is internally limited and provides 2A peak source and 7A peak sink
capability. Although this pin can be directly connected to the power MOSFET gate, the use of minimal gate resistor is
recommended, especially when putting multiple FETs in parallel.
Care must be taken in order to keep the gate loop as short and as small as possible in order to achieve optimal switching
performance.
IR11672AS
12
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© 2013 International Rectifier
Nov 6, 2013
Application Information and Additional Details
State Diagram
UVLO/Sleep Mode
The IC remains in the UVLO condition until the voltage on the VCC pin exceeds the VCC turn on threshold voltage, VCC
ON. During the time the IC remains in the UVLO state, the gate drive circuit is inactive and the IC draws a quiescent
current of ICC START. The UVLO mode is accessible from any other state of operation whenever the IC supply voltage
condition of VCC < VCC UVLO occurs.
The sleep mode is initiated by pulling the EN pin below 1.6V (typ). In this mode the IC is essentially shut down and draws
a very low quiescent supply current.
Normal Mode and Synchronized Enable Function
The IC enters in normal operating mode once the UVLO voltage has been exceeded and the EN voltage is above VENHI
threshold. When the IC enters the Normal Mode from the UVLO Mode, the GATE output is disabled (stays low) until VDS
exceeds VTH3 to activate the gate. This ensures that the GATE output is not enabled in the middle of a switching cycle.
This logic prevents any reverse currents across the device due to the minimum on time function in the IC. The gate will
continuously drive the SR MOSFET after this one-time activation. The Cycle by Cycle MOT protection circuit is enabled in
Normal Mode.
MOT Protection Mode
If the secondary current conduction time is shorter than the MOT (Minimum On Time) setting, the next driver output is
disabled. This function can avoid reverse current that occurs when the system works at very low duty-cycles or at very
light/no load conditions and reduce system standby power consumption by disabling GATE outputs. The Cycle by Cycle
MOT Check circuit is always activated under Normal Mode and MOT Protection Mode, so that the IC can automatically
resume normal operation once the load increases to a level and the secondary current conduction time is longer than
MOT.
POWER ON
Gate Inactive
UVLO MODE
VCC < VCCon
Gate Inactive
ICC max = 200uA
NORMAL
Gate Active
Gate PW ≥ MOT
Cycle by Cycle MOT Check Enabled
VCC > VCCon,
ENABLE HIGH &
VDS>VTH3 VCC < VCCuvlo
or
ENABLE LOW
MOT PROTECTION
MODE
Gate Output Disabled
VDS>VTH1 @ MOT VDS<VTH1 @ MOT
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© 2013 International Rectifier
Nov 6, 2013
General Description
The IR11672A Smart Rectifier IC can emulate the operation of diode rectifier by properly driving a Synchronous Rectifier (SR)
MOSFET. The direction of the rectified current is sensed by the input comparator using the power MOSFET RDSon as a shunt
resistance and the GATE pin of the MOSFET is driven accordingly. Internal blanking logic is used to prevent spurious
transitions and guarantee operation in continuous (CCM), discontinuous (DCM) and critical (CrCM) conduction mode.
IR11672A is suitable for Flyback and Resonant Half-Bridge topologies.
Figure 1: Input comparator thresholds
Flyback Application
The modes of operation for a Flyback circuit differ mainly for the turn-off phase of the SR switch, while the turn-on phase of the
secondary switch (which corresponds to the turn off of the primary side switch) is identical.
Turn-on phase
When the conduction phase of the SR FET is initiated, current will start flowing through its body diode, generating a negative
VDS voltage across it. The body diode has generally a much higher voltage drop than the one caused by the MOSFET on
resistance and therefore will trigger the turn-on threshold VTH2.
At that point the IR11672A will drive the gate of MOSFET on which will in turn cause the conduction voltage VDS to drop down.
This drop is usually accompanied by some amount of ringing, that can trigger the input comparator to turn off; hence, a
Minimum On Time (MOT) blanking period is used that will maintain the power MOSFET on for a minimum amount of time.
The programmed MOT will limit also the minimum duty cycle of the SR MOSFET and, as a consequence, the max duty cycle of
the primary side switch.
DCM/CrCM Turn-off phase
Once the SR MOSFET has been turned on, it will remain on until the rectified current will decay to the level where VDS will cross
the turn-off threshold VTH1. This will happen differently depending on the mode of operation.
In DCM the current will cross the threshold with a relatively low dI/dt. Once the threshold is crossed, the current will start flowing
again thru the body diode, causing the VDS voltage to jump negative. Depending on the amount of residual current, VDS may
trigger once again the turn on threshold: for this reason VTH2 is blanked for a certain amount of time (TBLANK) after VTH1 has been
triggered.
The blanking time is internally set. As soon as VDS crosses the positive threshold VTH3 also the blanking time is terminated and
the IC is ready for next conduction cycle.
VGate
VTH1
VTH2VTH3
VDS
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Nov 6, 2013
Figure 2: Primary and secondary currents and voltages for DCM mode
Figure 3: Primary and secondary currents and voltages for CrCM mode
CCM Turn-off phase
In CCM mode the turn off transition is much steeper and dI/dt involved is much higher. The turn on phase is identical to DCM
or CrCM and therefore won’t be repeated here.
During the SR FET conduction phase the current will decay linearly, and so will VDS on the SR FET.
Once the primary switch will start to turn back on, the SR FET current will rapidly decrease crossing VTH1 and turning the gate
off. The turn off speed is critical to avoid cross conduction on the primary side and reduce switching losses.
Also in this case a blanking period will be applied, but given the very fast nature of this transition, it will be reset as soon as
VDS crosses VTH3.
IPRIM
ISEC
VSEC
VPRIM
time
time
T1 T2 T3
IPRIM
ISEC
VSEC
VPRIM
time
time
T1 T2
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Nov 6, 2013
Figure 4: Primary and secondary currents and voltages for CCM mode
The operation waveforms of IR11672A in a flyback converter under CCM mode and DCM/CrCM were shown in Figure 5 and
Figure 6 respectively.
Figure 5: Secondary side CCM operation
IPRIM
ISEC
VSEC
VPRIM
time
time
T1 T2
ISEC
VDS
time
time
T1 T2
VTH1
VTH2
VTH3
Blanking
MOT time
Gate Drive
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Nov 6, 2013
Figure 6: Secondary side DCM/CrCM operation
Resonant Half-Bridge Application
The typical application circuit of IR11672A in LLC half-bridge is shown in Figure 7.
Figure 7: Resonant half-bridge application circuit
In resonant half-bridge converter, the turn-on phase and turn-off phase is similar to flyback except the current shape is
sinusoid. The typical operation waveform can be found below.
Gate Drive
ISEC
VDS
Blanking
time
time
T1 T2
VTH1
VTH2
VTH3
10us blankingMOT
Rmot2
CVCC2
Rcc2
Rmot1
CVCC1
Rcc1
VCC
1
OVT
2
MOT
3
EN
4
GATE 8
GND 7
VS 6
VD 5
IR11672A
Lr T1
Cout
M2 Lm
M1
Vin
Cr
Rtn
M3
M4
Rg1
VOUT
VCC
1
OVT
2
MOT
3
EN
4
GATE 8
GND 7
VS 6
VD 5
IR11672A Rg2
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Nov 6, 2013
Figure 8: Resonant half-bridge operation waveform
MOT Protection Mode
The MOT protection prevents reverse current in SR MOSFET which could happen at light load if the MOT time is set very
long. The IC disables the gate output in the protection mode and automatically resume to normal operation as the load
increasing to a level where the SR current conduction time is longer than MOT.
This function works in both flyback and resonant half-bridge topologies. Figure 9 is an example in Flyback converter.
Figure 9: MOT Protection Mode
Gate Drive
VDS
Blanking
time
T1 T2
VTH1
VTH2
VTH3
MOT tBLANK
IDS
time
ISEC
VDS
Gate Drive
MOT
Sensed VD>VTH1 at
the end of MOT Disable the next gate output
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Nov 6, 2013
Synchronized Enable Function
Sync Enable function guarantees the VGATE always starts switching at the beginning of a switching cycle. This function works
in both flyback and resonant half-bridge topologies. Figure 10 is an example in resonant half-bridge converter.
VDS
Idrain
VGATE
UVLO & EN
IC activated in the middle of a
conduction cycle, VGATE stays low. Vgate has output from the next cycle
Vth3
VD>Vth3, Gate
activated
Figure 10: Synchronized Enable Function (resonant half-bridge)
General Timing Waveform
Figure 11: Vcc UVLO
Figure 12A: Timing waveform
t
VCC
VCC ON
UVLO
VCC UVLO
NORMALUVLO
10%
90%
trise
VTH2
tfall
VTH1
tDoff
tDon
50%
VDS
VGate
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Nov 6, 2013
VEN
EN positive pulse width
VENHI
VENLO
EN negative
pulse width
Figure 12B: Enable timing waveform
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Nov 6, 2013
Figure 13: Supply Current vs. Supply Voltage
Figure 14: Undervoltage Lockout vs. Temperature
Figure 15: Icc Quiescent Current vs. Temperature
Figure 16: Icc Supply Currrent @1nF Load vs.
Temperature
0.01
0.1
1
10
5 V 10 V 15 V 20 V
ISUPPLY (mA)
Supply voltage
8.0 V
8.5 V
9.0 V
9.5 V
10.0 V
10.5 V
11.0 V
-50 °C 0 °C 50 °C 100 °C 150 °C
VCC UVLO Thresholds
Temperature
VCC ON
VCC UVLO
1.0
1.2
1.4
1.6
1.8
2.0
-50 °C 0 °C 50 °C 100 °C 150 °C
ICC Supply Current (mA)
Temperature
IQCC
7.5
7.7
7.9
8.1
8.3
8.5
-50 °C 0 °C 50 °C 100 °C 150 °C
ICC Supply Current (mA)
Temperature
Icc @400KHz, CLOAD=1nF
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Nov 6, 2013
Figure 17: VTH1 vs. Temperature
Figure 18: VTH2 vs. Temperature
Figure 19: Comparator Hysteresis vs.
Temperature
Figure 20: VTH1 vs. Temperature and Common Mode
(OVT=Floating)
-30.0
-25.0
-20.0
-15.0
-10.0
-5.0
0.0
-50 °C 0 °C 50 °C 100 °C 150 °C
VTH1 Threshold (mV)
Temperature
OVT=GND
OVT=Floating
OVT=VCC
-150.0
-100.0
-50.0
0.0
-50 °C 0 °C 50 °C 100 °C 150 °C
VTH2 Thresholds (mV)
Temperature
0.0
25.0
50.0
75.0
100.0
-50 °C 0 °C 50 °C 100 °C 150 °C
Comparator Hysteresis VHYST (mV)
Temperature
-11.2
-11.0
-10.8
-10.6
-10.4
-10.2
-10.0
-9.8
-9.6
-9.4
-9.2
-9.0
-50 °C 0 °C 50 °C 100 °C 150 °C
VTH1 Threshold (mV)
Temperature
VS=-150mV
VS=0V
VS=+2V
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Figure 21: VTH2 vs. Temperature and
Common Mode
Figure 22: MOT vs Temperature
Figure 23: Enable Threshold vs. Temperature
Figure 24: Turn-on and Turn-off Propagation Delay vs.
Temperature
-90.0
-85.0
-80.0
-75.0
-70.0
-65.0
-60.0
-55.0
-50.0
-50 °C 0 °C 50 °C 100 °C 150 °C
VTH1 Threshold (mV)
Temperature
VS=-150mV
VS=0V
VS=+2V
0 us
1 us
2 us
3 us
4 us
-50 °C 0 °C 50 °C 100 °C 150 °C
Minimum On Time (us)
Temperature
RMOT=5k
RMOT=75k
1.0 V
1.5 V
2.0 V
2.5 V
3.0 V
-50 °C 0 °C 50 °C 100 °C 150 °C
Enable Thresholds
Temperature
VEN HI VEN LO
35 ns
40 ns
45 ns
50 ns
55 ns
60 ns
65 ns
70 ns
75 ns
80 ns
-50 °C 0 °C 50 °C 100 °C 150 °C
Propagation Delay
Temperature
Turn-on Propagation Delay
Turn-off Propagation Delay
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Nov 6, 2013
Package Details: SOIC8N
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Nov 6, 2013
Tape and Reel Details: SOIC8N
E
F
A
C
D
G
A
B
H
NOTE : CONTROLLING
DIMENSION IN MM
LOADED TAPE FEED DIRECTION
A
H
F
E
G
D
B
C
CARRIER TAPE DIMENSION FOR 8SOICN
Code Min Max Min Max
A7.90 8.10 0.311 0.318
B 3.90 4.10 0.153 0.161
C11.70 12.30 0.46 0.484
D5.45 5.55 0.214 0.218
E6.30 6.50 0.248 0.255
F5.10 5.30 0.200 0.208
G1.50 n/a 0.059 n/a
H1.50 1.60 0.059 0.062
Metric
Imperial
REEL DIMENSIONS FOR 8SOICN
Code Min Max Min Max
A329.60 330.25 12.976 13.001
B20.95 21.45 0.824 0.844
C12.80 13.20 0.503 0.519
D1.95 2.45 0.767 0.096
E98.00 102.00 3.858 4.015
Fn/a 18.40 n/a 0.724
G14.50 17.10 0.570 0.673
H12.40 14.40 0.488 0.566
Metric
Imperial
IR11672AS
25
www.irf.com
© 2013 International Rectifier
Nov 6, 2013
Part Marking Information
Non-Lead Free Released
11672A
IR logo
YWW ?
Part number
Date code
Pin 1
Identifier
Lot Code
(Prod mode –
4 digit SPN code)
Assembly site code
Per SCOP 200-002
C XXXX
MARKING CODE
Lead Free Released
?
P
IR11672AS
26
www.irf.com
© 2013 International Rectifier
Nov 6, 2013
Qualification Information†
Qualification Level
Industrial††
Comments: This family of ICs has passed JEDEC’s Industrial
qualification. IR’s Consumer qualification level is granted by
extension of the higher Industrial level.
Moisture Sensitivity Level
MSL2††† 260°C
(per IPC/JEDEC J-STD-020)
ESD
Machine Model
Class B
(per JEDEC standard JESD22-A115)
Human Body Model
Class 2
(per EIA/JEDEC standard EIA/JESD22-A114)
IC Latch-Up Test
Class I, Level A
(per JESD78)
RoHS Compliant
Yes
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
††
Higher qualification ratings may be available should the user have such requirements. Please contact
your International Rectifier sales representative for further information.
†††
Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility
for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of
other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any
patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This
document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105