HFBR-1119TZ Transmitter
HFBR-2119TZ Receiver
Fiber Optic Transmitter and Receiver Data Links
for 266 MBd
Data Sheet
Features
Full compliance with the optical performance require-
ments of the bre channel physical layer
Other versions available for:
– FDDI
– ATM
Compact 16-pin DIP package with plastic ST* connector
Wave solder and aqueous wash process compatible
package
Manufactured in an ISO 9001 certi ed facility
Applications
Fibre channel interfaces
Multimode ber optic links up to 266 MBd at 1500 m
General purpose, point-to-point data communications
Replaces DLT/R1040-ST2 model transmitters and
receivers
Description
The HFBR-1119TZ/-2119TZ series of data links are high-
performance, cost-e cient, transmitter and receiver
modules for serial optical data communication applica-
tions speci ed at 266 MBd for Fibre Channel applications
or for general-purpose ber optic data link transmission.
These modules are designed for 50 or 62.5 m core multi-
mode optical ber and operate at a nominal wavelength of
1300 nm. They incorporate our high-performance, reliable,
long-wavelength, optical devices and proven circuit tech-
nology to give long life and consistent performance.
Transmitter
The transmitter utilizes a 1300 nm surface-emitting
InGaAsP LED, packaged in an optical subassembly. The LED
is DC-coupled to a custom IC which converts di erential-
input, PECL logic signals, ECL-referenced (shifted) to a +5 V
power supply, into an analog LED drive current.
Receiver
The receiver utilizes an InGaAs PIN photodiode coupled
to a custom silicon transimpedance preampli er IC. The
PIN-preampli er combination is AC-coupled to a custom
quantizer IC which provides the nal pulse shaping for the
logic output and the Signal Detect function. Both the Data
and Signal Detect Outputs are di erential. Also, both Data
and Signal Detect Outputs are PECL compatible, ECL-refer-
enced (shifted) to a +5 V power supply.
Package
The overall package concept for the Data Links consists of
the following basic elements: two optical subassemblies,
two electrical subassemblies, and the outer housings as
illustrated in Figure 1.
* ST is a registered trademark of AT&T Lightguide Cable Connectors.
2
The package outline drawing and pinout are shown in Figures 2 and 3. The details of this package outline and pinout are
compatible with other data-link modules from other vendors.
The optical subassemblies consist of a transmitter subassembly in which the LED resides and a receiver subassembly
housing the PIN-preampli er combination.
The electrical subassemblies consist of a multi-layer printed circuit board on which the IC chips and various surface-
mounted, passive circuit elements are attached.
Figure 1. Transmitter and receiver block diagram.
Figure 2. Package outline drawing.
DATA IN
SIGNAL
DETECT OUT
DATA IN
RECEIVER
QUANTIZER
IC
DRIVER IC
TOP VIEW
PIN PHOTODIODE
OPTICAL
SUBASSEMBLIES
PREAMP IC
DIFFERENTIAL
DIFFERENTIAL
DIFFERENTIAL
VBB
TRANSMITTER
LED
ELECTRICAL
SUBASSEMBLIES
SIMPLEX ST®
RECEPTACLE
41 MAX.
8.31 12.19
MAX.
THREADS
3/8 – 32 UNEF-2A
HFBR-111X/211XT
DATE CODE (YYWW)
SINGAPORE
5.05
19.72
2.45
7.01
5.0
9.8 MAX. 3
0.9
PCB PINS
DIA. 0.46 mm
NOTE 2
8 x 7.62
17.78
(7 x 2.54)
12
HOUSING PINS 0.38 x 0.5 mm
NOTE 1
NOTES:
1. MATERIAL ALLOY 194 1/2H – 0.38 THK
FINISH MATTE TIN PLATE 7.6 µm MIN.
2. MATERIAL PHOSPHOR BRONZE WITH
120 MICROINCHES TIN LEAD (90/10)
OVER 50 MICROINCHES NICKEL.
3. UNITS = mm
3
OPTICAL POWER BUDGET – dB
FIBER OPTIC CABLE LENGTH – km
4
2
0.5
8
1
0
6
20 1.5
1
3
5
7
62.5/125 µm
50/125 µm
Each transmitter and receiver package includes an internal
shield for the electrical subassembly to ensure low EMI
emissions and high immunity to external EMI elds.
The outer housing, including the ST* port, is molded of
lled, non-conductive plastic to provide mechanical
strength and electrical isolation. For other port
styles, please contact your Avago Technologies Sales
Representative.
Each data-link module is attached to a printed circuit
board via the 16-pin DIP interface. Pins 8 and 9 provide
mechanical strength for these plastic-port devices and
will provide port-ground for forthcoming metal-port
modules.
Application Information
The Applications Engineering group of the Fiber Optics
Product Division is available to assist you with the technical
understanding and design tradeo s associated with these
transmitter and receiver modules. You can contact them
through your Avago Technologies sales representative.
The following information is provided to answer some of
the most common questions about the use of these parts.
Transmitter and Receiver Optical Power Budget versus
Link Length
The Optical Power Budget (OPB) is the available optical
power for a ber-optic link to accommodate ber cable
losses plus losses due to in-line connectors, splices,
optical switches, and to provide margin for link aging and
unplanned losses due to cable plant recon guration or
repair.
Figure 4 illustrates the predicted OPB associated with
the transmitter and receiver speci ed in this data sheet
at the Beginning of Life (BOL). This curve represents the
attenuation and chromatic plus modal dispersion losses
associated with 62.5/125 m and 50/125 m ber cables
only. The area under the curve represents the remaining
OPB at any link length, which is available for overcoming
non- ber cable related losses.
Avago LED technology has produced 1300 nm LED devices
with lower aging characteristics than normally associated
with these technologies in the industry. The industry con-
vention is 1.5 dB aging for 1300 nm LEDs; however, Avago
1300 nm LEDs will experience less than 1 dB of aging
over normal commercial equipment mission-life periods.
Contact your Avago Technologies sales representative for
additional details.
Figure 4 was generated with an Avago ber-optic link
model containing the current industry conventions for
ber cable speci cations and Fibre Channel optical param-
eters. These parameters are re ected in the guaranteed
performance of the transmitter and receiver speci cations
in this data sheet. This same model has been used exten-
sively in the ANSI and IEEE committees, including the ANSI
X3T9.5 committee, to establish the optical performance
requirements for various ber-optic interface standards.
The cable parameters used come from the ISO/IEC JTC1/
SC 25/WG3 Generic Cabling for Customer Premises per
DIS 11801 document and the EIA/TIA-568-A Commer-
cial Building Telecommunications Cabling Standard per
SP-2840.
Figure 3. Pinout drawing. Figure 4. Optical power budget at BOL vs. ber optic cable length.
NC 8
9NC
GND 7
10 NO PIN
VCC 6
11 GND
VCC 5
12 GND
GND 4
13 GND
DATA 3
14 GND
DATA 2
15 VBB
NC 1
16 NC
OPTICAL PORT
TRANSMITTER
NC 8
9NC
NO PIN 7
10 GND
GND 6
11 VCC
GND 5
12 VCC
GND 4
13 VCC
SD 3
14 DATA
SD 2
15 DATA
NO PIN 1
16 NC
OPTICAL PORT
RECEIVER
* ST is a registered trademark of AT&T Lightguide Cable Connectors.
4
Transmitter and Receiver Signaling Rate Range and
BER Performance
For purposes of de nition, the symbol rate (Baud), also
called signaling rate, is the reciprocal of the symbol time.
Data rate (bits/sec) is the symbol rate divided by the
encoding factor used to encode the data (symbols/bit).
The speci cations in this data sheet have all been
measured using the standard Fibre Channel symbol rate
of 266 MBd.
The data link modules can be used for other applica-
tions at signaling rates di erent than speci ed in this
data sheet. Depending on the actual signaling rate, there
may be some di erences in optical power budget. This is
primarily caused by a change in receiver sensitivity.
These data link modules can also be used for applications
which require di erent bit-error-ratio (BER) performance.
Figure 5 illustrates the typical trade-o between link BER
and the receiver input optical power level.
Data Link Jitter Performance
The Avago 1300 nm data link modules are designed to
operate per the system jitter allocations stated in FC-PH
Annex A.4.3 and A.4.4.
The 1300 nm transmitter will tolerate the worst-case input
electrical jitter allowed, without violating the worst-case
output jitter requirements.
The 1300 nm receiver will tolerate the worst-case input
optical jitter allowed without violating the worst-case
output electrical jitter allowed.
The jitter speci cations stated in the following transmitter
and receiver speci cation tables are derived from the
values in FC-PH Annex A.4.3 and A.4.4. They represent
the worst-case jitter contribution that the transmitter and
receiver are allowed to make to the overall system jitter
without violating the allowed allocation. In practice, the
typical jitter contribution of the Avago data link modules
is well below the maximum allowed amounts.
Recommended Handling Precautions
It is advised that normal static precautions be taken in
the handling and assembly of these data link modules to
prevent damage which may be induced by electrostatic
discharge (ESD). The HFBR-1119TZ/-2119TZ series meets
MIL-STD-883C Method 3015.4 Class 2.
Care should be taken to avoid shorting the receiver Data
or Signal Detect Outputs directly to ground without
proper currentlimiting impedance.
Solder and Wash Process Compatibility
The transmitter and receiver are delivered with protec-
tive process caps covering the individual ST* ports. These
process caps protect the optical subassemblies during
wave solder and aqueous wash processing and act as dust
covers during shipping.
These data link modules are compatible with either
industry standard wave- or hand-solder processes.
Shipping Container
The data link modules are packaged in a shipping
container designed to protect it from mechanical and ESD
damage during shipment or storage.
Board Layout – Interface Circuit and Layout Guidelines
It is important to take care in the layout of your circuit
board to achieve optimum performance from these data
link modules. Figure 6 provides a good example of a
power supply lter circuit that works well with these parts.
Also, suggested signal terminations for the Data, Data-bar,
Signal Detect and Signal Detect-bar lines are shown. Use
of a multilayer, ground-plane printed circuit board will
provide good high-frequency circuit performance with
a low inductance ground return path. See additional
recommendations noted in the interface schematic
shown in Figure 6.
Figure 5. HFBR-1119TZ/2119TZ bit-error-ratio vs. relative receiver input
optical power.
BIT ERROR RATIO
RELATIVE INPUT OPTICAL POWER – dB
1 x 10
-8
1 x 10
-10
-4
1 x 10
-2
-2
1 x 10
-12
1 x 10
-6
26-0
1 x 10
-11
1 x 10
-9
1 x 10
-7
1 x 10
-5
1 x 10
-3
1 x 10
-4
CONDITIONS:
1. 266 MBd
2. PRBS 2
7
-1
3. T
A
= 25 °C
4. V
CC
= 5 Vdc
5. INPUT OPTICAL RISE/FALL TIMES =
1.0/1.9 ns
CENTER OF SYMBOL
5
Figure 7. Recommended interface circuitry and power supply lter circuits.
Notes:
1. Resistance is in ohms. Capacitance is in microfarads. Inductance is in microhenries.
2. Terminate transmitter input data and data-bar at the transmitter input pins. Terminate the receiver output data, data-bar, and signal detect-bar at
the follow-on device input pins. For lower power dissipation in the signal detect termination circuitry with small compromise to the signal quality,
each signal detect output can be loaded with 510 ohms to ground instead of the two resistor, split-load pecl termination shown in this schematic.
3. Make di erential signal paths short and of same length with equal termination impedance.
4. Signal traces should be 50 ohms microstrip or stripline transmission lines. Use multilayer, ground-plane printed circuit board for best high-
frequency performance.
5. Use high-frequency, monolithic ceramic bypass capacitors and low series DC resistance inductors. Recommend use of surface-mount coil
inductors and capacitors. In low noise power supply systems, ferrite bead inductors can be substituted for coil inductors. Locate power supply
lter components close to their respective power supply pins. C7 is an optional bypass capacitor for improved, low-frequency noise power supply
lter performance.
6. Device ground pins should be directly and individually connected to ground.
7. Caution: do not directly connect the ber-optic module PECL outputs (data, data-bar, signal detect, signal detect-bar, VBB) to ground without
proper current limiting impedance.
8. (*) Optional metal ST optical port transmitter and receiver modules will have pins 8 and 9 electrically connected to the metal port only and not
connected to the internal signal ground.
NC 8
9 NC
7
10 GND
GND 6
11 VCC1
GND 5
12 VCC
GND 4
13 GND
GND 3
14 D
VBB 2
15 D
NC 1
16 NC
NO
PIN
Tx
A
C2
0.1
*
L2
1
R3
82
R4
130
R2
82
R1
130
C2
0.1
+5 Vdc
GND
DATA
DATA
TERMINATE D, D
AT Tx INPUTS
*
NC 8
9 NC
GND 7
10
VCC 6
11 GND
VCC 5
12 GND
VCC 4
13 GND
D 3
14 SD
D 2
15 SD
NC 1
16
Rx
A
*
L1
1
R12
130
DATA
DATA
TERMINATE D, D, SD, SD
INPUTS OF FOLLOW-ON DEVICES
*
NO
PIN
NO
PIN
C1
0.1
C7
10
(OPTIONAL)
C3
0.1
C4
10
R6
130
R8
130
R5
82
R7
82
R9
82
C6
0.1
SD
R11
82
SD
R10
130
TOP VIEWS
6
Board Layout – Hole Pattern
The Avago transmitter and receiver hole pattern is com-
patible with other data link modules from other vendors.
The drawing shown in Figure 7 can be used as a guide in
the mechanical layout of your circuit board.
Regulatory Compliance
These data link modules are intended to enable com-
mercial system designers to develop equipment that
complies with the various international regulations
governing certi cation of Information Technology Equip-
ment. Additional information is available from your Avago
sales representative.
All HFBR-1119TZ LED transmitters are classi ed as
IEC-825-1 Accessible Emission Limit (AEL) Class 1 based
upon the current proposed draft scheduled to go into
e ect on January 1, 1997. AEL Class 1 LED devices are con-
sidered eye safe. See Application Note 1094, LED Device
Classi cations with Respect to AEL Values as De ned in the
IEC 825-1 Standard and the European EN60825-1 Directive.
The material used for the housing in the HFBR-1119TZ/-
2119TZ series is Ultem 2100 (GE). Ultem 2100 is recog-
nized for a UL ammability rating of 94V-0 (UL File Number
E121562) and the CSA (Canadian Standards Association)
equivalent (File Number LS88480).
Figure 7. Recommended board layout hole pattern.
(7X) 2.54
.100
17.78
.700
7.62
.300
0.8 ± 0.1
.032 ± .004
(16X) ø
Ø 0.000 MA
–A–
TOP VIEW UNITS = mm/INCH
Figure 8. Typical transmitter output optical spectral width (FWHM) vs.
transmitter output optical center wavelength and rise/fall times.
Figure 9. HFBR-2119TZ receiver relative input optical power vs. eye sampling
time position.
'Oc – TRANSMITTER OUTPUT OPTICAL
SPECTRAL WIDTH (FWHM) – nm
Oc – TRANSMITTER OUTPUT OPTICAL
CENTER WAVELENGTH – nm
140
100
1300
220
1320
60
180
08310821 1340
80
120
160
200
1360
TRANSMITTER
OUTPUT OPTICAL
RISE TIMES – ns
t
r
= 1.8 ns
t
r
= 1.9 ns
t
r
= 2.0 ns
t
r
= 2.1 ns
t
r
= 2.2 ns
HFBR-1119TZ TYPICAL TRANSMITTER TEST
RESULTS OF Oc, 'O AND t
r
ARE CORRELATED
AND COMPLY WITH THE ALLOWED SPECTRAL
WIDTH AS A FUNCTION OF CENTER WAVELENGTH
FOR VARIOUS RISE AND FALL TIMES.
RELATIVE INPUT OPTICAL POWER – dB
EYE SAMPLING TIME POSITION – ns
4
2
-1
5
-0.5
05.15.1- 0.5
1
3
1
CONDITIONS:
1. T
A
= 25 °C
2. V
CC
= 5 Vdc
3. INPUT OPTICAL RISE/FALL TIMES = 1.0/1.9 ns
4. INPUT OPTICAL POWER IS NORMALIZED
TO CENTER OF DATA SYMBOL
5. NOTES 11 AND 12 APPLY
0
7
HFBR-1119TZ Transmitter Pin-Out Table
Pin Symbol Functional Description Reference
1 NC No internal connect, used for mechanical strength only
2 VBB V
BB Bias output
3 GND Ground Note 3
4 GND Ground Note 3
5 GND Ground Note 3
6 GND Ground Note 3
7 OMIT No pin
8 NC No internal connect, used for mechanical strength only Note 5
9 NC No internal connect, used for mechanical strength only Note 5
10 GND Ground Note 3
11 VCC Common supply voltage Note 1
12 VCC Common supply voltage Note 1
13 GND Ground Note 3
14 DATA Data input Note 4
15 DATA Inverted Data input Note 4
16 NC No internal connect, used for mechanical strength only
HFBR-2119TZ Receiver Pin-Out Table
Pin Symbol Functional Description Reference
1 NC No internal connect, used for mechanical strength only
2 DATA Inverted Data input Note 4
3 DATA Data input Note 4
4 VCC Common supply voltage Note 1
5 VCC Common supply voltage Note 1
6 VCC Common supply voltage Note 1
7 GND Ground Note 3
8 NC No internal connect, used for mechanical strength only Note 5
9 NC No internal connect, used for mechanical strength only Note 5
10 OMIT No pin
11 GND Ground Note 3
12 GND Ground Note 3
13 GND Ground Note 3
14 SD Signal Detect Note 2, 4
15 SD Inverted Signal Detect Note 2, 4
16 OMIT No pin
Notes:
1. Voltages on VCC must be from the same power supply (they are connected together internally).
2. Signal Detect is a logic signal that indicates the presence or absence of an input optical signal. A logic-high, VOH, on Signal Detect indicates
presence of an input optical signal. A logic-low, VOL, on Signal Detect indicates an absence of input optical signal.
3. All GNDs are connected together internally and to the internal shield.
4. DATA, DATA, SD, SD are open-emitter output circuits.
5. On metal-port modules, these pins are rede ned as “Port Connection.”
8
Speci cations – Absolute Maximum Ratings
Parameter Symbol Min. Typ. Max. Unit Reference
Storage Temperature TS-40 100 °C
Lead Soldering Temperature TSOLD 260 °C
Lead Soldering Time tSOLD 10 sec.
Supply Voltage VCC -0.5 7.0 V
Data Input Voltage VI-0.5 VCC V
Di erential Input Voltage VD1.4 V Note 1
Output Current IO50 mA Note 2
Recommended Operating Conditions
Parameter Symbol Min. Typ. Max. Unit Reference
Ambient Operating Temperature TA070°C
Supply Voltage VCC 4.5 5.5 V
Data Input Voltage – Low VIL - VCC -1.810 -1.475 V
Data Input Voltage – High VIH - VCC -1.165 -0.880 V
Data and Signal Detect Output Load RL50 Note 3
HFBR-1119TZ Transmitter Electrical Characteristics
(T
A = 0° C to +70° C, VCC = 4.5 V to 5.5 V)
Parameter Symbol Min. Typ. Max. Unit Reference
Supply Current ICC 165 185 mA Note 4
Power Dissipation PDISS 0.86 1.1 Note 16
Threshold Voltage VBB - VCC -1.42 -1.3 -1.24 V Note 21
Data Input Current – Low IIL -350 0 A
Data Input Current – High IIH 14 350 A
HFBR-2119TZ Receiver Electrical Characteristics
(T
A = 0° C to +70° C, VCC = 4.5 V to 5.5 V)
Parameter Symbol Min. Typ. Max. Unit Reference
Supply Current ICC 100 165 mA Note 15
Power Dissipation PDISS 0.3 0.5 Note 16
Data Output Voltage – Low VOL - VCC -1.840 -1.620 V Note 17
Data Output Voltage – High VOH - VCC -1.045 -0.880 V Note 17
Data Output Rise Time tr0.35 2.2 ns Note 18
Data Output Fall Time tf0.35 2.2 ns Note 18
Signal Detect Output Voltage –
Low (De-asserted)
VOL - VCC -1.840 -1.620 V Note 17
Signal Detect Output Voltage –
High (Asserted)
VOH - VCC -1.045 -0.880 V Note 17
Signal Detect Output Rise Time tr0.35 2.2 ns Note 18
Signal Detect Output Fall Time tf0.35 2.2 ns Note 18
Signal Detect Asserted Time (o to on) tSDA 0 55 100 sNote 19
Signal Detect De-asserted Time (on to o ) tSDD 0 110 350 sNote 20
9
HFBR-1119TZ Transmitter Optical Characteristics
(T
A = 0° C to +70° C, VCC = 4.5 V to 5.5 V)
Parameter Symbol Min. Typ. Max. Unit Reference
Output Optical Power
62.5/125 m, NA = 0.275 ber
PO, BOL
PO, EOL
-19
-20
-14
-14
dBm avg. Note 5
Output Optical Power
50/125 m, NA = 0.20 ber
PO, BOL -22.5 -14 dBm avg. Note 5
Optical Extinction Ratio 0.03
-35
%
dB
Note 6
Center Wavelength C1270 1310 1380 nm Note 7
Figure 8
Spectral Width – FWHM 137 nm Note 7
Figure 8
Optical Rise Time tr0.6 2.0 ns Note 8
Figure 8
Optical Fall Time tf0.6 2.2 ns Note 8
Figure 8
Deterministic Jitter Contributed by
the Transmitter
DJC0.08
0.30
ns rms
ns p-p
Note 9
Random Jitter Contributed by
the Transmitter
RJC0.03
0.11
ns p-p
ns p-p
Note 10
HFBR-2119TZ Receiver Optical Characteristics
(T
A = 0° C to +70° C, VCC = 4.5 V to 5.5 V)
Parameter Symbol Min. Typ. Max. Unit Reference
Input Optical Power
Minimum at Window Edge
PIN Min. (W) -26 dBm avg. Note 11
Figure 9
Input Optical Power
Minimum at Eye Center
PIN Min. (C) -28 dBm avg. Note 12
Figure 9
Input Optical Power Maximum PIN Max. -14 dBm avg. Note 11
Operating Wavelength 1270 1380 nm
Signal Detect – Asserted PAPD +1.5 dB -27 dBm avg. Note 13, 19
Signal Detect – De-asserted PD-45 dBm avg. Note 14, 20
Signal Detect – Hysteresis PA – PD1.5 dB
Deterministic Jitter Contributed by
the Receiver
DJC0.24
0.90
ns rms
ns p-p
Note 9, 11
Random Jitter Contributed by
the Receiver
RJC0.26
0.97
ns rms
ns p-p
Note 10, 11
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved. Obsoletes AV01-0153EN
AV02-3571EN - June 11, 2012
Notes:
1. This is the maximum voltage that can be applied across the
Di erential Transmitter Data Inputs to prevent damage to the input
ESD protection circuit.
2. When component testing these products, do not short the receiver
Data or Signal Detect outputs directly to ground to avoid damage to
the part.
3. The outputs are terminated with 50 connected to VCC - 2 V.
4. The power supply current needed to operate the transmitter is
provided to di erential ECL circuitry. This circuitry maintains a nearly
constant current ow from the power supply. Constant current
operation helps to prevent unwanted electrical noise from being
generated and conducted or emitted to neighboring circuitry.
5. These optical power values are measured as follows:
The Beginning of Life (BOL) to the End of Life (EOL) optical power
degradation is typically 1.5 dB per the industry convention for
long wavelength LEDs. The actual degradation observed in Avago
Technologies’s 1300 nm LED products is < 1 dB, as speci ed in
this data sheet.
Over the speci ed operating voltage and temperature ranges.
With 25 MBd (12.5 MHz square-wave), input signal.
At the end of one meter of noted optical ber with cladding
modes removed.
The average power value can be converted to a peak power value by
adding 3 dB. Higher output optical power transmitters are available
on special request.
6. The Extinction Ratio is a measure of the modulation depth of the
optical signal. The data “0” output optical power is compared to the
data “1” peak output optical power and expressed as a percentage.
With the transmitter driven by a 12.5 MHz square-wave signal, the
average optical power is measured. The data “1” peak power is
then calculated by adding 3 dB to the measured average optical
power. The data “0” output optical power is found by measuring
the optical power when the transmitter is driven by a logic “0”
input. The extinction ratio is the ratio of the optical power at the “0”
level compared to the optical power at the “1” level expressed as a
percentage or in decibels.
7. This parameter complies with the requirements for the tradeo s
between center wave length, spectral width, and rise/fall times
shown in Figure 8.
8. The optical rise and fall times are measured from 10% to 90% when
the transmitter is driven by a 25 MBd (12.5 MHz squarewave) input
signal. This parameter complies with the requirements for the
tradeo s between center wavelength, spectral width, and rise/fall
times shown in Figure 8.
9. Deterministic Jitter is de ned as the combination of Duty Cycle
Distortion and Data Dependent Jitter. Deterministic Jitter is
measured with a test pattern consisting of repeating K28.5
(00111110101100000101) data bytes and evaluated per the method
in FC-PH Annex A.4.3.
10. Random Jitter is speci ed with a sequence of K28.7 (square wave
of alternating 5 ones and 5 zeros) data bytes and, for the receiver,
evaluated at a Bit- Error-Ratio (BER) of 1 x 10-12 per the method in
FC-PH Annex A.4.4.
11. This speci cation is intended to indicate the performance of the
receiver when Input Optical Power signal characteristics are present
per the following de nitions. The Input Optical Power dynamic
range from the minimum level (with a window time-width) to the
maximum level is the range over which the receiver is guaranteed to
provide output data with a Bit-Error-Ratio (BER) better than or equal
to 1 x 10-12.
At the Beginning of Life (BOL).
Over the speci ed operation temperature and voltage ranges.
Input symbol pattern is a 266 MBd, 27 - 1 pseudo-random bit
stream data pattern.
Receiver data window time-width is ± 0.94 ns or greater and
centered at mid-symbol. This data window time width is
calculated to simulate the e ect of worst-case input jitter per
FCPH Annex J and clock recovery sampling position in order to
insure good operation with the various FC-0 receiver circuits.
The maximum total jitter added by the receiver and the maximum
total jitter presented to the clock recovery circuit comply with the
maximum limits listed in Annex J, but the allocations of the Rx
added jitter between deterministic jitter and random jitter are
di erent than in Annex J.
12. All conditions of Note 11 apply except that the measurement is
made at the center of the symbol with no window time-width.
13. This value is measured during the transition from low to high levels
of input optical power.
14. This value is measured during the transition from high to low levels
of input optical power.
15. These values are measured with the outputs terminated into 50
connected to VCC - 2 V and an input optical power level of -14 dBm
average.
16. The power dissipation value is the power dissipated in the
transmitter or the receiver itself. Power dissipation is calculated
as the sum of the products of supply voltage and supply current,
minus the sum of the products of the output voltages and currents.
17. These values are measured with respect to VCC with the output
terminated into 50 connected to VCC - 2 V.
18. The output rise and fall times are measured between 20% and 80%
levels with the output connected to VCC - 2 V through 50 .
19. The Signal Detect output shall be asserted, logic-high (VOH), within
100 s after a step increase of the Input Optical Power.
20. Signal Detect output shall be de-asserted, logic-low (VOL), within
350 s after a step decrease in the Input Optical Power.
21. This value is measured with an output load RL = 10 k.
