DLO31F TTL-INTERFACED, GATED data DELAY LINE OSCILLATOR delay \G e (SERIES DLO31F) CEVICESY inc. FEATURES PACKAGES W e Continuous or keyable wave train oF tae voo Nic =p 3 Nic e Synchronizes with arbitrary gating signal Not TE Ne e Fits standard 14-pin DIP socket Nie = OS Nao e Low profile tof] 2 GND 47 sK GB e = Auto-insertable eno U7 eh cB e Input & outputs fully TTL interfaced & buffered e Available in frequencies from 2MHz to 40MHz DLO31F-xx DIP Military SMD DLO31F-xxA2 Gull-Wing DLO31F-xxB2 J-Lead DLO31F-xxM_ Military DIP DLO31F-xxMD1 DLO31F-xxMD4 FUNCTIONAL DESCRIPTION The DLO31F-series device is a gated delay line oscillator. The device produces a stable square wave which is synchronized with the falling edge of the Gate Input (GB). The frequency of oscillation is given by the device dash number (See Table). The two outputs (C1,C2) are in phase during oscillation, but return to opposite logic levels when the device is disabled. PIN DESCRIPTIONS GB Gate Input C1 Clock Output 1 C2 Clock Output 2 VCC +5 Volts GND Ground SERIES SPECIFICATIONS DASH NUMBER SPECIFICATIONS e Frequency accuracy: 2% e Inherent delay (Te): 5.5ns typical Part Frequency Output skew: 3.5ns typical Number (MHz) . . DLO31F-2 2.0+0.04 e Output rise/fall time: 2ns typical DLOSTEDS 551005 e Supply voltage: SVDC + 5% DLOSIF-3 3.0+0.06 e Supply current: 40ma typical (7ma when disabled) DLO31F-3.5 3.5+0.07 e Operating temperature: 0 to 70 C DLOS1F-4 4.0 + 0.08 Temperature coefficient: 100 PPM/C (See text) DLOSIF45 | 4520.09 DLO31F-5 5.0+0.10 DLO31F-5.5 5.5+0.11 DLO31F-6 6.0+0.12 DLO31F-7 7.0+0.14 DLO31F-8 8.0+0.16 GATE DLO31F-9 9.0+0.18 (48) DLO31F-10 10 0.20 DLO31F-12 1240.24 chock 1 DLO31F-14 14+0.28 (C1) DLOS1F-15 15 +0.30 DLO31F-20 20 + 0.40 (c) a, DLO31F-25 25 + 0.50 DLO31F-30 30 + 0.60 : wey : DLO31F-35 35 +0.70 Figure 1: Timing Diagram DLO31E-40 40+0.80 1998 Data Delay Devices NOTE: Any dash number between 2 and 40 not shown is also available. Doc #98001 DATA DELAY DEVICES, INC. 3/17/98 3 Mt. Prospect Ave. Clifton, NJ 07013DLO31F APPLICATION NOTES POWER SUPPLY BYPASSING THERMAL STABILITY The delay line used internally to develop the clock signals in the DLO31F has a thermal coefficient of 100ppm/C. For low frequency units, this is also the thermal coefficient of the output frequency. For higher frequency units, however, other internal effects must be considered, and the actual thermal coefficient may be somewhat The DLO31F relies on a stable power supply to produce a repeatable frequency within the stated tolerances. A 0.1uf capacitor from VCC to GND, located as close as possible to the VCC pin, is recommended. A wide VCC trace and a clean ground plane should be used. higher. DEVICE SPECIFICATIONS TABLE 1: ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN MAX UNITS | NOTES DC Supply Voltage Veco -0.3 7.0 V Input Pin Voltage Vin -0.3 Vopt0.3 V Storage Temperature Tstre -55 150 C Lead Temperature TLEAD 300 C 10 sec TABLE 2: DC ELECTRICAL CHARACTERISTICS (OC to 70C, 4.75V to 5.25V) PARAMETER SYMBOL | MIN TYP MAX | UNITS NOTES High Level Output Voltage Vou 2.5 3.4 V Voc = MIN, lon = MAX Vin = MIN, Vi. = MAX Low Level Output Voltage VoL 0.35 0.5 V Voc = MIN, lo. = MAX Vin = MIN, Vi. = MAX | High Level Output Current lou -1.0 mA Low Level Output Current lot 20.0 mA | High Level Input Voltage Vin 2.0 V Low Level Input Voltage Vit 0.8 Vv Input Clamp Voltage Vik -1.2 V Voc = MIN, | = Ix Input Current at Maximum lia 0.1 mA Voc = MAX, V| = 7.0V Input Voltage High Level Input Current ig 20 uA Voc = MAX, V, = 2.7V Low Level Input Current liv -0.6 mA Voc = MAX, V, = 0.5V Short-circuit Output Current los -60 -150 mA Veco = MAX Output High Fan-out 25 Unit Output Low Fan-out 12.5 Load TABLE 3: AC ELECTRICAL CHARACTERISTICS (OC to 70C, 4.75V to 5.25V) PARAMETER SYMBOL | MIN | TYP | MAX UNITS Enable to Clock On (Inherent Delay) teo 3.5 | 5.5 7.0 ns Disable to Clock Off too 3.5 | 5.5 7.0 ns Clock Skew tos 2.5 | 3.5 4.5 ns Gate Recovery Time tor 50 % of Clock Period Doc #98001 3/17/98 DATA DELAY DEVICES, INC. Fax: 973-773-9672 Tel: 973-773-2299 http://www.datadelay.comDLO31F PACKAGE DIMENSIONS CI Cy) Lead Material: Nickellron alloy 42 TIN PLATE oO LI LI 1 7 .280 |_.70 MAX. he i .290 MAX. .015 TYP. .010+.002 018 Typ? e .070 MAX. hia DLO31F-xx (Commercial DIP) 020 TYP. ke >| eo40 010 TYPE {\ {\ {\ TYP. 14 10 8 F 270 430 TYP. TYP. ee. 7 L L v u Ly +] J 9 a ema] :28 i*.790 MAX. DLO31F-xxA1 (Commercial Gull-Wing) + 100 e 4 O17 4 ; ; * | a 510 TYP. ; MAX. 4 : + ; 8 100 ; ; "050 * ke 300 510 MAX. 300 | Y 200 MAX. (Com) 008 008 225 MAX. (Mil) Lt | T_ Ft t "045 065 | 360 Je 08 TYP. k TYP. TYP. DLO31F-xxD1 (Commercial SMD) DLO31F-xxMD1 (Military SMD) ee .. .. 14 10 8 A10 TYP. @: Z |_.820 MAX. | 320 020 Typ, MAX. F 130 .030 .020 TYP. i 018 TYP. vp 300 600 TYP.| , kyp: DLO31F-xxM (Military DIP) Ake 020 TYP. >| [e040 050 TYP. ke fy fy fy TYP. F 4 110138 ft 320 270 TYP. - . TYP. x @' 7 + | | u u 110 .200 350 110 .600 MAX. TYP. i .790 MAX. DLO31F-xxB1 (Commercial J-Lead) , 0 .100 @ : O17, | oo! 140-0 * oo : foot 300 4 moO 89510 TYP. F=H Ps, MAX L oo Foo o-17 shoo .100 050 + 200 MAX.{ 225 MAX. { il) 71 >| .005 >| je 360 TYP.>| Ie .065 TYP. .065 TYP. DLO31F-xxD4 (Commercial SMD) DLO31F-xxMD4 (Military SMD) Doc #98001 DATA DELAY DEVICES, INC. 3/17/98 3 Mt. Prospect Ave. Clifton, NJ 07013DLO31F DELAY LINE AUTOMATED TESTING TEST CONDITIONS INPUT: OUTPUT: Ambient Temperature: 25C + 3C Load: 1 FAST-TTL Gate Supply Voltage (Vcc): 5.0V+0.1V Cioaa: 5pt+ 10% Input Pulse: High = 3.0V + 0.1V Threshold: 1.5V (Rising & Falling) Low = 0.0V+0.1V Source Impedance: 50Q Max. Rise/Fall Time: 3.0 ns Max. (measured between 0.6V and 2.4V ) Pulse Width Low: PWin = 10 x Clock Period Period: PERw = 20 x Clock Period NOTE: The above conditions are for test only and do not in any way restrict the operation of the device. FREQUENCY COUNTER PULSE go DEVICE UNDER < OSCILLOSCOPE GENERATOR LIRIG TEST (DUT) PC2 Test Setup INPUT = SIGNAL a Vit OUTPUT Von SIGNAL 1.5V 1.5V Vo. Timing Diagram For Testing Doc #98001 DATA DELAY DEVICES, INC. 3/17/98 Tel: 973-773-2299 Fax: 973-773-9672 _http:/Avww.datadelay.com