A3213ELHLT-T - Allegro Microsystems

Not to scale

Description

The A3213 and A3214 integrated circuits are ultra-sensitive,

pole in de pen dent Hall-effect switches with a latched digital

output. They are es pe cial ly suited for operation in battery-

operated, hand-held equip ment such as cell and cordless

tele phones and palmtop com put ers. A 2.4 to 5.5 V operation

and a unique clocking scheme reduce the average op er at ing

power requirements: the A3213 to 825 μW, the A3214 to 14 μW

(typical, at 2.75 V). Except for operating duty cycle and average

operating current, the A3213 and A3214 are identical.

Unlike other Hall-effect switches, either a north or south pole

of suf fi cient strength will turn the output on; in the absence of

a magnetic field, the output is off. The polarity independence

and minimal power requirement allows these devices to easily

replace reed switches for superior reliability and ease of

manufacturing, while eliminating the requirement for signal

conditioning.

Improved stability is made possible through chopper

stabilization (dy nam ic offset cancellation), which reduces the

residual offset voltage normally caused by device overmolding,

temperature de pen den cies, and thermal stress.

These devices include, on a single silicon chip, a Hall-voltage

27622.62-DS Rev. Y

Features and Benefits

▪ Micropower operation

▪ Operate with north or south pole

▪ 2.4 to 5.5 V battery operation

▪ Chopper stabilized

▫ Superior temperature stability

▫ Extremely low switchpoint drift

▫ Insensitive to physical stress

▪ High ESD protection

▪ Sol id state reliability

▪ Small size

▪ Easily assembly into applications due to magnetic pole

independence

Micropower Ultra-Sensitive Hall-Ef fect Switches

Continued on the next page…

Packages

Functional Block Diagram

A3213 and A3214

3 pin surface mount

SOT23-W (suffix LH)

3 lead ultramini SIP

(suffix UA)

TIMING

LOGIC

Dwg. FH-020-5

LATCH

GROUND

OUTPUT

SUPPLY

DYNAMIC

OFFSET CANCELLATION

SWITCH

SAMPLE

& HOLD

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Product Selection Guide

Part Number Mounting Packing* Ambient*, TA

(ºC)

(%)

IDD(AVG)(typ)

(μA)

A3213ELHLT-T LH package

Surface Mount

7-in. reel

3000 pieces/reel –40 to 85

25 309A3213EUA-T UA package

SIP through hole

Bulk

500 pieces/bag

A3213LUA-T UA package

SIP through hole

Bulk

500 pieces/bag –40 to 150

A3214ELHLT-T LH package

Surface Mount

7-in. reel

3000 pieces/reel –40 to 85 0.10 6

A3214EUA-T UA package

SIP through hole

Bulk

500 pieces/bag

*Contact Allegro for additional packing and operating temperature range options

generator, small-signal amplifier, chopper sta bi li za tion, a latch,

and a MOSFET output. Advanced BiCMOS processing is used

to take advantage of low-voltage and low-power requirements,

component matching, very low input-offset errors, and small

component geometries.

Devices are rated for operation over a tem per a ture range of

–40°C to 85°C or –40°C to 150°C. Two package styles provide a

mag net i cal ly op ti mized pack age for most ap pli ca tions. ‘LH’ is a

min ia ture low-profile surface-mount package, ‘UA’ is a three-lead

SIP for through-hole mounting. Each package is lead (Pb) free

(suffix, –T) , with a 100% matte tin plated leadframe.

Description (continued)

Absolute Maximum Ratings

Characteristic Symbol Notes Rating Units

Supply Voltage VDD 6V

Magnetic Flux Density B Unlimited G

Output Off Voltage VOUT 6V

Output Current IOUT 1mA

Operating Ambient Temperature TA

Range E –40 to 85 ºC

Range L –40 to 150 ºC

Maximum Junction Temperature TJ(max) 165 ºC

Storage Temperature Tstg –65 to 170 ºC

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

VDD

GND

VOUT

Number Name Description

LH UA

1 1 VDD Input power supply; tie to GND with bypass capacitor

3 2 GND Ground

2 3 VOUT Output signal

Pin-out Diagrams

VDD

GND

VOUT

LH Package UA Package

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

MAGNETIC CHARACTERISTICS1 valid over operating voltage and temperature range, unless otherwise noted

Characteristic Symbol2Test Conditions Min. Typ.3Max. Units4

Operate Points BOPS South pole to branded side – 42 70 G

BOPN North pole to branded side –70 –48 – G

Release Points BRPS South pole to branded side 10 32 – G

BRPN North pole to branded side – –38 –10 G

Hysteresis Bhys |BOPx - BRPx|–10–G

1As used here, negative flux densities are defined as less than zero (algebraic convention) and -50 G is less than +10 G.

2BOPx = operate point (output turns ON); BRPx = release point (output turns OFF).

3Typical Data is at TA = 25°C and VDD = 3.0 V and is for design information only.

41 gauss (G) is exactly equal to 0.1 millitesla (mT).

ELECTRICAL CHARACTERISTICS valid over operating voltage and temperature range, unless otherwise noted

Characteristic Symbol Test Conditions Min. Typ.1Max. Units

Supply Voltage Range VDD Operating1) 2.4 3.0 5.5 V

Output Leakage Current IOFF VOUT = 5.5 V, BRPN < B < BRPS – <1.0 1.0 μA

Output On Voltage VOUT(ON) Output on, IOUT = 1 mA, VDD = 3.0 V – 100 300 mV

Awake Time tawake –6090μs

Period tperiod

A3213 – 240 360 μs

A3214, TA = 25°C, VDD = 3 V – 60 90 ms

Duty Cycle DC A3213 – 25 – %

A3214 – 0.10 – %

Chopping Frequency fC– 340 – kHz

Supply Current

IDD(EN) Chip awake (enabled) – – 2.0 mA

IDD(DIS) Chip asleep (disabled) – – 8.0 μA

IDD(AVG)

A3213 – 309 850 μA

A3214 – 6 22 μA

1Typical Data is at TA = 25°C and VDD = 3.0 V and is for design information only.

2Operate and release points will vary with supply voltage. BOPx = operate point (output turns ON); BRPx = release point (output turns OFF).

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

THERMAL CHARACTERISTICS may require derating at maximum conditions, see application information

Characteristic Symbol Test Conditions* Value Units

Package Thermal Resistance RθJA

Package LH, 1-layer PCB with copper limited to solder pads 228 ºC/W

Package LH, 2-layer PCB with 0.463 in.2 of copper area each side

connected by thermal vias 110 ºC/W

Package UA, 1-layer PCB with copper limited to solder pads 165 ºC/W

*Additional thermal information available on Allegro website.

VDD(max)

Maximum Allowable VDD (V)

VDD(min)

100

200

300

400

500

600

700

800

900

1000

1100

1200

1300

1400

1500

1600

1700

1800

1900

20 40 60 80 100 120 140 160 180

Temperature (°C)

Power Dissipation, P

(mW)

Power Dissipation versus Ambient Temperature

QJA

= 165 ºC/W)

1-layer PCB, Package UA

QJA

= 228 ºC/W)

1-layer PCB, Package LH

QJA

= 110 ºC/W)

2-layer PCB, Package LH

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Typical Operating Characteristics

Supply Voltage, VDD (V)

Supply Current, IDD(AVG) (μA)

0123456

Average Supply Current versus Supply Voltage

A3214

TA = 25°C

900

750

600

450

300

150

Supply Voltage, VDD (V)

Supply Current, IDD(AVG) (μA)

0123456

Average Supply Current versus Supply Voltage

TA = 25°C

A3213

Ambient Temperature, TA (°C)

Supply Current, IDD(AVG) (μA)

VDD = 2.4 V

VDD = 5.5 V

VDD = 3.0 V

-60 -40 -20 0 20 40 60 80 100

Average Supply Current versus Temperature

A3214

900

750

600

450

300

150

Ambient Temperature, TA (°C)

-60 -40 -20 0 20 40 60 80 100

VDD = 5.5 V

VDD = 2.4 V

VDD = 3.0 V

Supply Current, IDD(AVG) (μA)

Average Supply Current versus Temperature

A3213

BOP(S)

BOP(N)

BRP(S)

BRP(N)

Supply Voltage, VDD (V)

Magnetic Flux Density, B (G)

-20

-40

-60

-80

0123456

Switchpoints versus Supply Voltage

A3213 and A3214

TA = 25°C

BOP(S)

BOP(N)

BRP(S)

BRP(N)

-20

-40

-60

-80

-60 -40 -20 0 20 40 60 80 100

Ambient Temperature, TA (°C)

Magnetic Flux Density, B (G)

Switchpoints versus Ambient Temperature

A3213 and A3214

VDD = 5.5 V

BOP(S)

BOP(N)

BRP(S)

BRP(N)

-20

-40

-60

-80

-60 -40 -20 0 20 40 60 80 100

Ambient Temperature, TA (°C)

Magnetic Flux Density, B (G)

Switchpoints versus Ambient Temperature

A3213 and A3214

VDD = 2.4 V

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

FUNCTIONAL DESCRIPTION

Low Average Power. Internal timing circuitry activates the

IC for 60 μs and deactivates it for the remainder of the period

(240 μs (typ) for the A3213 and 60 ms (typ) for the A3214). A

short "awake" time allows for stabilization prior to the sam pling

and data latching on the falling edge of the timing pulse. The

output during the "sleep" time is latched in the last sampled

state. The supply current is not affected by the output state.

Chopper-Stabilized Technique. The Hall element can be

considered as a resistor array similar to a Wheatstone bridge. A

large portion of the offset is a result of the mismatching of these

resistors. These devices use a proprietary dynamic offset cancel-

lation technique, with an internal high-frequency clock to reduce

the residual offset voltage of the Hall element that is normally

caused by device overmolding, temperature de pen den cies, and

thermal stress. The chopper-stabilizing technique cancels the

mismatching of the resistor circuit by changing the direction of

the current flowing through the Hall plate using CMOS switches

and Hall voltage measurement taps, while maintaing the Hall-

voltage signal that is induced by the external magnetic flux. The

signal is then captured by a sample-and-hold circuit and further

processed using low-offset bipolar circuitry. This technique

produces devices that have an extremely stable quiescent Hall

output voltage, are immune to thermal stress, and have precise

recoverability after tem per a ture cycling. This technique will

also slightly degrade the device output repeatability. A relatively

high sampling frequency is used in order that faster signals can

be processed.

More detailed descriptions of the circuit operation can be

found in Technical Paper STP 97-10, Monolithic Magnetic Hall

Sensing Using Dynamic Quadrature Offset Cancellation and

Technical Paper STP 99-1, Chopper-Stabilized Amplifiers With A

Track-and-Hold Signal Demodulator.

Operation. The output of this device switches low (turns on)

when a magnetic field perpendicular to the Hall element exceeds

the operate point BOPS (or is less than BOPN). After turn-on, the

output is capable of sinking up to 1 mA and the output voltage is

VOUT(ON). When the magnetic field is reduced below the release

point BRPS (or increased above BRPN), the device output switches

high (turns off). The dif fer ence in the mag net ic operate and

release points is the hysteresis (Bhys) of the device. This built-in

hysteresis allows clean switching of the output even in the pres-

ence of external mechanical vibration and electrical noise.

As used here, negative flux densities are defined as less than

zero (algebraic convention) and -50 G is less than +10 G.

PERIOD

60 μs "AWAKE"

"SLEEP"

IDD(EN)

IDD(DIS)

SAMPLE &

OUTPUT LATCHED

Dwg. EH-012-1

SAMPLE

& HOLD

HALL

VOLTAGE

—

Dwg. AH-011-2

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Applications. Allegro's pole-independent sensing technique

allows for operation with either a north pole or south pole

magnet orientation, enhancing the flexibility of the device in ap-

plication assembling. The technology provides the same output

polarity for either pole face.

It is strongly recommended that an external bypass ca pac i tor

be con nect ed (in close proximity to the Hall element) between

the supply and ground of the device to reduce both external

noise and noise generated by the chopper-sta bi li za tion tech nique.

This is especially true due to the relatively high im ped ance of

battery supplies.

The sim plest form of magnet that will op er ate these devices

is a bar magnet with either pole near the branded surface of the

device. Many oth er meth ods of operation are possible. Ex ten-

sive ap pli ca tions in for ma tion on magnets and Hall-effect devices

is also available in the Allegro ap pli ca tion note 27701, or at

www.allegromicro.com

0+B

-B

OUTPUT ON

5 V

MAX BOPS

BRPS

BOPN

BRPN

OUTPUT VOLTAGE

MAGNETIC FLUX

OUTPUT OFF

OUTPUT

VDD

VOUT

GND

0.1

μF

10 pF

SUPPLY

(3 V BATTERY)

50 k

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Package LH, 3-Pin (SOT-23W)

0.55 REF

Gauge Plane

Seating Plane

0.25 BSC

0.95 BSC

0.95

1.00

0.70 2.40

AActive Area Depth, 0.28 mm REF

Reference land pattern layout

All pads a minimum of 0.20 mm from all adjacent pads; adjust as necessary

to meet application process requirements and PCB layout tolerances

Branding scale and appearance at supplier discretion

PCB Layout Reference View

Branded Face

CStandard Branding Reference View

N = Last two digits of device part number

T = Temperature code (letter)

NNT

N = Last three digits of device part number

NNN

2.90 +0.10

–0.20

8X 10° REF

0.180+0.020

–0.053

0.05 +0.10

–0.05

0.25 MIN

1.91 +0.19

–0.06

2.98 +0.12

–0.08

1.00 ±0.13

0.40 ±0.10

4°±4°

For Reference Only; not for tooling use (reference dwg. 802840)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

DHall element, not to scale

1.49

0.96

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Package UA, 3-Pin SIP

231

0.79 REF

1.27 NOM

2.16

MAX

0.51

REF

45°

2.07

1.33

Gate burr area

Dambar removal protrusion (6X)

Branding scale and appearance at supplier discretion

Hall element, not to scale

Active Area Depth, 0.50 mm REF

For Reference Only; not for tooling use (reference DWG-9049)

Dimensions in millimeters

Dimensions exclusive of mold flash, gate burrs, and dambar protrusions

Exact case and lead configuration at supplier discretion within limits shown

Standard Branding Reference View

= Supplier emblem

N = Last two digits of device part number

T = Temperature code

NNT

Mold Ejector

Pin Indent

Branded

Face

4.09 +0.08

–0.05

0.41 +0.03

–0.06

3.02 +0.08

–0.05

0.43 +0.05

–0.07

15.75 ±0.51

1.52 ±0.05

Micropower Ultra-Sensitive Hall-Ef fect Switches

A3213 and

A3214

Allegro MicroSystems, Inc.

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

Revision History

Revision Revision Date Description of Revision

Rev. Y October 29, 2012 Update product selection

Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-

mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the

information being relied upon is current.

Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the

failure of that life support device or system, or to affect the safety or effectiveness of that device or system.

The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;

nor for any in fringe ment of patents or other rights of third parties which may result from its use.

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