LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
LM2717-ADJ Dual Step-Down DC/DC Converter
Check for Samples: LM2717-ADJ
1FEATURES DESCRIPTION
The LM2717-ADJ is composed of two PWM DC/DC
2• Adjustable Buck Converter with a 2.2A, 0.16Ω,buck (step-down) converters. Both converters are
Internal Switch (Buck 1) used to generate an adjustable output voltage as low
• Adjustable Buck Converter with a 3.2A, 0.16Ω,as 1.267V. Both also feature low RDSON (0.16Ω)
Internal Switch (Buck 2) internal switches for maximum efficiency. Operating
frequency can be adjusted anywhere between
• Operating Input Voltage Range of 4V to 20V 300kHz and 600kHz allowing the use of small
• Input Undervoltage Protection external components. External soft-start pins for each
• 300kHz to 600kHz Pin Adjustable Operating converter enables the user to tailor the soft-start
Frequency times to a specific application. Each converter may
also be shut down independently with its own
• Over Temperature Protection shutdown pin. The LM2717-ADJ is available in a low
• Small 24-Lead TSSOP Package profile 24-lead TSSOP package ensuring a low profile
overall solution.
APPLICATIONS
• TFT-LCD Displays
• Handheld Devices
• Portable Applications
• Laptop Computers
• Automotive Applications
1Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2005–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
CBOOT1
CB1
SS1
CSS1
FB1 Buck
LM2717 - ADJ
CC1 RC1 VC1
RFFSLCT
SS2
CSS2
VBG
CBG
SHDN2
CC2 RC2 VC2
SW1
AGND
PGND
SHDN1
L1
D1COUT1
VOUT1
VIN CIN
VIN
SW2 VOUT2
COUT2
FB2
RFB3
RFB4
L2
D2
CB2 CBOOT2
Buck
Converter 2
Converter 1
RFB1
RFB2
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
Typical Application Circuit
Connection Diagram
Figure 1. 24-Lead TSSOP
Top View
2Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
PIN DESCRIPTIONS
Pin Name Function
1 PGND Power ground. PGND and AGND pins must be connected together directly at the part.
2 PGND Power ground. PGND and AGND pins must be connected together directly at the part.
3 AGND Analog ground. PGND and AGND pins must be connected together directly at the part.
4 FB1 Buck 1 output voltage feedback input.
5 VC1 Buck 1 compensation network connection. Connected to the output of the voltage error amplifier.
6 VBG Bandgap connection.
7 VC2 Buck 2 compensation network connection. Connected to the output of the voltage error amplifier.
8 FB2 Buck 2 output voltage feedback input.
9 AGND Analog ground. PGND and AGND pins must be connected together directly at the part.
10 AGND Analog ground. PGND and AGND pins must be connected together directly at the part.
11 PGND Power ground. PGND and AGND pins must be connected together directly at the part.
12 PGND Power ground. PGND and AGND pins must be connected together directly at the part.
13 SW2 Buck 2 power switch input. Switch connected between VIN pins and SW2 pin.
14 VIN Analog power input. All VIN pins are internally connected and should be connected together directly
at the part.
15 VIN Analog power input. All VIN pins are internally connected and should be connected together directly
at the part.
16 CB2 Buck 2 converter bootstrap capacitor connection.
17 SHDN2 Shutdown pin for Buck 2 converter. Active low.
18 SS2 Buck 2 soft start pin.
19 FSLCT Switching frequency select input. Use a resistor to set the frequency anywhere between 300kHz and
600kHz.
20 SS1 Buck 1 soft start pin.
21 SHDN1 Shutdown pin for Buck 1 converter. Active low.
22 CB1 Buck 1 converter bootstrap capacitor connection.
23 VIN Analog power input. All VIN pins are internally connected and should be connected together directly
at the part.
24 SW1 Buck 1 power switch input. Switch connected between VIN pins and SW1 pin.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Links: LM2717-ADJ
93% Duty
Cycle Limit
OSC
FSLCT
DC
LIMIT
SET
+
+
-
+
PWM
Comp RESET
-
+
OVP
Comp
Buck
Driver
BUCK
DRIVE
+
-
Error
Amp
BG
FB1
Bandgap
Soft
Start
Thermal
Shutdown
VBG VC1
OVP
TSH
SHDN1
SD
Buck Load
Current
Measurement
Buck 1 Converter
CB1
SS1
SW1
VIN
PGND
93% Duty
Cycle Limit
OSC
FSLCT
DC
LIMIT
SET
+
+
-
+
PWM
Comp RESET
-
+
OVP
Comp
Buck
Driver
BUCK
DRIVE
+
-
Error
Amp
BG
FB2
Bandgap
Soft
Start
Thermal
Shutdown
VBG VC2
OVP
TSH
SHDN2
SD
Buck Load
Current
Measurement
Buck 2 Converter
CB2
SS2
SW2
VIN
PGND
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
Block Diagram
4Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
VIN −0.3V to 22V
SW1 Voltage −0.3V to 22V
SW2 Voltage −0.3V to 22V
FB1, FB2 Voltages −0.3V to 7V
CB1, CB2 Voltages −0.3V to VIN+7V
(VIN=VSW)
VC1 Voltage 1.75V ≤VC1 ≤2.25V
VC2 Voltage 0.965V ≤VC2 ≤1.565V
SHDN1 Voltage −0.3V to 7.5V
SHDN2 Voltage −0.3V to 7.5V
SS1 Voltage −0.3V to 2.1V
SS2 Voltage −0.3V to 2.1V
FSLCT Voltage AGND to 5V
Maximum Junction Temperature 150°C
Power Dissipation(2) Internally Limited
Lead Temperature 300°C
Vapor Phase (60 sec.) 215°C
Infrared (15 sec.) 220°C
ESD Susceptibility (3) Human Body Model 2kV
(1) Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the
device is intended to be functional, but device parameter specifications may not be ensured. For ensured specifications and test
conditions, see the Electrical Characteristics table.
(2) The maximum allowable power dissipation is a function of the maximum junction temperature, TJ(MAX), the junction-to-ambient thermal
resistance, θJA, and the ambient temperature, TA. See the Electrical Characteristics table for the thermal resistance. The maximum
allowable power dissipation at any ambient temperature is calculated using: PD(MAX) = (TJ(MAX) −TA)/θJA. Exceeding the maximum
allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.
(3) The human body model is a 100 pF capacitor discharged through a 1.5kΩresistor into each pin.
Operating Conditions
Operating Junction Temperature Range
(1) −40°C to +125°C
Storage Temperature −65°C to +150°C
Supply Voltage 4V to 20V
SW1 Voltage 20V
SW2 Voltage 20V
Switching Frequency 300kHz to 600kHz
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% tested or specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard
Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Links: LM2717-ADJ
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
Electrical Characteristics
Specifications in standard type face are for TJ= 25°C and those with boldface type apply over the full Operating
Temperature Range (TJ=−40°C to +125°C). VIN = 5V, IL= 0A, and FSW = 300kHz unless otherwise specified.
Min Typ Max
Symbol Parameter Conditions Units
(1) (2) (1)
IQTotal Quiescent Current (both Not Switching 2.7 6mA
switchers) Switching, switch open 6 12 mA
VSHDN = 0V 9 27 µA
VBG Bandgap Voltage 1.248 1.294
1.267 V
1.230 1.299
%VBG/ΔVIN Bandgap Voltage Line 0.01
-0.01 %/V
Regulation 0.125
VFB1 Buck 1 Feedback Voltage 1.236 1.286
1.258 V
1.214 1.288
VFB2 Buck 2 Feedback Voltage 1.236 1.286
1.258 V
1.214 1.288
ICL1(3) Buck 1 Switch Current Limit VIN = 8V (4) 2.2 A
VIN = 12V, VOUT = 3.3V 1.4 1.65 2.0
ICL2(3) Buck 2 Switch Current Limit VIN = 8V (4) 3.2 A
VIN = 12V, VOUT = 5V 2.6 3.05 3.5
IB1 Buck 1 FB Pin Bias Current VIN = 20V 70 400 nA
(5)
IB2 Buck 2 FB Pin Bias Current VIN = 20V 65 400 nA
(5)
VIN Input Voltage Range 4 20 V
gm1 Buck 1 Error Amp ΔI = 20µA 1340 µmho
Transconductance
gm2 Buck 2 Error Amp ΔI = 20µA 1360 µmho
Transconductance
AV1 Buck 1 Error Amp Voltage 134 V/V
Gain
AV2 Buck 2 Error Amp Voltage 136 V/V
Gain
DMAX Maximum Duty Cycle 89 93 %
FSW Switching Frequency RF= 46.4k 240 300 360 kHz
RF= 22.6k 480 600 720 kHz
ISHDN1 Buck 1 Shutdown Pin Current 0V < VSHDN1 < 7.5V −5 5 µA
ISHDN2 Buck 2 Shutdown Pin Current 0V < VSHDN2 < 7.5V −5 5 µA
IL1 Buck 1 Switch Leakage VIN = 20V 0.01 5µA
Current
IL2 Buck 2 Switch Leakage VIN = 20V 0.01 5µA
Current
RDSON1 Buck 1 Switch RDSON(6) ISW = 100mA 180
160 mΩ
300
RDSON2 Buck 2 Switch RDSON(6) ISW = 100mA 180
160 mΩ
300
ThSHDN1 Buck 1 SHDN Threshold Output High 1.8 1.36 V
Output Low 1.33 0.7
(1) All limits specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are
100% tested or specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard
Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) Duty cycle affects current limit due to ramp generator.
(4) Current limit at 0% duty cycle. See TYPICAL PERFORMANCE section for Switch Current Limit vs. Input Voltage.
(5) Bias current flows into FB pin.
(6) Includes the bond wires and package leads, RDSON from VIN pin(s) to SW pin.
6Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
Electrical Characteristics (continued)
Specifications in standard type face are for TJ= 25°C and those with boldface type apply over the full Operating
Temperature Range (TJ=−40°C to +125°C). VIN = 5V, IL= 0A, and FSW = 300kHz unless otherwise specified.
Min Typ Max
Symbol Parameter Conditions Units
(1) (2) (1)
ThSHDN2 Buck 2 SHDN Threshold Output High 1.8 1.36 V
Output Low 1.33 0.7
ISS1 Buck 1 Soft Start Pin Current 4915 µA
ISS2 Buck 2 Soft Start Pin Current 4915 µA
UVP On Threshold 43.8 V
Off Threshold 3.6 3.3
θJA Thermal Resistance TSSOP, package only 115 °C/W
(7)
(7) Refer to the www.ti.com/packaging for more detailed thermal information and mounting techniques for the TSSOP package.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 7
Product Folder Links: LM2717-ADJ
4 6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
100
110
120
130
140
150
160
170
180
190
200
SWITCH RDS(ON) (m:
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6
LOAD CURRENT (A)
0
10
20
30
40
50
60
70
80
90
100
VIN = 5V
VIN = 12V
VIN = 18V
EFFICIENCY (%)
4 6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
100
110
120
130
140
150
160
170
180
190
200
SWITCH RDS(ON) (m:
4 6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
290
295
300
305
310
315
320
RF= 46.4k
SWITCHING FREQUENCY (kHz)
4 6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
0
1
2
3
4
5
6
7
8
9
QUIESCENT CURRENT (mA)
4 6 8 10 12 14 16 18 20
INPUT VOLTAGE (V)
QUIESCENT CURRENT (PA)
0
2
4
6
8
10
12
14
16
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
Typical Performance Characteristics
Shutdown IQvs. Input Voltage Switching IQvs. Input Voltage(FSW = 300kHz)
Figure 2. Figure 3.
Switching Frequency vs. Input Voltage(FSW = 300kHz) Buck 1 RDS(ON) vs. Input Voltage
Figure 4. Figure 5.
Buck 2 RDS(ON) vs. Input Voltage Buck 1 Efficiency vs. Load Current(VOUT = 3.3V)
Figure 6. Figure 7.
8Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
-40 -20 0 20 40 60 80
AMBIENT TEMPERATURE (oC)
2.8
2.9
3
3.1
3.2
3.3
3.4
SWITCH CURRENT LIMIT (A)
VOUT = 3.3V
VOUT = 5V
-40 -20 0 20 40 60 80
AMBIENT TEMPERATURE (oC)
1.4
1.45
1.5
1.55
1.6
1.65
1.7
SWITCH CURRENT LIMIT (A)
VOUT = 3.3V
VOUT = 5V
0 0.5 1 1.5 2 2.5
LOAD CURRENT (A)
0
10
20
30
40
50
60
70
80
90
100
EFFICIENCY (%)
VIN = 18V
0 0.5 1 1.5 2 2.5
LOAD CURRENT (A)
0
10
20
30
40
50
60
70
80
90
100
EFFICIENCY (%)
VIN = 18V
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
Typical Performance Characteristics (continued)
Buck 2 Efficiency vs. Load Current(VOUT = 15V) Buck 2 Efficiency vs. Load Current(VOUT = 5V)
Figure 8. Figure 9.
Buck 1 Switch Current Limit vs. Input Voltage Buck 2 Switch Current Limit vs. Input Voltage
Figure 10. Figure 11.
Buck 1 Switch Current Limit vs. Temperature(VIN = 12V) Buck 2 Switch Current Limit vs. Temperature(VIN = 12V)
Figure 12. Figure 13.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 9
Product Folder Links: LM2717-ADJ
20 25 30 35 40 45 50
200
250
300
350
400
450
500
550
600
650
700
RF(kW)
SWITCHING FREQUENCY (kHz)
VIN = 12V
-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
0
50
100
150
200
250
300
POWER SWITCH RDSON (mW)
VIN = 8V
-40 -20 0 20 40 60 80 100 120
JUNCTION TEMPERATURE (°C)
0
50
100
150
200
250
POWER SWITCH RDSON (mW)
VIN = 8V
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
Typical Performance Characteristics (continued)
Buck 1 Switch ON Resistance vs. Temperature Buck 2 Switch ON Resistance vs. Temperature
Figure 14. Figure 15.
Switching Frequency vs. RFResistance
Figure 16.
10 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
:
RFB1(3) = RFB2(4) xVOUT - VFB1(2)
VFB1(2)
VOUT
VIN , D' = (1-D)
D =
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
BUCK OPERATION
PROTECTION (BOTH REGULATORS)
The LM2717-ADJ has dedicated protection circuitry running during normal operation to protect the IC. The
Thermal Shutdown circuitry turns off the power devices when the die temperature reaches excessive levels. The
UVP comparator protects the power devices during supply power startup and shutdown to prevent operation at
voltages less than the minimum input voltage. The OVP comparator is used to prevent the output voltage from
rising at no loads allowing full PWM operation over all load conditions. The LM2717-ADJ also features a
shutdown mode for each converter decreasing the supply current to approximately 10µA (both in shutdown
mode).
CONTINUOUS CONDUCTION MODE
The LM2717-ADJ contains current-mode, PWM buck regulators. A buck regulator steps the input voltage down
to a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at
steady state), the buck regulator operates in two cycles. The power switch is connected between VIN and SW1
and SW2.
In the first cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the
inductor and the load current is supplied by COUT and the rising current through the inductor.
During the second cycle the transistor is open and the diode is forward biased due to the fact that the inductor
current cannot instantaneously change direction. The energy stored in the inductor is transferred to the load and
output capacitor.
The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as:
where
• where D is the duty cycle of the switch
• D and D′will be required for design calculation (1)
The LM2717-ADJ has a minimum switch ON time which corresponds to a minimum duty cycle of approximately
10% at 600kHz operation and approximately 5% at 300kHz operation. In the case of some high voltage
differential applications (low duty cycle operation) this minimum duty cycle may be exceeded causing the
feedback pin over-voltage protection to trip as the output voltage rises. This will put the device into a PFM type
operation which can cause an unpredictable frequency spectrum and may cause the average output voltage to
rise slightly. If this is a concern the switching frequency may be lowered and/or a pre-load added to the output to
keep the device full PWM operation. Note that the OVP function monitors the FB pin so it will not function if the
feedback resistor is disconnected from the output. Due to slight differences between the two converters it is
recommended that Buck 1 be used for the lower of the two output voltages for best operation.
DESIGN PROCEDURE
This section presents guidelines for selecting external components.
SETTING THE OUTPUT VOLTAGE
The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in
Figure 20. The feedback pin voltage (VFB) is 1.258V, so the ratio of the feedback resistors sets the output voltage
according to the following equation:
(2)
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 11
Product Folder Links: LM2717-ADJ
(H)LMIN = (D-0.5+2/S)(VIN-VOUT)RDSON
(1-D)(0.164*FSW)
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
INPUT CAPACITOR
A low ESR aluminum, tantalum, or ceramic capacitor is needed between the input pin and power ground. This
capacitor prevents large voltage transients from appearing at the input. The capacitor is selected based on the
RMS current and voltage requirements. The RMS current is given by:
(3)
The RMS current reaches its maximum (IOUT/2) when VIN equals 2VOUT. This value should be calculated for both
regulators and added to give a total RMS current rating. For an aluminum or ceramic capacitor, the voltage rating
should be at least 25% higher than the maximum input voltage. If a tantalum capacitor is used, the voltage rating
required is about twice the maximum input voltage. The tantalum capacitor should be surge current tested by the
manufacturer to prevent being shorted by the inrush current. The minimum capacitor value should be 47µF for
lower output load current applications and less dynamic (quickly changing) load conditions. For higher output
current applications or dynamic load conditions a 68µF to 100µF low ESR capacitor is recommended. It is also
recommended to put a small ceramic capacitor (0.1µF to 4.7µF) between the input pins and ground to reduce
high frequency spikes.
INDUCTOR SELECTION
The most critical parameter for the inductor in a current mode switcher is the minimum value required for stable
operation. To prevent subharmonic oscillations and achieve good phase margin a target minimum value for the
inductor is:
(4)
Where VIN is the minimum input voltage and RDSON is the maximum switch ON resistance. For best stability the
inductor should be in the range of 0.5LMIN (absolute minimum) and 2LMIN. Using an inductor with a value less
than 0.5LMIN can cause subharmonic oscillations. The inductor should meet this minimum requirement at the
peak inductor current expected for the application regardless of what the inductor ripple current and output ripple
voltage requirements are. A value larger than 2LMIN is acceptable if the ripple requirements of the application
require it but it may reduce the phase margin and increase the difficulty in compensating the circuit.
The most important parameters for the inductor from an applications standpoint are the inductance, peak current
and the DC resistance. The inductance is related to the peak-to-peak inductor ripple current, the input and the
output voltages (for 300kHz operation):
(5)
A higher value of ripple current reduces inductance, but increases the conductance loss, core loss, and current
stress for the inductor and switch devices. It also requires a bigger output capacitor for the same output voltage
ripple requirement. A reasonable value is setting the ripple current to be 30% of the DC output current. Since the
ripple current increases with the input voltage, the maximum input voltage is always used to determine the
inductance. The DC resistance of the inductor is a key parameter for the efficiency. Lower DC resistance is
available with a bigger winding area. A good tradeoff between the efficiency and the core size is letting the
inductor copper loss equal 2% of the output power.
OUTPUT CAPACITOR
The selection of COUT is driven by the maximum allowable output voltage ripple. The output ripple in the constant
frequency, PWM mode is approximated by:
(6)
The ESR term usually plays the dominant role in determining the voltage ripple. Low ESR ceramic, aluminum
electrolytic, or tantalum capacitors (such as MuRata MLCC, Taiyo Yuden MLCC, Nichicon PL series, Sanyo OS-
CON, Sprague 593D, 594D, AVX TPS, and CDE polymer aluminum) is recommended. An aluminum electrolytic
capacitor is not recommended for temperatures below −25°C since its ESR rises dramatically at cold
temperatures. Ceramic or tantalum capacitors have much better ESR specifications at cold temperature and is
preferred for low temperature applications.
12 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
BOOTSTRAP CAPACITOR
A 4.7nF ceramic capacitor or larger is recommended for the bootstrap capacitor. For applications where the input
voltage is less than twice the output voltage a larger capacitor is recommended, generally 0.1µF to 1µF to
ensure plenty of gate drive for the internal switches and a consistently low RDSON.
SOFT-START CAPACITOR (BOTH REGULATORS)
The LM2717-ADJ contains circuitry that can be used to limit the inrush current on start-up of the DC/DC
switching regulators. This inrush current limiting circuitry serves as a soft-start. The external SS pins are used to
tailor the soft-start for a specific application. A current (ISS) charges the external soft-start capacitor, CSS. The
soft-start time can be estimated as:
TSS = CSS*0.6V/ISS (7)
When programming the soft-start time use the equation given in the Soft-Start Capacitor section above. The soft-
start function is used simply to limit inrush current to the device that could stress the input voltage supply. The
soft-start time described above is the time it takes for the current limit to ramp to maximum value. When this
function is used the current limit starts at a low value and increases to nominal at the set soft-start time. Under
maximum load conditions the output voltage may rise at the same rate as the soft-start, however at light or no
load conditions the output voltage will rise much faster as the switch will not need to conduct much current to
charge the output capacitor.
SHUTDOWN OPERATION (BOTH REGULATORS)
The shutdown pins of the LM2717-ADJ are designed so that they may be controlled using 1.8V or higher logic
signals. If the shutdown function is not to be used the pin may be left open. The maximum voltage to the
shutdown pin should not exceed 7.5V. If the use of a higher voltage is desired due to system or other constraints
it may be used, however a 100k or larger resistor is recommended between the applied voltage and the
shutdown pin to protect the device.
SCHOTTKY DIODE
The breakdown voltage rating of D1and D2is preferred to be 25% higher than the maximum input voltage. The
current rating for the diode should be equal to the maximum output current for best reliability in most
applications. In cases where the input voltage is much greater than the output voltage the average diode current
is lower. In this case it is possible to use a diode with a lower average current rating, approximately (1-D)*IOUT
however the peak current rating should be higher than the maximum load current.
LOOP COMPENSATION
The general purpose of loop compensation is to meet static and dynamic performance requirements while
maintaining stability. Loop gain is what is usually checked to determine small-signal performance. Loop gain is
equal to the product of control-output transfer function and the output-control transfer function (the compensation
network transfer function). The DC loop gain of the LM2717 is usually around 55dB to 60dB when loaded.
Generally speaking it is a good idea to have a loop gain slope that is -20dB /decade from a very low frequency to
well beyond the crossover frequency. The crossover frequency should not exceed one-fifth of the switching
frequency, i.e. 60kHz in the case of 300kHz switching frequency. The higher the bandwidth is, the faster the load
transient response speed will potentially be. However, if the duty cycle saturates during a load transient, further
increasing the small signal bandwidth will not help. Since the control-output transfer function usually has very
limited low frequency gain, it is a good idea to place a pole in the compensation at zero frequency, so that the
low frequency gain will be relatively large. A large DC gain means high DC regulation accuracy (i.e. DC voltage
changes little with load or line variations). The rest of the compensation scheme depends highly on the shape of
the control-output plot.
As shown in Figure 17, the example control-output transfer function consists of one pole (fp), one zero (fz), and a
double pole at fn (half the switching frequency). The following can be done to create a -20dB /decade roll-off of
the loop gain: Place the first pole at 0Hz, the first zero at fp, the second pole at fz, and the second zero at fn.
The resulting output-control transfer function is shown in Figure 18.
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM2717-ADJ
fp max =
2S 300k 10P 100 PF
x
x
x
0.5
1
2S 5: 100 PF
x
x
+
= 584 Hz
fp min =
2S 300k 10P 100 PF
x
x
x
0.5
1
2S 50: 100 PF
x
x
+
= 297 Hz
fz = 1
2S 20 m: 100 PF
x
x
= 80 kHz
10 100 1k 10k 100k 1M
FREQUENCY (Hz)
-60
-40
-20
0
20
GAIN (dB)
0
-45
-90
-135
-180
PHASE (°)
Asymptotic
Gain
Phase
-20dB/dec
(fp1 is at zero frequency)
-20dB/dec
FREQUENCY
GAIN (dB)
B
fz1 fz2
fp2
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
Figure 17. Control-Output Transfer Function Figure 18. Output-Control Transfer Function
The control-output corner frequencies, and thus the desired compensation corner frequencies, can be
determined approximately by the following equations:
where
• Cois the output capacitance
• Reis the output capacitance ESR
• f is the switching frequency (8)
where
• Cois the output capacitance
• Rois the load resistance
• f is the switching frequency (9)
Since fp is determined by the output network, it will shift with loading (Ro) and duty cycle. First determine the
range of frequencies (fpmin/max) of the pole across the expected load range, then place the first compensation
zero within that range.
Example: Vo= 5V, Re= 20mΩ, Co= 100µF, Romax = 5V/100mA = 50Ω, Romin = 5V/1A = 5Ω, L = 10µH, f =
300kHz:
(10)
(11)
(12)
Once the fp range is determined, Rc1 should be calculated using:
14 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
Vo
Vc
R2
R1
gm
compensation
network
CC1 CC2
RC1 RC2
Cc1 = 1
2S 297 Hz 9.76k
x
x
|56 nF
Rc1 = 20k + 59k
20k |9.76k
1350P
3.3
x
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
where
• B is the desired gain in V/V at fp (fz1)
• gm is the transconductance of the error amplifier
• 1 and R2 are the feedback resistors as shown in Figure 19 (13)
A gain value around 10dB (3.3v/v) is generally a good starting point.
Example: B = 3.3 v/v, gm=1350µmho, R1 = 20 KΩ,R2=59KΩ:
(14)
Bandwidth will vary proportional to the value of Rc1. Next, Cc1 can be determined with the following equation:
(15)
Example: fpmin = 297 Hz, Rc1 = 20 KΩ:
(16)
The value of Cc1 should be within the range determined by fpmin/max. A higher value will generally provide a
more stable loop, but too high a value will slow the transient response time.
The compensation network (Figure 19) will also introduce a low frequency pole which will be close to 0Hz.
A second pole should also be placed at fz. This pole can be created with a single capacitor Cc2 and a shorted
Rc2 (see Figure 19). The minimum value for this capacitor can be calculated by:
(17)
Cc2 may not be necessary, however it does create a more stable control loop. This is especially important with
high load currents.
Example: fz = 80 kHz, Rc1 = 20 KΩ:
(18)
A second zero can also be added with a resistor in series with Cc2. If used, this zero should be placed at fn,
where the control to output gain rolls off at -40dB/dec. Generally, fn will be well below the 0dB level and thus will
have little effect on stability. Rc2 can be calculated with the following equation:
(19)
Figure 19. Compensation Network
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM2717-ADJ
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
Note that the values calculated here give a good baseline for stability and will work well with most applications.
The values in some cases may need to be adjusted some for optimum stability or the values may need to be
adjusted depending on a particular applications bandwidth requirements.
LAYOUT CONSIDERATIONS
The LM2717-ADJ uses two separate ground connections, PGND for the drivers and boost NMOS power device
and AGND for the sensitive analog control circuitry. The AGND and PGND pins should be tied directly together
at the package. The feedback and compensation networks should be connected directly to a dedicated analog
ground plane and this ground plane must connect to the AGND pin. If no analog ground plane is available then
the ground connections of the feedback and compensation networks must tie directly to the AGND pin.
Connecting these networks to the PGND can inject noise into the system and effect performance.
The input bypass capacitor CIN, as shown in Figure 20, must be placed close to the IC. This will reduce copper
trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a 0.1µF to 4.7µF
bypass capacitors can be placed in parallel with CIN, close to the VIN pins to shunt any high frequency noise to
ground. The output capacitors, COUT1 and COUT2, should also be placed close to the IC. Any copper trace
connections for the COUTX capacitors can increase the series resistance, which directly effects output voltage
ripple. The feedback network, resistors RFB1(3) and RFB2(4), should be kept close to the FB pin, and away from the
inductor to minimize copper trace connections that can inject noise into the system. Trace connections made to
the inductors and schottky diodes should be minimized to reduce power dissipation and increase overall
efficiency. For more detail on switching power supply layout considerations see Application Note AN-1149:
Layout Guidelines for Switching Power Supplies (SNVA021).
APPLICATION INFORMATION
Table 1. Some Recommended Inductors (Others May Be Used)
Manufacturer Inductor Contact Information
Coilcraft DO3316 and DT3316 series www.coilcraft.com
800-3222645
TDK SLF10145 series www.component.tdk.com
847-803-6100
Pulse P0751 and P0762 series www.pulseeng.com
Sumida CDRH8D28 and CDRH8D43 series www.sumida.com
Table 2. Some Recommended Input And Output Capacitors (Others May Be Used)
Manufacturer Capacitor Contact Information
Vishay Sprague 293D, 592D, and 595D series tantalum www.vishay.com
Taiyo Yuden High capacitance MLCC ceramic www.t-yuden.com
ESRD seriec Polymer Aluminum Electrolytic
Cornell Dubilier www.cde.com
SPV and AFK series V-chip series
MuRata High capacitance MLCC ceramic www.murata.com
16 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
PGND
FB1
VC1
VBG
SS2
VC2
FB2
AGND
AGND
PGND
PGND
PGND
SW1
VIN
CB1
SHDN1
SS1
FSLCT
SHDN2
SW2
LM2717-ADJ
L2
22 mH
D2
MBRS240
COUT2
68 mF
COUT1
3.3V OUT1
8V to 20V IN
5V OUT2
PGND
RFB3
59k
RFB4
20k
RF
*Connect CINA (pin
23) and CINB (pins
14,15) as close as
possible to the VIN
pins.
68 mF
COUT1A
1mF
ceramic
L1
22 mH
D1
MBRS240
CBOOT1
*CINA CIN
68 mF
U1
CSS1
CC1
CBG
CC2
CSS2
AGND
RC2
RC1
20k
10k
4.7 nF
1 nF
47 nF
4.7 nF
47 nF
VIN
VIN
CB2
AGND
*CINB
4.7 mF
ceramic
4.7 mF
ceramic
1mF
CBOOT2
COUT2A
1mF
ceramic
22.6k
RFB1
RFB2
33.2k20k 1mF
PGND
FB1
VC1
VBG
SS2
VC2
FB2
AGND
AGND
PGND
PGND
PGND
SW1
VIN
CB1
SHDN1
SS1
FSLCT
SHDN2
SW2
LM2717-ADJ
L2
22 mH
D2
MBRS240
COUT2
68 mF
COUT1
3.3V OUT1
17V to 20V IN
15V OUT2
PGND
RFB3
221k
RFB4
20k
RF
*Connect CINA (pin
23) and CINB (pins
14,15) as close as
possible to the VIN
pins.
68 mF
COUT1A
1mF
ceramic
L1
22 mH
D1
MBRS240
4.7 nF
CBOOT1
*CINA CIN
68 mF
U1
CSS1
CC1
CBG
CC2
CSS2
AGND
RC2
RC1
20k
2k
4.7 nF
1 nF
47 nF
4.7 nF
47 nF
VIN
VIN
CB2
AGND
*CINB
4.7 mF
ceramic
4.7 mF
ceramic
1mF
CBOOT2
COUT2A
1mF
ceramic
22.6k
RFB1
RFB2
33.2k20k
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
Figure 20. 15V, 3.3V Output Application
Figure 21. 5V, 3.3V Output Application
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 17
Product Folder Links: LM2717-ADJ
PGND
FB1
VC1
VBG
SS2
VC2
FB2
AGND
AGND
PGND
PGND
PGND
SW1
VIN
CB1
SHDN1
SS1
FSLCT
SHDN2
SW2
LM2717-ADJ
L2
10 mH
D2
MBRS240
COUT2
47 mF
ceramic
COUT1
1.8V OUT1
5V to 15V IN
3.3V OUT2
PGND
RFB3
33.2k
RFB4
20k
RF
*Connect CINA (pin
23) and CINB (pins
14,15) as close as
possible to the VIN
pins.
47 mF
ceramic
COUT1A
47 mF
ceramic
L1
10 mH
D1
MBRS240
CBOOT1
*CINA CIN
68 mF
U1
CSS1
CC1
CBG
CC2
CSS2
AGND
RC2
RC1
2k
2k
82 nF
1 nF
47 nF
82 nF
47 nF
VIN
VIN
CB2
AGND
*CINB
4.7 mF
ceramic
4.7 mF
ceramic
1mF
CBOOT2
COUT2A
47 mF
ceramic
22.6k
RFB1
RFB2
8.66k20.5k 1mF
LM2717-ADJ
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
www.ti.com
Figure 22. 3.3V, 1.8V Output Application
18 Submit Documentation Feedback Copyright © 2005–2013, Texas Instruments Incorporated
Product Folder Links: LM2717-ADJ
LM2717-ADJ
www.ti.com
SNVS407C –DECEMBER 2005–REVISED MARCH 2013
REVISION HISTORY
Changes from Revision B (March 2013) to Revision C Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 18
Copyright © 2005–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LM2717-ADJ
PACKAGE OPTION ADDENDUM
www.ti.com 7-Oct-2013
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead/Ball Finish MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM2717MT-ADJ/NOPB ACTIVE TSSOP PW 24 61 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM2717
MT-ADJ
LM2717MTX-ADJ/NOPB ACTIVE TSSOP PW 24 2500 Green (RoHS
& no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LM2717
MT-ADJ
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM2717MTX-ADJ/NOPB TSSOP PW 24 2500 330.0 16.4 6.95 8.3 1.6 8.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM2717MTX-ADJ/NOPB TSSOP PW 24 2500 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 23-Sep-2013
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products Applications
Audio www.ti.com/audio Automotive and Transportation www.ti.com/automotive
Amplifiers amplifier.ti.com Communications and Telecom www.ti.com/communications
Data Converters dataconverter.ti.com Computers and Peripherals www.ti.com/computers
DLP® Products www.dlp.com Consumer Electronics www.ti.com/consumer-apps
DSP dsp.ti.com Energy and Lighting www.ti.com/energy
Clocks and Timers www.ti.com/clocks Industrial www.ti.com/industrial
Interface interface.ti.com Medical www.ti.com/medical
Logic logic.ti.com Security www.ti.com/security
Power Mgmt power.ti.com Space, Avionics and Defense www.ti.com/space-avionics-defense
Microcontrollers microcontroller.ti.com Video and Imaging www.ti.com/video
RFID www.ti-rfid.com
OMAP Applications Processors www.ti.com/omap TI E2E Community e2e.ti.com
Wireless Connectivity www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated