NJW4814 Dual H-Bridge Driver with Boost Converter GENERAL DESCRIPTION The NJW4814 is a dual H-bridge driver with boost converter IC. It can boost the output voltage from Li-ion battery and/or a 5V power supply and drives a piezo device by two H- bridge drivers. 48ms of internal fixed soft start function of the boost circuit sets a limit to startup current. The dual H-bridge drivers have independent signal inputs and a fault output function, therefore the NJW4814 improves controllability from a microcomputer. The input frequency of H-bridge driver is up to 300kHz. FEATURES Boost Converter Block H-Bridge Driver Block Under Voltage Lockout Built-in Thermal Shutdown Standby Function Package Outline Ver.2015-04-07 Output Switch Voltage Switching Current PWM Control Operating Voltage Range Oscillation Frequency Range Soft Start Function Over Current Protection Over Voltage Protection Internal 2 Channel H-Bridge Each Channel Operates Individually Over Current Protection Operating Voltage Range Switching Frequency Output Shut Down Control Fault Indicator Output PACKAGE OUTLINE NJW4814MLE 40V max. 1.5A min. 2.7 to 5.5V 380k to 1MHz 48ms typ. 300mA typ. 7.0 to 35V 300kHz max. NJW4814MLE : EQFN24-LE -1- NJW4814 PIN CONFIGURATION OUTA1 PGND OUTB1 VDD_HB VOVP OUTB2 18 17 16 15 14 13 12 OUTA2 SW 19 PGND 20 11 PGND RADJ 21 10 FLT FB 22 9 INB2 RT 23 8 INB1 GND 24 7 INA2 3 4 5 6 STBYb SHDNAb SHDNBb INA1 IN- Exposed PAD on backside connect to GND 2 VDD_SW 1 PIN FUNCTION 1. IN2. VDD_SW 3. STBYb 4. SHDNAb 5. SHDNBb 6. INA1 7. INA2 8. INB1 9. INB2 10. FLT 11. PGND 12. OUTA2 13. OUTA1 14. PGND 15. OUTB1 16. VDD_HB 17. VOVP 18. OUTB2 19. SW 20. PGND 21. RADJ 22. FB 23. RT 24. GND < Top View> NJW4814MLE -2- Ver.2015-04-07 NJW4814 BLOCK DIAGRAM UVLO VDD_SW Standby ON/OFF STBYb FB SW PWM ERR.AMP Oscillator IN- Buffer RADJ Vref 1.0V Soft Start Thermal Shutdown OVP OCP VOVP RT VDD_HB FLT High Side Gate Driver UVLO High Side Gate Driver OUTA1 OUTA2 INA1 Control Logic SHDNAb Low Side Gate Driver Low Side Gate Driver High Side Gate Driver High Side Gate Driver Control Logic INA2 OCP OUTB1 OUTB2 INB1 SHDNBb INB2 Control Logic Low Side Gate Driver Control Logic GND Ver.2015-04-07 Low Side Gate Driver PGND -3- NJW4814 ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL Boost Converter Block Supply Voltage SW pin Voltage RADJ pin Voltage IN- pin Voltage STBYb pin Voltage VOVP pin Voltage (*2) H-Bridge Driver Block Supply Voltage SHDNAb, SHDNBb pin Voltage INA1, INA2, INB1, INB2 pin Voltage (Ta=25C) UNIT MAXIMUM RATINGS VDD_SW VSW VRADJ VINVSTBYb VOVP -0.3 to +6 -0.3 to +40 -0.3 to +6 (*1) -0.3 to +6 (*1) -0.3 to +6 (*1) -0.3 to +40 V V V V V V VDD_HB VSHDNAb VSHDNBb VINA1 , VINA2 VINB1 , VINB2 -0.3 to +40 V -0.3 to +6 (*1) V -0.3 to +6 (*1) V -0.3 to +6 910 (*3) 2,100 (*4) -40 to +150 -40 to +85 -40 to +150 V General FLT pin Voltage VFLT Power Dissipation PD Junction Temperature Range Operating Temperature Range Storage Temperature Range Tj Topr Tstg mW C C C (*1): When Supply voltage is less than +6V, the absolute maximum voltage is equal to the Supply voltage. (*2): VOVP pin should be connected to VDD_HB pin. (*3): Mounted on glass epoxy board. (101.5x114.5x1.6mm: based on EIA/JEDEC standard, 2Layers FR-4, with Exposed Pad) (*4): Mounted on glass epoxy board. (101.5x114.5x1.6mm: based on EIA/JEDEC standard, 4Layers FR-4, with Exposed Pad) (For 4Layers: Applying 99.5x99.5mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD51-5) RECOMMENDED OPERATING CONDITIONS PARAMETER SYMBOL Boost Converter Block Supply Voltage STBYb pin Voltage Timing Resistor Oscillating Frequency H-Bridge Driver Block Supply Voltage Output Switch DC Current SHDNAb, SHDNBb pin Voltage IN1A, IN1B, IN2A, IN2B pin Voltage FLT pin Voltage -4- MIN. TYP. MAX. UNIT VDD_SW VSTBYb RT fOSC 2.7 0 68 380 - 100 700 5.5 VDD_SW 200 1,000 V V k kHz VDD_HB IOM VSHDNAb VSHDNBb VINA1 , VINA2 VINB1 , VINB2 VFLT 7 0 - 20 35 - V mA 0 - VDD_SW V 0 - VDD_SW V 0 - 5.5 V Ver.2015-04-07 NJW4814 ELECTRICAL CHARACTERISTICS Boost Converter Block (Unless otherwise noted, VDD_SW=VSTBYb=3.7V, RT=100k , Ta=25 C) PARAMETER Under Voltage Lockout Block UVLO Release Voltage UVLO Operate Voltage UVLO Hysteresis Voltage Soft Start Block Soft Start Time Oscillator Block Oscillation Frequency Oscillation Frequency deviation (Supply voltage) Oscillation Frequency deviation (Temperature) SYMBOL TEST CONDITION VRUVLO_SW VDUVLO_SW VUVLO_SW VRUVLO_SW - VDUVLO_SW MIN. TYP. MAX. UNIT 2.1 2.0 - 2.4 2.2 0.2 2.7 2.5 - V V V TSS VB=0.95V 34 48 60 ms fOSC RT=100k 630 700 770 kHz fDV VDD_SW=3.0V to 5.5V - 1 - % fDT Ta= -40 C to +85 C - 3 - % -1.0% 1.00 +1.0% V -0.1 - +0.1 A 4.8 5.2 5.6 V Error Amplifier Block Reference Voltage VB Input Bias Current IB IN- pin Clamp Voltage RADJ pin FET ON Resistance RADJ pin FET Leak Current PWM Comparate Block Maximum Duty Cycle VCLIN- Short IN- and FB, Measuring IN- Pin VB=1.0V VSTBYb=0V, VDD_SW=5.5V, ICLIN-=10 A RON_RADJ IRADJ=10mA - 6 12 ILEAK_RADJ VSTBYb=0V, VRADJ=3.3V - - 1 A MAXDUTY VIN-=0.9V 90 93 98 % - 0.6 1.2 1.5 - 2 - - 1 A A 36 31 - 38 33 5 40 35 - V V V - 60 120 A 1,200 2,400 4,000 A - - 1 A Output Block Switching FET ON Resistance Switching Current Limit Switching FET Leak Current RON_SW ISW=100mA ILMT_SW ILEAK_SW VSTBYb=0V, VSW=40V Overvoltage Protection Block OVP Operate Voltage OVP Release Voltage OVP Hysteresis Voltage VDOVP VROVP VOVP OVP pin Input Current 1 IOVP1 OVP pin Input Current 2 IOVP2 OVP pin Leak Current Ver.2015-04-07 IOVP_LEAK VDOVP -VROVP VOVP= VDD_HB=35V, OVP Release VOVP= VDD_HB=40V, OVP Operate VSTBYb=0V, VOVP= VDD_HB=40V -5- NJW4814 ELECTRICAL CHARACTERISTICS H-Bridge Driver Block (Unless otherwise noted, VDD_SW=VSTBYb=VSHDNAb=VSHDNBb=3.7V, VDD_HB=25V, RT=100k , Ta=25 C) INA1, INA2, INB1, INB2 pin, OUTA1, OUTA2, OUTB1, OUTB2 pin and SHDNAb, SHDNBb pin are common PARAMETER Under Voltage Lockout Block UVLO Release Voltage UVLO Operate Voltage UVLO Hysteresis Voltage Input Block IN pin High Voltage IN pin Low Voltage IN pin Input Current SHDNb pin High Voltage (Operating Mode) SHDNb pin Low Voltage (Shutdown Mode) SHDNb pin Pull-down Resistance Output Block High Side SW ON Resistance Low Side SW ON Resistance High Side Over Current Detection Low Side Over Current Detection Output Rise Time Output Fall Time Rise Dead Time Fall Dead Time Rise Delay Time Fall Delay Time Input Frequency High Side SW OFF Leak Current Low Side SW OFF Leak Current OUT pin - VDD pin Potential Difference GND pin - OUT pin Potential Difference -6- SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT 5.6 5.0 - 6.2 5.6 0.6 6.8 6.2 - V V V 1.0 0 - - - - VDD_SW 0.4 1 V V A VIHSHDNb 1.0 - VDD_SW V VILSHDNb 0 - 0.4 V VSHDNb=3.3V 210 300 390 k RDSH RDSL IOSOURCE=20mA IOSINK=20mA 4.0 4.0 6.0 6.0 8.0 8.0 IDCTH High-Side 200 300 400 mA IDCTL Low-Side 200 300 400 mA - - - - - - - 400 340 200 180 310 270 - - - - - - - 300 ns ns ns ns ns ns kHz - - 1 A - - 1 A - 0.7 1.0 V - 0.7 1.0 V VRUVLO_HB VDUVLO_HB VUVLO_HB VRUVLO_HB - VDUVLO_HB VIHIN VILIN IIIN RPDSHDNb tr tf Dtr Dtf td_ON td_OFF fIN IOLEAKOUTH IOLEAKOUTL VPDOV VPDGO VIN = 3.3 V VIN=0 to 3.3V VIN=0 to 3.3V VIN=0 to 3.3V VIN=0 to 3.3V VIN=0 to 3.3V VIN=0 to 3.3V VSTBYb=VSHDNb=0V, VOUT=0V VSTBYb=VSHDNb=0V, VOUT=25V VSTBYb=VSHDNb=0V, IORH=20mA VSTBYb=VSHDNb=0V, IORL=20mA Ver.2015-04-07 NJW4814 ELECTRICAL CHARACTERISTICS General Characteristics (Unless otherwise noted, VDD_SW=VSTBYb=VSHDNAb=VSHDNBb=3.7V, VDD_HB=25V, RT=100k , Ta=25 C) INA1, INA2, INB1, INB2 pin, OUTA1, OUTA2, OUTB1, OUTB2 pin and SHDNAb, SHDNBb pin are common PARAMETER STBYb pin High Voltage (Operating Mode) STBYb pin Low Voltage (Standby Mode) STBYb pin Pull Down Resistance FLT pin Low Level Output Voltage FLT pin OFF Leak Current Quiescent Current (Switching Regulator Block) Quiescent Current (H-Bridge Driver Block) Quiescent Current (Standby) Ver.2015-04-07 SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT VIHSTBYb 1.0 - VDD_SW V VILSTBYb 0 - 0.4 V RPDSTBYb VSTBYb=3.3V 210 300 390 k VLFLT IFLT=500 A - 0.20 0.40 V IOLEAKFLT VFLT=5.5V - - 1 A IQSW No Load - 1.9 2.8 mA - 1.0 2.0 mA - 1.6 3.6 A IQHB IQSTBY fINA= fINB=10kHz antiphase 50% Duty Cycle VSTBYb=VSHDNb=0V VDD_HB=0V, -7- NJW4814 TYPICAL CHARACTERISTICS (Boost Converter Block) 900 800 700 600 500 400 300 80 100 120 140 160 180 Timing Resistor RT (kW) 740 720 700 680 660 640 620 -50 1.02 1.01 1.00 0.99 0.98 0.97 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) Output ON Resistance vs. Temperature (VDD_SW=3.7V, ISW=100mA) 1.6 Output ON Resistance RON_SW (W) 1.03 Reference Voltage VB (V) 760 200 Reference Voltage vs. Temperature (VDD_SW=3.7V) 1.04 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.96 -50 Switching Current Limit ILMT_SW (A) 780 600 60 3 Oscillation Frequency vs. Temperature (VDD_SW=3.7V, RT=100kW) 800 Oscillation Frequency fosc (kHz) Oscillation Frequency fOSC (kHz) 1000 Oscillation Frequency vs. Timing Resistor (VDD_SW=3.7V, Ta=25C) -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) Switching Current Limit vs. Temperature (VDD_SW=3.7V) 2.5 2 1.5 1 0.5 0 -50 -8- -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) Ver.2015-04-07 NJW4814 TYPICAL CHARACTERISTICS (H-Bridge Driver Block) 12 Low Side SW ON Resistance RDSL (W) High Side SW ON Resistance RDSH (W) 12 High Side SW ON Resistance vs. Temperature (VDD_HB=25V, IOSOURCE=20mA) 10 8 6 4 2 0 8 6 4 2 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) -50 350 300 250 200 150 100 50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) Low Side Over Current Detection vs. Temperature (VDD_HB=25V) 400 Low Side Over Current Detection IDCTL (mA) High Side Over Current Detection vs. Temperature (VDD_HB=25V) 400 High Side Over Current Detection IDCTH (mA) 10 0 -50 0 350 300 250 200 150 100 50 0 -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) -50 Output Rise Time vs. Temperature (VDD_HB=25V, VIN=0 to 3.3V) 600 500 400 300 200 100 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) Output Fall Time vs. Temperature (VDD_HB=25V, VIN=0 to 3.3V) 600 Output Fall Time tf (ns) Output Rise Time tr (ns) Low Side SW ON Resistance vs. Temperature (VDD_HB=25V, IOSINK=20mA) 500 400 300 200 100 0 0 -50 Ver.2015-04-07 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) -9- NJW4814 TYPICAL CHARACTERISTICS (General Characteristics) Quiescent Current vs. Supply Voltage (RT=100kW, No Load, Ta=25C) 3 Quiescent Current vs. Temperature (VDD_SW=3.7V, RT=100kW, No Load) 3 Switching Regulator Block Quiescent Current IQSW (mA) Quiescent Current IQSW (mA) Switching Regulator Block 2.5 2 1.5 1 0.5 2.5 2 1.5 1 0.5 0 0 2 6 -50 Quiescent Current vs. Supply Voltage (VDD_SW=3.7V, fINA=fINB=10kHz, Ta=25C) 2.0 2.0 H-Bridge Driver Block 1.8 Quiescent Current IQHB (mA) Quiescent Current IQHB (mA) 3 4 5 Supply Voltage VDD_SW (V) 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 25 50 75 100 125 150 Ambient Temperature Ta (C) Quiescent Current vs. Temperature (VDD_SW=3.7V, VDD_HB=25V, fIN1=fIN2=10kHz) H-Bridge Driver Block 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 0.0 0 5 10 15 20 25 30 Supply Voltage VDD_HB (V) 35 40 -50 Quiecent Current vs. Input Frequency (VDD_SW=3.7V, VDD_HB=25V, Ta=25C) 3.0 10 H-Bridge Driver Block -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) Standby Current vs. Temperature (VDD_SW=3.7V, VDD_HB=0V, VSTBYb=VSHDNb=0V) 9 2.5 Standby Current IQSTBY (A) Quiecent Current IQHB (mA) -25 2.0 1.5 1.0 0.5 8 7 6 5 4 3 2 1 0.0 0 - 10 - 50 100 150 200 250 Input Frequency fIN (kHz) 300 0 -50 -25 0 25 50 75 100 125 150 Ambient Temperature Ta (C) Ver.2015-04-07 NJW4814 H-Bridge Driver Block Pin Operation Table Ach SHDNAb Low High High High High * Don't Care INPUT INA1 * Low High * * INA2 * * * Low High OUTPUT OUTA1 OUTA2 Hi-Z Hi-Z Low * High * * Low * High INPUT INB1 * Low High * * INB2 * * * Low High OUTPUT OUTB1 OUTB2 Hi-Z Hi-Z Low * High * * Low * High Bch SHDNBb Low High High High High * Don't Care Ver.2015-04-07 - 11 - NJW4814 Timing Chart tr IN1A INA1 IN1B INA2 IN2A INB1 IN2B INB2 tf 90 % 10 % OUT1A OUTA1 OUT1B OUTA2 OUTB1 OUT2A OUTB2 OUT2B 90 % 90 % 10 % 10 % td_ON td_OFF Fig. 1. Output Rise/Fall Time, Rise/Fall Delay Time INA1, INA2, INB1, INB2 High Low VDD_HB Highside SW Gate (IC internal) Lowside SW Gate (IC internal) PGND OUTA1, OUTA2, OUTB1, OUTB2 ON OFF ON OFF ON OFF ON OFF ON OFF VDD_HB 90 % 90 % 10 % 10 % PGND tr Dead-time Dtr Dead-time Dtf Dead-time Dtr Dead-time Dtf Dead-time Dtr tf Dead-time Dtf Fig. 2. H-Bridge Driver Block - 12 - Ver.2015-04-07 NJW4814 PIN DESCRIPTIONS PIN NAME PIN NUMBER IN- 1 VDD_SW 2 STBYb 3 SHDNAb 4 SHDNBb 5 INA1 6 INA2 7 INB1 8 INB2 9 FLT 10 PGND 11 OUTA2 12 OUTA1 13 PGND 14 OUTB1 15 Ver.2015-04-07 FUNCTION Output Voltage Detecting pin. Connects output voltage through the resistor divider tap to this pin in order to voltage of the IN- pin become 1.0V (typ.). Power Supply pin for SW.REG. block. Insert a bypass capacitor close to the VDD_SW pin - the GND pin connection in order to lower high frequency impedance. Standby Control pin. The STBYb pin is pulled down with 300k (typ.) internally. Normal Operation at the time of High Level. Standby Mode at the time of Low Level or OPEN. Shutdown Control pin for H-Bridge driver Ach. The SHDNAb pin is pulled down with 300k (typ.) internally. Normal Operation at the time of High Level. The FET of H-Bridge driver Ach becomes OFF (Hi-Z) by Low Level or OPEN. Shutdown Control pin for H-Bridge driver Bch. The function is same as 4pin. Control input pin for H-Bridge driver Ach (one side). High Side SW Operation at the time of High Level. Low Side SW Operation at the time of Low Level. Control input pin for H-Bridge driver Ach (one side). The function is same as 6pin. Control input pin for H-Bridge driver Bch (one side). The function is same as 6pin. Control input pin for H-Bridge driver Bch (one side). The function is same as 6pin. FLT pin outputs a signal at the time of abnormality. You should be connected to the outside power supply through pull up resistance. Normally: FET is OFF (Output voltage High Level) Abnormality: FET is ON (Output voltage Low Level) Power GND pin for H-Bridge driver (Note 1) Output pin of H-Bridge driver Ach (one side). The output current is limited to 300mA (typ.) by the overcurrent protection function. Output pin of H-Bridge driver Ach (one side). The function is same as 12pin. Power GND pin for H-Bridge driver (Note 1) Output pin of H-Bridge driver Bch (one side). The function is same as 12pin. - 13 - NJW4814 PIN DESCRIPTIONS (Continued) PIN NAME PIN NUMBER VDD_HB 16 VOVP 17 FUNCTION Power Supply pin for H-Bridge driver block. Insert a bypass capacitor close to the VDD_HB pin - the GND pin connection in order to lower high frequency impedance. Overvoltage detection pin of SW.REG. When it detected overvoltage, the VOVP pin sinks a current and discharges the output voltage. VOVP pin should be connected to VDD_HB pin. OUTB2 18 SW PGND 19 20 RADJ 21 FB 22 RT 23 Output pin of H-Bridge driver Bch (one side). The function is same as 12pin. Switch Output pin for SW.REG. Power MOSFET Power GND pin for SW.REG. (Note 1) The RADJ pin becomes the high impedance at standby. It prevents a current flowing into the output voltage setting resistor. Feedback Setting pin The feedback resistor and capacitor are connected between the FB pin and the INpin. Oscillating Frequency Setting pin by Timing Resistor. Oscillating Frequency should set between 380kHz and 1MHz. GND pin (Note 1) 24 GND Exposed - Connect to GND. PAD (Note 1) GND and PGND are connected inside. - 14 - Ver.2015-04-07 NJW4814 H Bridge Driver Block Over Current Protection The overcurrent protection function operates when the high side SW current flows more than IDCTH or the low side SW current flows more than IDCTL. The overcurrent protection operates in three steps. (1) Sensing step *Turn off power MOSFET of the switching regulator *Turn off power MOSFET of the H-bridge driver *Reset a soft start *Reset an FB pin voltage *Connect a dummy road between VOVP pin-GND pin (2) Output stop step After the overcurrent detection, 500 ms (typ.) continues an output stop. (3) Return step After an output stop, the soft start operates. Then the IC operation shifts to normal operation. Ver.2015-04-07 - 15 - NJW4814 APPLICATION EXAMPLE L1 3.3 H VIN C1 10 F D1 VOUT C6 0.1 F C2 0.1 F R4 100 C5 1,500 pF VDD_SW SW R1 10 k RT R5 100 k INSTBYb Stand-by SHDNAb SHDNBb (H-Bridge Driver Bch.) C4 22 nF RADJ (H-Bridge Driver Ach.) Shutdown R3 100 FB NJW4814 Shutdown C3 4.7 F R2 240 k RON_RADJ VDD_HB INA1 INA1 INA2 INA2 INB1 INB1 INB2 INB2 VOVP OUTA1 1 R2 R1 VB 1 240(k ) 10(k ) 1( V ) 25.0( V ) OUTA2 OUTB1 FLT FAULT VOUT OUTB2 Pull-Up R6 100 k GND PGND [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. - 16 - Ver.2015-04-07 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: NJR: NJW4814 NJW4814MLE-TE1 NJW4814MLE-TE2