NJW4814
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Dual H-Bridge Driver with Boost Converter
GENERAL DESCRIPTION ■ PACKAGE OUTLINE
FEATURES
Boost Converter Block Output Switch Voltage 40V max.
Switching Current 1.5A min.
PWM Control
Operating Voltage Range 2.7 to 5.5V
Oscillation Frequency Range 380k to 1MHz
Soft Start Function 48ms typ.
Over Current Protection
Over Voltage Protection
H-Bridge Driver Block Internal 2 Channel H-Bridge
Each Channel Operates Individually
Over Current Protection 300mA typ.
Operating Voltage Range 7.0 to 35V
Switching Frequency 300kHz max.
Output Shut Down Control
Fault Indicator Output
Under Voltage Lockout
Built-in Thermal Shutdown
Standby Function
Package Outline NJW4814MLE : EQFN24-LE
The NJW4814 is a dual H-bridge driver with boost converter IC.
It can boost the output voltage from Li-ion battery and/or a 5V power
supply and drives a piezo device by two H- bridge drivers.
48ms of internal fixed soft start function of the boost circuit sets a limit
to startup current.
The dual H-bridge drivers have independent signal inputs and a fault
output function, therefore the NJW4814 improves controllability from a
microcomputer.
The input frequency of H-bridge driver is up to 300kHz.
NJW4814MLE
NJW4814
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PIN CONFIGURATION
< Top View>
NJW4814MLE
PIN FUNCTION
1. IN- 13. OUTA1
2. VDD_SW 14. PGND
3. STBYb 15. OUTB1
4. SHDNAb 16. VDD_HB
5. SHDNBb 17. VOVP
6. INA1 18. OUTB2
7. INA2 19. SW
8. INB1 20. PGND
9. INB2 21. RADJ
10. FLT 22. FB
11. PGND 23. RT
12. OUTA2 24. GND
Exposed PAD on
backside connect to GND
1
INA2
IN-
23456
VDD_SW
STBYb
SHDNAb
SHDNBb
INA1
INB1
INB2
FLT
PGND
OUTA2
7
8
9
10
11
12
131415161718
19
20
21
22
23
24GND
RT
FB
RADJ
PGND
SW
OUTB2
VOVP
VDD_HB
OUTB1
PGND
OUTA1
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BLOCK DIAGRAM
High Side
Gate Driver
Low Side
Gate Driver
High Side
Gate Driver
Low Side
Gate Driver
Control
Logic
VDD_HB
Control
Logic
UVLO
FLT
INA1
OUTA2
OUTA1
GND PGND
High Side
Gate Driver
Low Side
Gate Driver
High Side
Gate Driver
Low Side
Gate Driver
Control
Logic
Control
Logic
OCP
INB1
OUTB2
OUTB1
SHDNAb
INA2
INB2
VOVP
Thermal
Shutdown
Buffer
SW
IN-
PWM
ERR.AMP
FB
Soft Start
Standby
ON/OFF
Vref 1.0V
Oscillator
RT
VDD_SW
STBYb
RADJ
UVLO
OVP
OCP
SHDNBb
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ABSOLUTE MAXIMUM RATINGS (Ta=25°C)
PARAMETER SYMBOL MAXIMUM RATINGS UNIT
Boost Converter Block
Supply Voltage V
DD_SW
-0.3 to +6 V
SW pin Voltage V
SW
-0.3 to +40 V
RADJ pin Voltage V
RADJ
-0.3 to +6 (*1) V
IN- pin Voltage V
IN
-
-0.3 to +6 (*1) V
STBYb pin Voltage V
STBYb
-0.3 to +6 (*1) V
VOVP pin Voltage (*2) V
OVP
-0.3 to +40 V
H-Bridge Driver Block
Supply Voltage VDD_HB -0.3 to +40 V
SHDNAb, SHDNBb pin
Voltage
VSHDNAb
V
SHDNBb
-0.3 to +6 (*1) V
INA1, INA2, INB1, INB2 pin
Voltage
VINA1 , VINA2
V
INB1
, V
INB2
-0.3 to +6 (*1) V
General
FLT pin Voltage VFLT -0.3 to +6 V
Power Dissipation PD 910 (*3)
2,100 (*4) mW
Junction Temperature Range T
j
-40 to +150 C
Operating Temperature Range T
opr
-40 to +85 C
Storage Temperature Range T
stg
-40 to +150 C
(*1): When Supply voltage is less than +6V, the absolute maximum voltage is equal to the Supply voltage.
(*2): VOVP pin should be connected to VDD_HB pin.
(*3): Mounted on glass epoxy board. (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 2Layers FR-4, with Exposed Pad)
(*4): Mounted on glass epoxy board. (101.5×114.5×1.6mm: based on EIA/JEDEC standard, 4Layers FR-4, with Exposed Pad)
(For 4Layers: Applying 99.5×99.5mm inner Cu area and a thermal via hole to a board based on JEDEC standard JESD51-5)
RECOMMENDED OPERATING CONDITIONS
PARAMETER SYMBOL MIN. TYP. MAX. UNIT
Boost Converter Block
Supply Voltage VDD_SW 2.7 － 5.5 V
STBYb pin Voltage V
STBYb
0 – V
DD_SW
V
Timing Resistor R
T
68 100 200 k
Oscillating Frequency f
OSC
380 700 1,000 kHz
H-Bridge Driver Block
Supply Voltage V
DD_HB
7 – 35 V
Output Switch DC Current I
OM
0 20 – mA
SHDNAb, SHDNBb pin
Voltage
VSHDNAb
V
SHDNBb
0 – VDD_SW V
IN1A, IN1B, IN2A, IN2B pin
Voltage
VINA1 , VINA2
V
INB1
, V
INB2
0 – VDD_SW V
FLT pin Voltage V
FLT
0 – 5.5 V
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ELECTRICAL CHARACTERISTICS
Boost Converter Block
(Unless otherwise noted, VDD_SW=VSTBYb=3.7V, RT=100k , Ta=25 C)
PARAMETER SYMBOL
TEST CONDITION MIN. TYP. MAX. UNIT
Under Voltage Lockout Block
UVLO Release Voltage V
RUVLO_SW
2.1 2.4 2.7 V
UVLO Operate Voltage VDUVLO_SW
2.0 2.2 2.5 V
UVLO Hysteresis Voltage V
UVLO_SW
VRUVLO_SW - VDUVLO_SW – 0.2 – V
Soft Start Block
Soft Start Time TSS VB=0.95V 34 48 60 ms
Oscillator Block
Oscillation Frequency fOSC RT=100k 630 700 770 kHz
Oscillation Frequency
deviation (Supply voltage) fDV VDD_SW=3.0V to 5.5V – 1 – %
Oscillation Frequency
deviation (Temperature) fDT Ta= -40 C to +85 C – 3 – %
Error Amplifier Block
Reference Voltage VB Short IN- and FB,
Measuring IN- Pin -1.0% 1.00 +1.0% V
Input Bias Current IB VB=1.0V -0.1 – +0.1 A
IN- pin Clamp Voltage VCLIN- VSTBYb=0V, VDD_SW=5.5V,
I
CLIN
-
=10 A 4.8 5.2 5.6 V
RADJ pin
FET ON Resistance RON_RADJ IRADJ=10mA – 6 12
RADJ pin
FET Leak Current ILEAK_RADJ VSTBYb=0V, VRADJ=3.3V – – 1 A
PWM Comparate Block
Maximum Duty Cycle M
AX
D
UTY
V
IN
-
=0.9V 90 93 98 %
Output Block
Switching FET
ON Resistance RON_SW ISW=100mA – 0.6 1.2
Switching Current Limit I
LMT_SW
1.5 2 – A
Switching FET Leak Current I
LEAK_SW
V
STBYb
=0V, V
SW
=40V – – 1 A
Overvoltage Protection Block
OVP Operate Voltage V
DOVP
36 38 40 V
OVP Release Voltage V
ROVP
31 33 35 V
OVP Hysteresis Voltage ΔVOVP VDOVP -VROVP – 5 – V
OVP pin Input Current 1 IOVP1 VOVP= VDD_HB=35V,
OVP Release – 60 120 A
OVP pin Input Current 2 IOVP2 VOVP= VDD_HB=40V,
OVP Operate 1,200 2,400 4,000 A
OVP pin Leak Current IOVP_LEAK VSTBYb=0V,
V
OVP
= V
DD_HB
=40V – – 1 A
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ELECTRICAL CHARACTERISTICS
H-Bridge Driver Block
(Unless otherwise noted, VDD_SW=VSTBYb=VSHDNAb=VSHDNBb=3.7V, VDD_HB=25V, RT=100k , Ta=25 C)
INA1, INA2, INB1, INB2 pin, OUTA1, OUTA2, OUTB1, OUTB2 pin and SHDNAb, SHDNBb pin are common
PARAMETER SYMBOL
TEST CONDITION MIN. TYP. MAX. UNIT
Under Voltage Lockout Block
UVLO Release Voltage VRUVLO_HB
5.6 6.2 6.8 V
UVLO Operate Voltage V
DUVLO_HB
5.0 5.6 6.2 V
UVLO Hysteresis Voltage V
UVLO_HB
VRUVLO_HB - VDUVLO_HB – 0.6 – V
Input Block
IN pin High Voltage VIHIN 1.0 – VDD_SW
V
IN pin Low Voltage VILIN 0 – 0.4 V
IN pin Input Current IIIN VIN = 3.3 V – – 1 A
SHDNb pin High Voltage
(Operating Mode) VIHSHDNb 1.0 – VDD_SW
V
SHDNb pin Low Voltage
(Shutdown Mode) VILSHDNb 0 – 0.4 V
SHDNb pin
Pull-down Resistance RPDSHDNb VSHDNb=3.3V 210 300 390 k
Output Block
High Side SW ON Resistance RDSH IOSOURCE=20mA 4.0 6.0 8.0
Low Side SW ON Resistance RDSL IOSINK=20mA 4.0 6.0 8.0
High Side
Over Current Detection IDCTH High-Side 200 300 400 mA
Low Side
Over Current Detection IDCTL Low-Side 200 300 400 mA
Output Rise Time tr VIN=0 to 3.3V – 400 – ns
Output Fall Time tf VIN=0 to 3.3V – 340 – ns
Rise Dead Time Dtr VIN=0 to 3.3V – 200 – ns
Fall Dead Time Dtf VIN=0 to 3.3V – 180 – ns
Rise Delay Time td_ON VIN=0 to 3.3V – 310 – ns
Fall Delay Time td_OFF VIN=0 to 3.3V – 270 – ns
Input Frequency fIN – – 300 kHz
High Side SW
OFF Leak Current IOLEAKOUTH
VSTBYb=VSHDNb=0V,
V
OUT
=0V – – 1 A
Low Side SW
OFF Leak Current IOLEAKOUTL
VSTBYb=VSHDNb=0V,
V
OUT
=25V – – 1 A
OUT pin – VDD pin
Potential Difference VPDOV VSTBYb=VSHDNb=0V,
I
ORH
=20mA – 0.7 1.0 V
GND pin – OUT pin
Potential Difference VPDGO VSTBYb=VSHDNb=0V,
I
ORL
=20mA – 0.7 1.0 V
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ELECTRICAL CHARACTERISTICS
General Characteristics
(Unless otherwise noted, VDD_SW=VSTBYb=VSHDNAb=VSHDNBb=3.7V, VDD_HB=25V, RT=100k , Ta=25 C)
INA1, INA2, INB1, INB2 pin, OUTA1, OUTA2, OUTB1, OUTB2 pin and SHDNAb, SHDNBb pin are common
PARAMETER SYMBOL
TEST CONDITION MIN. TYP. MAX. UNIT
STBYb pin High Voltage
(Operating Mode) VIHSTBYb 1.0 – VDD_SW
V
STBYb pin Low Voltage
(Standby Mode) VILSTBYb 0 – 0.4 V
STBYb pin
Pull Down Resistance RPDSTBYb VSTBYb=3.3V 210 300 390 k
FLT pin
Low Level Output Voltage VLFLT IFLT=500 A – 0.20 0.40 V
FLT pin OFF Leak Current IOLEAKFLT VFLT=5.5V – – 1 A
Quiescent Current
(Switching Regulator Block) IQSW No Load – 1.9 2.8 mA
Quiescent Current
(H-Bridge Driver Block) IQHB fINA= fINB=10kHz
antiphase 50% Duty Cycle – 1.0 2.0 mA
Quiescent Current
(Standby) IQSTBY VSTBYb=VSHDNb=0V
V
DD_HB
=0V, – 1.6 3.6 A
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TYPICAL CHARACTERISTICS (Boost Converter Block)
600
620
640
660
680
700
720
740
760
780
800
-50 -25 0 25 50 75 100 125 150
Oscillation Frequency fosc (kHz)
Ambient Temperature Ta (ºC)
Oscillation Frequency vs. Temperature
(VDD_SW=3.7V, RT=100kW)
0.96
0.97
0.98
0.99
1.00
1.01
1.02
1.03
1.04
-50 -25 0 25 50 75 100 125 150
Reference Voltage VB(V)
Ambient Temperature Ta (ºC)
Reference Voltage vs. Temperature
(VDD_SW=3.7V)
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
-50 -25 0 25 50 75 100 125 150
Output ON Resistance RON_SW (W)
Ambient Temperature Ta (ºC)
Output ON Resistance vs. Temperature
(VDD_SW=3.7V, ISW=100mA)
0
0.5
1
1.5
2
2.5
3
-50 -25 0 25 50 75 100 125 150
Switching Current Limit ILMT_SW (A)
Ambient Temperature Ta (ºC)
Switching Current Limit vs. Temperature
(VDD_SW=3.7V)
300
400
500
600
700
800
900
1000
60 80 100 120 140 160 180 200
Oscillation Frequency fOSC (kHz)
Timing Resistor RT(kW)
Oscillation Frequency vs. Timing Resistor
(VDD_SW=3.7V, Ta=25ºC)
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TYPICAL CHARACTERISTICS (H-Bridge Driver Block)
0
2
4
6
8
10
12
-50 -25 0 25 50 75 100 125 150
High Side SW ON Resistance
RDSH (W)
Ambient Temperature Ta (ºC)
High Side SW ON Resistance vs. Temperature
(VDD_HB=25V, IOSOURCE=20mA)
0
2
4
6
8
10
12
-50 -25 0 25 50 75 100 125 150
Low Side SW ON Resistance
RDSL (W)
Ambient Temperature Ta (ºC)
Low Side SW ON Resistance vs. Temperature
(VDD_HB=25V, IOSINK=20mA)
0
50
100
150
200
250
300
350
400
-50 -25 0 25 50 75 100 125 150
Low Side Over Current Detection
IDCTL (mA)
Ambient Temperature Ta (ºC)
Low Side Over Current Detection vs. Temperature
(VDD_HB=25V)
0
50
100
150
200
250
300
350
400
-50 -25 0 25 50 75 100 125 150
High Side Over Current Detection
IDCTH (mA)
Ambient Temperature Ta (ºC)
High Side Over Current Detection vs. Temperature
(VDD_HB=25V)
0
100
200
300
400
500
600
-50 -25 0 25 50 75 100 125 150
Output Rise Time tr (ns)
Ambient Temperature Ta (ºC)
Output Rise Time vs. Temperature
(VDD_HB=25V, VIN=0 to 3.3V)
0
100
200
300
400
500
600
-50 -25 0 25 50 75 100 125 150
Output Fall Time tf (ns)
Ambient Temperature Ta (ºC)
Output Fall Time vs. Temperature
(VDD_HB=25V, VIN=0 to 3.3V)
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TYPICAL CHARACTERISTICS (General Characteristics)
0
0.5
1
1.5
2
2.5
3
23456
Quiescent Current IQSW (mA)
Supply Voltage VDD_SW (V)
Quiescent Current vs. Supply Voltage
(RT=100kW, No Load, Ta=25ºC)
Switching Regulator Block
0
1
2
3
4
5
6
7
8
9
10
-50 -25 0 25 50 75 100 125 150
Standby Current IQSTBY (μA)
Ambient Temperature Ta (ºC)
Standby Current vs. Temperature
(VDD_SW=3.7V, VDD_HB=0V, VSTBYb=VSHDNb=0V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
0 50 100 150 200 250 300
Quiecent Current IQHB (mA)
Input Frequency fIN (kHz)
Quiecent Current vs. Input Frequency
(VDD_SW=3.7V, VDD_HB=25V, Ta=25˚C)
H-Bridge Driver Block
0
0.5
1
1.5
2
2.5
3
-50 -25 0 25 50 75 100 125 150
Quiescent Current IQSW (mA)
Ambient Temperature Ta (ºC)
Quiescent Current vs. Temperature
(VDD_SW=3.7V, RT=100kW, No Load)
Switching Regulator Block
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
-50 -25 0 25 50 75 100 125 150
Quiescent Current IQHB (mA)
Ambient Temperature Ta (ºC)
Quiescent Current vs. Temperature
(VDD_SW=3.7V, VDD_HB=25V, fIN1=fIN2=10kHz)
H-Bridge Driver Block
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
0 5 10 15 20 25 30 35 40
Quiescent Current IQHB (mA)
Supply Voltage VDD_HB (V)
Quiescent Current vs. Supply Voltage
(VDD_SW=3.7V, fINA=fINB=10kHz, Ta=25ºC)
H-Bridge Driver Block
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H-Bridge Driver Block Pin Operation Table
Ach
INPUT OUTPUT
SHDNAb INA1 INA2 OUTA1 OUTA2
Low
* * Hi-Z Hi-Z
High Low * Low *
High High * High *
High * Low * Low
High * High * High
* Don’t Care
Bch
INPUT OUTPUT
SHDNBb INB1 INB2 OUTB1 OUTB2
Low
* * Hi-Z Hi-Z
High Low * Low *
High High * High *
High * Low * Low
High * High * High
* Don’t Care
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Timing Chart
Fig. 1. Output Rise/Fall Time, Rise/Fall Delay Time
INA1, INA2,
INB1, INB2
Highside SW Gate
(IC internal)
Lowside SW Gate
(IC internal)
ON
ON
ON
ON
ON OFF OFF
OFF OFF OFF
High
Low
VDD
_HB
PGND
VDD
_HB
PGND
Dead-time
Dtr
Dead-time
Dtf
Dead-time
Dtr
Dead-time
Dtf
Dead-time
Dtr
Dead-time
Dtf
90 %
10 %
90 %
10 %
tr
tf
OUTA1, OUTA2,
OUTB1, OUTB2
Fig. 2. H-Bridge Driver Block
10 %
10 %
90 % 90 %
10 %
td_ON td_OFF
trtf
IN1A
IN1B
IN2A
IN2B
OUT1A
OUT1B
OUT2A
OUT2B
90 %
INA1
INA2
INB1
INB2
OUTA1
OUTA2
OUTB1
OUTB2
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PIN DESCRIPTIONS
PIN NAME PIN
NUMBER FUNCTION
IN- 1
Output Voltage Detecting pin.
Connects output voltage through the resistor divider tap to this pin in order to voltage
of the IN- pin become 1.0V (typ.).
VDD_SW 2
Power Supply pin for SW.REG. block.
Insert a bypass capacitor close to the VDD_SW pin – the GND pin connection in
order to lower high frequency impedance.
STBYb 3
Standby Control pin.
The STBYb pin is pulled down with 300k (typ.) internally. Normal Operation at the
time of High Level. Standby Mode at the time of Low Level or OPEN.
SHDNAb 4
Shutdown Control pin for H-Bridge driver Ach.
The SHDNAb pin is pulled down with 300k (typ.) internally.
Normal Operation at the time of High Level.
The FET of H-Bridge driver Ach becomes OFF (Hi-Z) by Low Level or OPEN.
SHDNBb 5 Shutdown Control pin for H-Bridge driver Bch.
The function is same as 4pin.
INA1 6
Control input pin for H-Bridge driver Ach (one side).
High Side SW Operation at the time of High Level. Low Side SW Operation at the
time of Low Level.
INA2 7 Control input pin for H-Bridge driver Ach (one side).
The function is same as 6pin.
INB1 8 Control input pin for H-Bridge driver Bch (one side).
The function is same as 6pin.
INB2 9 Control input pin for H-Bridge driver Bch (one side).
The function is same as 6pin.
FLT 10
FLT pin outputs a signal at the time of abnormality.
You should be connected to the outside power supply through pull up resistance.
Normally: FET is OFF (Output voltage High Level)
Abnormality: FET is ON (Output voltage Low Level)
PGND 11 Power GND pin for H-Bridge driver (Note 1)
OUTA2 12 Output pin of H-Bridge driver Ach (one side).
The output current is limited to 300mA (typ.) by the overcurrent protection function.
OUTA1 13 Output pin of H-Bridge driver Ach (one side).
The function is same as 12pin.
PGND 14 Power GND pin for H-Bridge driver (Note 1)
OUTB1 15 Output pin of H-Bridge driver Bch (one side).
The function is same as 12pin.
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PIN DESCRIPTIONS (Continued)
PIN NAME PIN
NUMBER FUNCTION
VDD_HB 16
Power Supply pin for H-Bridge driver block.
Insert a bypass capacitor close to the VDD_HB pin – the GND pin connection in
order to lower high frequency impedance.
VOVP 17
Overvoltage detection pin of SW.REG.
When it detected overvoltage, the VOVP pin sinks a current and discharges the
output voltage.
VOVP pin should be connected to VDD_HB pin.
OUTB2 18 Output pin of H-Bridge driver Bch (one side).
The function is same as 12pin.
SW 19 Switch Output pin for SW.REG. Power MOSFET
PGND 20 Power GND pin for SW.REG. (Note 1)
RADJ 21 The RADJ pin becomes the high impedance at standby.
It prevents a current flowing into the output voltage setting resistor.
FB 22
Feedback Setting pin
The feedback resistor and capacitor are connected between the FB pin and the IN-
pin.
RT 23 Oscillating Frequency Setting pin by Timing Resistor.
Oscillating Frequency should set between 380kHz and 1MHz.
GND 24 GND pin (Note 1)
Exposed
PAD – Connect to GND.
(Note 1) GND and PGND are connected inside.
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H Bridge Driver Block Over Current Protection
The overcurrent protection function operates when the high side SW current flows more than IDCTH or the low side SW
current flows more than IDCTL. The overcurrent protection operates in three steps.
(1) Sensing step
·Turn off power MOSFET of the switching regulator
·Turn off power MOSFET of the H-bridge driver
·Reset a soft start
·Reset an FB pin voltage
·Connect a dummy road between VOVP pin-GND pin
(2) Output stop step
After the overcurrent detection, 500 ms (typ.) continues an output stop.
(3) Return step
After an output stop, the soft start operates. Then the IC operation shifts to normal operation.
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APPLICATION EXAMPLE
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
STBYb
VIN VOUT
VDD_SW
IN-
FB
SW
D1
C1
10 F R2
240 k
L1
3.3 H
NJW4814
Stand-by
RADJ
OUTA1
OUTA2
VDD_HB
PGND
GND
SHDNAb
Shutdown
(H-Bridge Driver Ach.)
INA1
FLT
INA1
FAULT
R6
100 k
Pull-
Up
R1
10 k
C2
0.1 F
RON_RADJ
)V(0.25)V(1
)k(10
)k(240
1V
R
R
1V B
1
2
OUT
OUTB1
OUT
B2
VOVP
INA2
INB1
INB2
INA2
INB1
INB2
C5
1,500 pF
R3
100
C4
22 nF
RT
R5
100 k
SHDNBb
Shutdown
(H-
Bridge Driver Bch.)
R4
100
C6
0.1 F
C3
4.7 F
