0.6V to 16.5V Hot Swap Controller ADM1170 Preliminary Technical Data FEATURES GENERAL DESCRIPTION The ADM1170 is a Hot Swap controller that allows a board to be safely inserted and removed from a live backplane. The device is capable of hot swapping a supply as low as 0.6V. An internal charge pumped driver controls the GATE of an external high side N-channel FET for a supply voltage ranging from 2.7V to 16.5V. The ADM1170 provides the initial timing cycle and allows the GATE to be ramped up at an adjustable rate. The ADM1170 features a fast current limit loop providing active current limiting together with a circuit breaker timer. The signal at the ON pin turns the part on and off and is also used for the reset function. The SS pin allows the user to control the soft start profile of the current ramp at start-up via an external capacitor. A capacitor connected to the TIMER pin gives the user control over the duty cycle of the PWM retry ratio during current fault. Allows Safe Board Insertion and Removal from a Live Backplane Controls Supply Voltages from 0.6 V to 16.5V Adjustable Analog Current Limit with Circuit Breaker Fast Response Limits Peak Fault Current Automatic Retry or Latch-Off On Current Fault Adjustable Supply Voltage Power-Up Rate Charge Pumped Gate Drive for External N-FET Switch True Soft Start control of Initial Current Profile TIMER pin allows control over timing functions Undervoltage Lockout Adjustable Overvoltage Protection 8-pin TSOT Package APPLICATIONS Hot Swap Board Insertion - Line Cards, Raid systems Electronic Circuit Breaker Industrial High Side Switch/Circuit Breaker This part is available in two options: the ADM1170-1 will automatic retry for over-current fault and the ADM1170-2 will latch-off for an over-current fault. The ADM1170 is packaged in an 8-lead TSOT package. APPLICATIONS DIAGRAM VIN=1.8V RSENSE LONG Q1 VOUT=1.8V CLOAD RS+ VIN=3.3VAUX LONG RS- Vcc GATE SHORT ADM1170-1 RON1 ON SS RON2 CSS TIMER GND CTIMER GND LONG GND Rev.PrF Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.326.8703 2004 Analog Devices, Inc. All rights reserved. (c)(c)2005 ADM1170 Preliminary Technical Data ADM1170--SPECIFICATIONS Table 1. VCC = 2.7V to 16.5V, TA = -40C to +85C, Typical Values at TA = 25C unless otherwise noted. Parameter VCC Pin Operating Voltage Range, VCC Supply Current, Icc Undervoltage Lockout, VUVLO Undervoltage Lockout Hysteresis, VUVLOHYS ON Pin ON Pin Input Current, IINON On Pin Threshold, VON ON Pin Threshold Hysteresis, VONHYST RS+/ RS- Pin Hot Swap Voltage SENSE Pin Input Current, IINSENSE Circuit Breaker Limit Voltage, VCB Over Current Limit Voltage, VOC GATE Pin GATE Drive Voltage, VGATE GATE Drive Voltage, VGATE GATE Drive Voltage, VGATE Gate Pullup Current Gate Pulldown Current Gate Pulldown Current Soft Start (SS) Pin Soft Start Pullup Current Current Setting Gain Soft Start Completion Voltage Pull-Down Current TIMER Pin TIMER Pin Pull-Up Current, ITIMERUP Min 2.7 2.4 -100 1.26 0.6 TBD 10 34 44 40 50 5 6 5 10 0.5 2.525 25 0 1.3 80 -200 20 47 47 53 53 6.5 8 6.5 12 2 25 Max Units 16.5 1.0 2.65 V mA V mV 100 1.34 nA V mV 16.5 TBD 30 60 53 66 59 V A A mV mV mV mV VSENSE = VCC, VHOTSWAP = 0.6 V, Note VSENSE = VCC, VHOTSWAP > 2.2 V VCB = (VCC - VSENSE) ,VHOTSWAP = 0.6 V VCB = (VCC - VSENSE) ,VHOTSWAP > 2.2 V VHOTSWAP = 0.6 V, Note VHOTSWAP > 2.2 V 10 12 10 14 V V V uA mA mA VGATE - VCC, VCC = 2.7V VGATE - VCC, VCC = 5V VGATE - VCC, VCC = 16.5V VGATE = 0V VGATE = 3V, Vcc > UVLO VGATE = 3V, Vcc < UVLO 10 20 1 100 -4 -48 TIMER Pin Pull-Down Current, ITIMERDN TIMER Pin Threshold High, VTIMERH TIMER Pin Threshold Low, VTIMERL Typ 1.235 0.18 -5 -60 2 100 1.3 0.2 Rev. PrF | Page 2 of 8 A V/V V A -6 -72 2.5 1.365 0.22 A A A A V V Conditions VCC Rising ON rising Vss/Vsense Fault Initial Cycle, VTIMER = 1V During Current Fault, VTIMER = 1V After Current Fault, VTIMER = 1V Normal Operation, VTIMER = 1V TIMER rising TIMER falling Preliminary Technical Data ADM1170 Absolute Maximum Ratings Table 2. ADM1170 Absolute Maximum Ratings Parameter VCC Pin RS+, RS- Pins VSENSE = (RS+ - RS-) TIMER Pin SS Pin ON Pin GATE Pin Power Dissipation Storage Temperature Operating Temperature Range Lead Temperature Range (10 sec) Junction Temperature Rating 20V -0.3V to 20V 1V -0.3V to 20V -0.3V to 20V -0.3V to 20V VCC + 11V TBD -65C to +125C -40C to +85C 300C 150C Rev. PrF | Page 3 of 8 ADM1170 Preliminary Technical Data HOT CIRCUIT INSERTION When circuit boards are inserted into live backplanes, the supply bypass capacitors can draw large transient currents from the backplane power bus as they charge. Such transient currents can cause permanent damage to connector pins, glitches on the system supply or reset other boards in the system. The ADM1170 is designed to turn a printed circuit board's supply voltage ON and OFF in a controlled manner, allowing the circuit board to be safely inserted into or removed from a live backplane. The ADM1170 can reside either on the backplane or on the daughter board for hot circuit insertion applications. OVERVIEW The ADM1170 is designed to operate over a range of supplies from 2.7V to 16.5V and is capable of hot swapping as low as 0.6V. Upon insertion, an undervoltage lockout circuit determines if sufficient supply voltage is present. When the ON pin goes high an initial timing cycle assures that the board is fully seated in the backplane before the FET is turned on. A single timer capacitor sets the periods for all of the timer functions. After the initial timing cycle the ADM1170 can either start up in current limit or with a lower load current. Once the external FET is fully enhanced and the supply has ramped up, the ADM1170 monitors the load current through an external sense resistor. Overcurrent faults are actively limited to 47mV/RSENSE for a specified circuit breaker timer limit. The ADM1170-1 will automatically retry after a current limit fault while the ADM1170-2 latches off. The ADM1170-1 timer function limits the retry duty cycle to 3.8% for FET cooling. UNDERVOLTAGE LOCKOUT An internal undervoltage lockout (UVLO) circuit resets the ADM1170 if the VCC supply is too low for normal operation. The UVLO has a low-to-high threshold of 2.5255V, a 25mV hysteresis. Above 2.525V supply voltage, the ADM1170 will start if the ON pin conditions are met. Alternatively, an external resistor divider at the ON pin can be used to program an undervoltage lockout value higher than the internal UVLO circuit. An RC filter can be added at the ON pin to increase the delay time at card insertion if the internal glitch filter delay is insufficient. GATE FUNCTION During hot insertion of the PCB, an abrupt application of supply voltage charges the external FET drain/gate capacitance. This can cause an unwanted gate voltage spike. An internal circuit holds GATE low before the internal circuitry wakes up. This reduces the FET current surges substantially at insertion. The GATE pin is held low in reset mode and during the initial timing cycle. In the start-up cycle the GATE pin is pulled up by a 12A current source. During an over-current fault condition, the error amplifier servos the GATE pin to maintain a constant current to the load until the circuit breaker trips. When the circuit breaker trips, the GATE pin shuts down abruptly. CURRENT LIMIT CIRCUIT BREAKER FUNCTION The ADM1170 features a current limiting circuit breaker. When there is a sudden load current surge, such as a low impedance fault, the bus supply voltage can drop significantly to a point where the power to an adjacent card is affected, causing system malfunctions. The ADM1170 high bandwidth current control loop limits current by reducing the external FET GATE pin voltage. This minimizes the bus supply voltage drop and permits power budgeting and fault isolation without affecting neighbouring cards. CALCULATING CURRENT LIMIT The nominal fault current limit is determined by a sense resistor connected between VCC and the SENSE pin as given by the equation below: ILIMIT(NOM) = VCB(NOM) / RSENSE (1) The minimum load current is given by Equation 2: ON FUNCTION ILIMIT(MIN) = VCB(MIN) / RSENSE(MAX) The ON pin is the input to a comparator which has a low-tohigh threshold of 1.3V, an 80mV hysteresis and a high-tolow glitch filter of 30s and a low-to-high glitch filter of 3us. A low input on the ON pin resets the ADM1170 TIMER status and turns off the external FET by pulling the GATE pin to ground. A low-to-high transition on the ON pin starts an initial cycle followed by a start-up cycle. A 10k pull-up resistor connecting the ON pin to the supply is recommended. The 10k resistor shunts any potential static charge on the backplane and reduces the overvoltage stress at the ON pin during live insertion. (2) The maximum load current is given by Equation 3: ILIMIT(MAX) = VCB(MAX) / RSENSE(MIN) (3) Note: The power rating of the sense resistor should be rated at the fault current level. For proper operation, the minimum current limit must exceed the circuit maximum operating load current with margin. The sense resistor power rating must exceed VCB(MAX)2 /RSENSE(MIN). Rev. PrF | Page 4 of 8 Preliminary Technical Data ADM1170 TIMER FUNCTION The TIMER pin handles several key functions with an external capacitor, CTIMER. There are two comparator thresholds: COMP1 (0.2V) and COMP2 (1.3V). The four timing current sources are: VIN VON * 5A pull-up * 60A pull-up * 2A pull-down * 100A pull-down VTIMER VGATE The 100A is a non-ideal current source approximating a 7k resistor below 0.4V. VOUT INITIAL TIMING CYCLE When the card is being inserted into the bus connector, the long pins mate first which brings up the supply VIN at time point 1 of Figure 3. The ADM1170 is in reset mode as the ON pin is low. GATE is pulled low and the TIMER pin is pulled low with a 100A source. At time point 2, the short pin makes contact and ON is pulled high. At this instant, a start-up check requires that the supply voltage be above UVLO, the ON pin beabove1.3Vand the TIMER pin voltage be less than 0.2V. When these three conditions are fulfilled, the initial cycle begins and the TIMER pin is pulled high with 5A. At time point 3, the TIMER reaches the COMP2 threshold and the first portion of the initial cycle ends. The 100A current source then pulls down the TIMER pin until it reaches 0.2V at time point 4. The initial cycle delay (time point 2 to time point 4) is related to CTIMER by equation: tINITIAL ~= 272.9 x CTIMER ms/uF RE SET MODE INITIA L CY CLE S TART -UP CYCLE NORM AL CYCLE Figure 1: Normal Start-up V IN V ON 60A 5A 100A 2A 100A V TIMER V GATE V TH (4) When the initial cycle terminates, a start-up cycle is activated and the GATE pin ramps high. The TIMER pin continues to be pulled down towards ground. V OUT IRSENSE SOFT START (SS PIN) The SS pin is used to determine the inrush current profile. A capacitor should be attached to this pin. Whenever the FET is requested to turn on, the SS pin is held at ground until the SENSE voltage reaches a few mV. A current source is then turned on, which linearly ramps the capacitor up to 1V. The reference voltage for the GATE linear control amplifier is derived from the soft start voltage, such that the inrush linear current limit is defined as: ILIMIT = VSS / (20 x RSENSE) Rev. PrF | Page 5 of 8 RESET MODE INITIAL CYCLE START-UP CYCLE NORMAL CYCLE Figure 2: Current Limiting at Start-up ADM1170 Preliminary Technical Data SENSE RESISTOR KELVIN SENSE RESISTOR CONNECTION CURRENT When using a low-value sense resistor for high current measurement the problem of parasitic series resistance can arise. The lead resistance can be a substantial fraction of the rated resistance making the total resistance a function of lead length. This problem can be avoided by using a Kelvin sense connection. This type of connection separates the current path through the resistor and the voltage drop across the resistor. Figure 18 below shows the correct way to connect the sense resistor between the RS+ and RS- pins of the ADM1170. CURRENT Current FLOWFlow FROM LOAD from source Current Flow FLOW TO -48Vto BACKPLANE Load KELVIN SENSE TRACES SENSE RS+ ADM1073 Rev. PrF | Page 6 of 8 VEE RS- Preliminary Technical Data ADM1170 PIN CONFIGURATIONS TIMER 8 1 TIMER VCC 1 ADM1170-1ART GND 2 SS 3 ON 4 TOP VIEW (Not to Scale) 8 VCC 7 RS+ 6 RS- 5 GATE ADM1170-2ART 7 RS+ GND 2 6 RS- SS 3 5 GATE ON-CLR 4 TOP VIEW (Not to Scale) PIN FUNCTIONAL DESCRIPTIONS Pin No. 1 Name TIMER 2 3 GND SS 4 ON (ON-CLR) 5 GATE 6,7 RS+, RS- 8 VCC Description Timer Input Pin. An external capacitor CTIMER sets a 272.9ms/F initial timing delay and a 21.7ms/F circuit breaker delay. The GATE pin turns off whenever the TIMER pin is pulled beyond the upper threshold, such as for overvoltage detection with an external zener. Chip Ground Pin Soft Start pin. An external capacitor between the SS pin and GND sets the ramp rate of the load current profile at initial connection. Input Pin. The ON pin comparator has a low-to-high threshold of 1.3V with 80mV hysteresis and a glitch filter. When the ON pin is low, the ADM1170 is reset. When the ON pin goes high, the GATE turns on after the initial timing cycle. On the ADM1170-2, a rising edge on this pin has the added function of clearing a fault and restarting the device GATE Output Pin. This pin is the high side gate drive of an external N-channel FET. An internal charge pump provides a 12A pull-up current with Zener clamps to RS+ and ground. In overload, the error amplifier (EA) controls the external FET to maintain a constant load current. Current Limit Sense Input Pins. A sense resistor between the RS+ and RS- pins sets the analog current limit. In overload, the EA controls the external FET gate to maintain the SENSE voltage at 47mV. When the EA is maintaining current limit, the TIMER circuit breaker mode is activated. The current limit loop/circuit breaker mode can be disabled by connecting the RS+ pin and RS- pin together. Positive Supply Input Pin. The operating supply voltage range is between 2.7V to 16.5V. An undervoltage lockout (UVLO) circuit with a glitch filter resets the ADM1170 when a low supply voltage is detected. Rev. PrF | Page 7 of 8 ADM1170 Preliminary Technical Data OUTLINE DIMENSIONS Figure 3. 8-Lead TSOT Package (UJ-8)--Dimensions shown in millimeters ESD CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Table 3. Ordering Guide Part Number ADM1170-1AUJ ADM1170-2AUJ Version Automatic Retry Version Latched Off Version 2004 Analog Devices, Inc. All rights reserved. Trademarks and 2005 registered trademarks are the property of their respective companies. Printed in the U.S.A. PR05124-0-2/05(PrF) Temperature Package -40C to +85C -40C to +85C Package Description TSOT TSOT Package Outline UJ-8 UJ-8