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FEATURES
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1Y
2A
2Y
3A
3Y
GND
VCC
6A
6Y
5A
5Y
4A
4Y
SN54LVC06A . . . J OR W PACKAGE
SN74LVC06A . . . D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)
3 2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
6Y
NC
5A
NC
5Y
2A
NC
2Y
NC
3A
SN54LVC06A . . . FK PACKAGE
(TOP VIEW)
1Y
1A
NC
4Y
4A 6A
3Y
GND
NC VCC
NC - No internal connection
SN74LVC06A . . . RGY PACKAGE
(TOP VIEW)
1 14
7 8
2
3
4
5
6
13
12
11
10
9
6A
6Y
5A
5Y
4A
1Y
2A
2Y
3A
3Y
1A
4Y V
GND
CC
DESCRIPTION/ORDERING INFORMATION
SN54LVC06A, SN74LVC06AHEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCAS596N – OCTOBER 1997 – REVISED JULY 2005
•Operate From 1.65 V to 3.6 V •Max t
pd
of 3.7 ns at 3.3 V•Specified From –40 °C to 85 °C, •I
off
Supports Partial-Power-Down Mode–40 °C to 125 °C, and –55 °C to 125 °C Operation•Inputs and Open-Drain Outputs Accept •Latch-Up Performance Exceeds 250 mA PerVoltages up to 5.5 V JESD 17
These hex inverter buffers/drivers are designed for 1.65-V to 3.6-V V
CC
operation.
The outputs of the 'LVC06A devices are open drain and can be connected to other open-drain outputs toimplement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 24 mA.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translatorsin a mixed 3.3-V/5-V system environment.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING
–40 °C to 85 °C QFN – RGY Reel of 1000 SN74LVC06ARGYR LC06ATube of 50 SN74LVC06ADSOIC – D Reel of 2500 SN74LVC06ADR LVC06AReel of 250 SN74LVC06ADTSOP – NS Reel of 2000 SN74LVC06ANSR LVC06A–40 °C to 125 °C SSOP – DB Reel of 2000 SN74LVC06ADBR LC06ATube of 90 SN74LVC06APWTSSOP – PW Reel of 2000 SN74LVC06APWR LC06AReel of 250 SN74LVC06APWTTVSOP – DGV Reel of 2000 SN74LVC06ADGVR LC06ACDIP – J Tube of 25 SNJ54LVC06AJ SNJ54LVC06AJ–55 °C to 125 °C CFP – W Tube of 150 SNJ54LVC06AW SNJ54LVC06AWLCCC – FK Tube of 55 SNJ54LVC06AFK SNJ54LVC06AFK
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available atwww.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
UNLESS OTHERWISE NOTED this document contains PRO-
Copyright © 1997–2005, Texas Instruments IncorporatedDUCTION DATA information current as of publication date. Prod-ucts conform to specifications per the terms of Texas Instrumentsstandard warranty. Production processing does not necessarilyinclude testing of all parameters.
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DESCRIPTION/ORDERING INFORMATION (CONTINUED)
A Y
Absolute Maximum Ratings
(1)
SN54LVC06A, SN74LVC06AHEX INVERTER BUFFERS/DRIVERSWITH OPEN-DRAIN OUTPUTS
SCAS596N – OCTOBER 1997 – REVISED JULY 2005
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables theoutputs, preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE(EACH INVERTER)
INPUT OUTPUTA Y
H LL H
LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range –0.5 6.5 VV
I
Input voltage range
(2)
–0.5 6.5 VV
O
Output voltage range –0.5 6.5 VI
IK
Input clamp current V
I
< 0 –50 mAI
OK
Output clamp current V
O
< 0 –50 mAI
O
Continuous output current ±50 mAContinuous current through V
CC
or GND ±100 mAD package
(3)
86DB package
(3)
96DGV package
(3)
127θ
JA
Package thermal impedance °C/WNS package
(3)
76PW package
(3)
113RGY package
(4)
47T
stg
Storage temperature range –65 150 °CP
tot
Power dissipation
(5) (6)
T
A
= –40 °C to 125 °C 500 mW
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.(3) The package thermal impedance is calculated in accordance with JESD 51-7.(4) The package thermal impedance is calculated in accordance with JESD 51-5.(5) For the D package: above 70 °C the value of P
tot
derates linearly with 8 mW/K.(6) For the DB, DGV, NS, and PW packages: above 60 °C the value of P
tot
derates linearly with 5.5 mW/K.
2
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Recommended Operating Conditions
(1)
Recommended Operating Conditions
(1)
SN54LVC06A, SN74LVC06AHEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCAS596N – OCTOBER 1997 – REVISED JULY 2005
SN54LVC06A
(2)
–55 °C to 125 °C UNIT
MIN MAX
Operating 1.65 3.6V
CC
Supply voltage VData retention only 1.5V
CC
= 1.65 V to 1.95 V 0.65 ×V
CC
V
IH
High-level input voltage V
CC
= 2.3 V to 2.7 V 1.7 VV
CC
= 2.7 V to 3.6 V 2V
CC
= 1.65 V to 1.95 V 0.35 ×V
CC
V
IL
Low-level input voltage V
CC
= 2.3 V to 2.7 V 0.7 VV
CC
= 2.7 V to 3.6 V 0.8V
I
Input voltage 0 5.5 VV
O
Output voltage 0 5.5 VV
CC
= 1.65 V 4V
CC
= 2.3 V 8I
OL
Low-level output current mAV
CC
= 2.7 V 12V
CC
= 3 V 24
(1) All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.(2) Product preview
SN74LVC06A
T
A
= 25°C –40 °C to 85°C –40 °C to 125°C UNIT
MIN MAX MIN MAX MIN MAX
Operating 1.65 3.6 1.65 3.6 1.65 3.6V
CC
Supply voltage VData retention only 1.5 1.5 1.5V
CC
= 1.65 V to 1.95 V 0.65 ×V
CC
0.65 ×V
CC
0.65 ×V
CCHigh-levelV
IH
V
CC
= 2.3 V to 2.7 V 1.7 1.7 1.7 Vinput voltage
V
CC
= 2.7 V to 3.6 V 2 2 2V
CC
= 1.65 V to 1.95 V 0.35 ×V
CC
0.35 ×V
CC
0.35 ×V
CCLow-levelV
IL
V
CC
= 2.3 V to 2.7 V 0.7 0.7 0.7 Vinput voltage
V
CC
= 2.7 V to 3.6 V 0.8 0.8 0.8V
I
Input voltage 0 5.5 0 5.5 0 5.5 VV
O
Output voltage 0 5.5 0 5.5 0 5.5 VV
CC
= 1.65 V 4 4 4V
CC
= 2.3 V 8 8 8Low-levelI
OL
mAoutput current
V
CC
= 2.7 V 12 12 12V
CC
= 3 V 24 24 24
(1) All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
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Electrical Characteristics
Electrical Characteristics
Switching Characteristics
SN54LVC06A, SN74LVC06AHEX INVERTER BUFFERS/DRIVERSWITH OPEN-DRAIN OUTPUTS
SCAS596N – OCTOBER 1997 – REVISED JULY 2005
over recommended operating free-air temperature range (unless otherwise noted)
SN54LVC06A
(1)
PARAMETER TEST CONDITIONS V
CC
–55 °C to 125 °C UNIT
MIN TYP
(2)
MAX
I
OL
= 100 µA 1.65 V to 3.6 V 0.2I
OL
= 4 mA 1.65 V 0.45V
OL
I
OL
= 8 mA 2.3 V 0.7 VI
OL
= 12 mA 2.7 V 0.4I
OL
= 24 mA 3 V 0.55I
I
V
I
= 5.5 V or GND 3.6 V ±5µAI
CC
V
I
= V
CC
or GND, I
O
= 0 3.6 V 10 µA∆I
CC
One input at V
CC
– 0.6 V, Other inputs at V
CC
or GND 2.7 V to 3.6 V 500 µAC
i
V
I
= V
CC
or GND 3.3 V 5 pF
(1) Product preview(2) T
A
= 25 °C
over recommended operating free-air temperature range (unless otherwise noted)
SN74LVC06A
PARAMETER TEST CONDITIONS V
CC
T
A
= 25 °C –40 °C to 85 °C –40 °C to 125 °C UNIT
MIN TYP MAX MIN MAX MIN MAX
I
OL
= 100 µA 1.65 V to 3.6 V 0.1 0.2 0.3I
OL
= 4 mA 1.65 V 0.24 0.45 0.6V
OL
I
OL
= 8 mA 2.3 V 0.3 0.7 0.75 VI
OL
= 12 mA 2.7 V 0.4 0.4 0.6I
OL
= 24 mA 3 V 0.55 0.55 0.8I
I
V
I
= 5.5 V or GND 3.6 V ±1±5±20 µAI
off
V
I
or V
O
= 5.5 V 0 ±1±10 ±20 µAI
CC
V
I
= V
CC
or GND, I
O
= 0 3.6 V 1 10 40 µAOne input at V
CC
– 0.6 V,∆I
CC
2.7 V to 3.6 V 500 500 5000 µAOther inputs at V
CC
or GNDC
i
V
I
= V
CC
or GND 3.3 V 5 pF
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )
SN54LVC06A
(1)
FROM TOPARAMETER V
CC
–55 °C to 125 °C UNIT(INPUT) (OUTPUT)
MIN MAX
1.8 V ±0.15 V 1.4 5.62.5 V ±0.2 V 1 3.1t
pd
A Y ns2.7 V 3.93.3 V ±0.3 V 1 3.7
(1) Product preview
4
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Switching Characteristics
Operating Characteristics
SN54LVC06A, SN74LVC06AHEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCAS596N – OCTOBER 1997 – REVISED JULY 2005
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1 )
SN74LVC06AFROM TOPARAMETER V
CC
T
A
= 25 °C –40 °C to 85 °C –40 °C to 125 °C UNIT(INPUT) (OUTPUT)
MIN TYP MAX MIN MAX MIN MAX
1.8 V ±0.15 V 1.4 3 5.1 1.4 5.6 1.4 7.62.5 V ±0.2 V 1 1.9 2.8 1 3.1 1 4t
pd
A Y ns2.7 V 1 2.4 3.7 1 3.9 1 53.3 V ±0.3 V 1 2.2 3.5 1 3.7 1 5
T
A
= 25 °C
TESTPARAMETER V
CC
TYP UNITCONDITIONS
1.8 V 2.1C
pd
Power dissipation capacitance per buffer/driver f = 10 MHz 2.5 V 2.3 pF3.3 V 2.5
5
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PARAMETER MEASUREMENT INFORMATION
VM
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1 VLOAD
Open
GND
RL
RL
Data Input
Timing Input VI
0 V
VI
0 V
0 V
tw
Input
VOLTAGE WA VEFORMS
SETUP AND HOLD TIMES
VOLTAGE WA VEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WA VEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VI
0 V
Input
Output
Waveform 1
S1 at VLOAD
(see Note B)
Output
Waveform 2
S1 at VLOAD
(see Note B)
VOL
tPZL
tPZH
tPLZ
tPHZ
VLOAD/2
0 V
VOL + V∆
VLOAD/2 - V∆
≈0 V
VI
VOLTAGE WA VEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω.
D. The outputs are measured one at a time, with one transition per measurement.
E. Since this device has open-drain outputs, tPLZ and tPZL are the same as tpd.
F. tPZL is measured at VM.
G. tPLZ is measured at VOL + V∆.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VMVM
VMVM
VMVM
VM
VMVM
VM
VM
VM
VI
VM
VM
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
3.3 V ± 0.3 V
1 kΩ
500 Ω
500 Ω
500 Ω
VCC RL
2 × VCC
2 × VCC
6 V
6 V
VLOAD CL
30 pF
30 pF
50 pF
50 pF
0.15 V
0.15 V
0.3 V
0.3 V
V∆
VCC
VCC
2.7 V
2.7 V
VI
VCC/2
VCC/2
1.5 V
1.5 V
VM
tr/tf
≤ 2 ns
≤ 2 ns
≤ 2.5 ns
≤ 2.5 ns
INPUT
tPZL (see Notes E and F)
tPLZ (see Notes E and G)
tPHZ/tPZH
VLOAD
VLOAD
VLOAD
TEST S1
VLOAD/2
SN54LVC06A, SN74LVC06AHEX INVERTER BUFFERS/DRIVERSWITH OPEN-DRAIN OUTPUTS
SCAS596N – OCTOBER 1997 – REVISED JULY 2005
(OPEN DRAIN)
Figure 1. Load Circuit and Voltage Waveforms
6
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN74LVC06AD ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADBR ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADBRE4 ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADBRG4 ACTIVE SSOP DB 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADE4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADG4 ACTIVE SOIC D 14 50 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADGVR ACTIVE TVSOP DGV 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADGVRE4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADGVRG4 ACTIVE TVSOP DGV 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADR ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADRE4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADRG4 ACTIVE SOIC D 14 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADT ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADTE4 ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ADTG4 ACTIVE SOIC D 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ANSR ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ANSRE4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ANSRG4 ACTIVE SO NS 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06APW ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06APWE4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06APWG4 ACTIVE TSSOP PW 14 90 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06APWLE OBSOLETE TSSOP PW 14 TBD Call TI Call TI
SN74LVC06APWR ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06APWRE4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06APWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
PACKAGE OPTION ADDENDUM
www.ti.com 21-Dec-2009
Addendum-Page 1
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN74LVC06APWT ACTIVE TSSOP PW 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06APWTE4 ACTIVE TSSOP PW 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06APWTG4 ACTIVE TSSOP PW 14 250 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN74LVC06ARGYR ACTIVE VQFN RGY 14 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
SN74LVC06ARGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC06A :
•Automotive: SN74LVC06A-Q1
•Enhanced Product: SN74LVC06A-EP
NOTE: Qualified Version Definitions:
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
PACKAGE OPTION ADDENDUM
www.ti.com 21-Dec-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN74LVC06ADBR SSOP DB 14 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
SN74LVC06ADGVR TVSOP DGV 14 2000 330.0 12.4 6.8 4.0 1.6 8.0 12.0 Q1
SN74LVC06ADR SOIC D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74LVC06ADT SOIC D 14 250 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1
SN74LVC06ANSR SO NS 14 2000 330.0 16.4 8.2 10.5 2.5 12.0 16.0 Q1
SN74LVC06APWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74LVC06APWT TSSOP PW 14 250 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1
SN74LVC06ARGYR VQFN RGY 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN74LVC06ADBR SSOP DB 14 2000 367.0 367.0 38.0
SN74LVC06ADGVR TVSOP DGV 14 2000 367.0 367.0 35.0
SN74LVC06ADR SOIC D 14 2500 367.0 367.0 38.0
SN74LVC06ADT SOIC D 14 250 367.0 367.0 38.0
SN74LVC06ANSR SO NS 14 2000 367.0 367.0 38.0
SN74LVC06APWR TSSOP PW 14 2000 367.0 367.0 35.0
SN74LVC06APWT TSSOP PW 14 250 367.0 367.0 35.0
SN74LVC06ARGYR VQFN RGY 14 3000 367.0 367.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUAR Y 1996 – REVISED AUGUST 2000
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DGV (R-PDSO-G**) PLASTIC SMALL-OUTLINE
24 PINS SHOWN
14
3,70
3,50 4,90
5,10
20
DIM
PINS **
4073251/E 08/00
1,20 MAX
Seating Plane
0,05
0,15
0,25
0,50
0,75
0,23
0,13
112
24 13
4,30
4,50
0,16 NOM
Gage Plane
A
7,90
7,70
382416
4,90
5,103,70
3,50
A MAX
A MIN
6,60
6,20
11,20
11,40
56
9,60
9,80
48
0,08
M
0,07
0,40
0°–8°
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE
4040065 /E 12/01
28 PINS SHOWN
Gage Plane
8,20
7,40
0,55
0,95
0,25
38
12,90
12,30
28
10,50
24
8,50
Seating Plane
9,907,90
30
10,50
9,90
0,38
5,60
5,00
15
0,22
14
A
28
1
2016
6,50
6,50
14
0,05 MIN
5,905,90
DIM
A MAX
A MIN
PINS **
2,00 MAX
6,90
7,50
0,65 M
0,15
0°–ā8°
0,10
0,09
0,25
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
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