1
FEATURES
DBV PACKAGE
(TOP VIEW)
1
2
3
5
4
OE
A
GND
VCC
Y
DESCRIPTION/ORDERING INFORMATION
SN74LVC1G126-Q1
www.ti.com
............................................................................................................................................................. SCES467B JULY 2003 REVISED APRIL 2008
SINGLE BUS BUFFER GATEWITH 3-STATE OUTPUT
Qualified for Automotive ApplicationsESD Protection Exceeds 2000 V PerMIL-STD-883, Method 3015; Exceeds 200 VUsing Machine Model (C = 200 pF, R = 0)Supports 5-V V
CC
OperationInputs Accept Voltages to 5.5 VLow Power Consumption, 10- µA Max I
CC± 24-mA Output Drive at 3.3 VI
off
Supports Partial-Power-Down ModeOperation
Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II
This single bus buffer gate is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC1G126-Q1 is a single line driver with a 3-state output. The output is disabled when theoutput-enable (OE) input is low.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through apulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.
This device is fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the outputs,preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
(1)
T
A
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
(3)
40 °C to 125 °C SOT (SOT-23) DBV Reel of 3000 1P1G126QDBVRQ1 C26_
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .(3) DBV: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
FUNCTION TABLE
INPUTS
OUTPUT
YOE A
H H HH L LL X Z
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.
A Y
OE 1
2 4
Absolute Maximum Ratings
(1)
SN74LVC1G126-Q1
SCES467B JULY 2003 REVISED APRIL 2008 .............................................................................................................................................................
www.ti.com
LOGIC DIAGRAM (POSITIVE LOGIC)
over operating free-air temperature range (unless otherwise noted)
MIN MAX UNIT
V
CC
Supply voltage range 0.5 6.5 VV
I
Input voltage range
(2)
0.5 6.5 VV
O
Voltage range applied to any output in the high-impedance or power-off state
(2)
0.5 6.5 VV
O
Voltage range applied to any output in the high or low state
(2) (3)
0.5 V
CC
+ 0.5 VI
IK
Input clamp current V
I
< 0 50 mAI
OK
Output clamp current V
O
< 0 50 mAI
O
Continuous output current ± 50 mAContinuous current through V
CC
or GND ± 100 mAθ
JA
Package thermal impedance
(4)
206 °C/WT
stg
Storage temperature range 65 150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operatingconditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.(3) The value of V
CC
is provided in the recommended operating conditions table.(4) The package thermal impedance is calculated in accordance with JESD 51-7.
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Product Folder Link(s): SN74LVC1G126-Q1
Recommended Operating Conditions
(1)
SN74LVC1G126-Q1
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............................................................................................................................................................. SCES467B JULY 2003 REVISED APRIL 2008
MIN MAX UNIT
Operating 1.65 5.5V
CC
Supply voltage VData retention only 1.5V
CC
= 1.65 V to 1.95 V 0.65 ×V
CC
V
CC
= 2.3 V to 2.7 V 1.7V
IH
High-level input voltage VV
CC
= 3 V to 3.6 V 2V
CC
= 4.5 V to 5.5 V 0.7 ×V
CC
V
CC
= 1.65 V to 1.95 V 0.35 ×V
CC
V
CC
= 2.3 V to 2.7 V 0.7V
IL
Low-level input voltage VV
CC
= 3 V to 3.6 V 0.8V
CC
= 4.5 V to 5.5 V 0.3 ×V
CC
V
I
Input voltage 0 5.5 VV
O
Output voltage 0 V
CC
VV
CC
= 1.65 V 4V
CC
= 2.3 V 8I
OH
High-level output current 16 mAV
CC
= 3 V
24V
CC
= 4.5 V 24V
CC
= 1.65 V 4V
CC
= 2.3 V 8I
OL
Low-level output current 16 mAV
CC
= 3 V
24V
CC
= 4.5 V 24V
CC
= 1.8 V ± 0.15 V, 2.5 V ± 0.2 V 20
Δt/ Δv Input transition rise or fall rate V
CC
= 3.3 V ± 0.3 V 10 ns/VV
CC
= 5 V ± 0.5 V 5T
A
Operating free-air temperature 40 125 °C
(1) All unused inputs of the device must be held at V
CC
or GND to ensure proper device operation. Refer to the TI application report,Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Copyright © 2003 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): SN74LVC1G126-Q1
Electrical Characteristics
Switching Characteristics
Operating Characteristics
SN74LVC1G126-Q1
SCES467B JULY 2003 REVISED APRIL 2008 .............................................................................................................................................................
www.ti.com
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS V
CC
MIN TYP
(1)
MAX UNIT
I
OH
= 100 µA 1.65 V to 5.5 V V
CC
0.1I
OH
= 4 mA 1.65 V 1.2I
OH
= 8 mA 2.3 V 1.9V
OH
VI
OH
= 16 mA 3 V 2.43 V 2.3I
OH
= 24 mA
4.5 V 3.8I
OL
= 100 µA 1.65 V to 5.5 V 0.1I
OL
= 4 mA 1.65 V 0.45I
OL
= 8 mA 2.3 V 0.3V
OL
VI
OL
= 16 mA 3 V 0.43 V 0.55I
OL
= 24 mA
4.5 V 0.55I
I
A or OE inputs V
I
= 5.5 V or GND 0 to 5.5 V ± 5 µAI
off
V
I
or V
O
= 5.5 V 0 ± 10 µAI
OZ
V
O
= 0 to 5.5 V 3.6 V 10 µAI
CC
V
I
= 5.5 V or GND, I
O
= 0 1.65 V to 5.5 V 10 µA
ΔI
CC
One input at V
CC
0.6 V, Other inputs at V
CC
or GND 3 V to 5.5 V 500 µAC
i
V
I
= V
CC
or GND 3.3 V 4 pF
(1) All typical values are at V
CC
= 3.3 V, T
A
= 25 °C.
over recommended operating free-air temperature range, C
L
= 50 pF (unless otherwise noted) (see Figure 1 )
V
CC
= 3.3 V V
CC
= 5 VFROM TO
± 0.3 V ± 0.5 VPARAMETER UNIT(INPUT) (OUTPUT)
MIN MAX MIN MAX
t
pd
A Y 1 5.8 1 4.5 nst
en
OE Y 1.2 5.8 1 5 nst
dis
OE Y 1 6 1 4.2 ns
T
A
= 25 °C
V
CC
= 3.3 V V
CC
= 5 VTESTPARAMETER UNITCONDITIONS
TYP TYP
Outputs enabled 19 21C
pd
Power dissipation capacitance f = 10 MHz pFOutputs disabled 3 4
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Product Folder Link(s): SN74LVC1G126-Q1
PARAMETER MEASUREMENT INFORMATION
VM
th
tsu
From Output
Under Test
CL
(see Note A)
LOAD CIRCUIT
S1 VLOAD
Open
GND
RL
RL
Data Input
Timing Input VI
0 V
VI
0 V
0 V
tw
Input
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
PULSE DURATION
tPLH
tPHL
tPHL
tPLH
VOH
VOH
VOL
VOL
VI
0 V
Input
Output
Waveform 1
S1 at VLOAD
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
VLOAD/2
0 V
VOL + V
VOH – V0 V
VI
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
Output
Output
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
VLOAD
GND
TEST S1
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 .
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Output
Control
VMVM
VMVM
VMVM
VM
VMVM
VM
VM
VM
VI
VM
VM
3.3 V ± 0.3 V
5 V ± 0.5 V 500
500
VCC RL
6 V
2 × VCC
VLOAD CL
50 pF
50 pF 0.3 V
0.3 V
V
3 V
VCC
VI
1.5 V
VCC/2
VM
tr/tf
2.5 ns
2.5 ns
INPUTS
SN74LVC1G126-Q1
www.ti.com
............................................................................................................................................................. SCES467B JULY 2003 REVISED APRIL 2008
Figure 1. Load Circuit and Voltage Waveforms
Copyright © 2003 2008, Texas Instruments Incorporated Submit Documentation Feedback 5
Product Folder Link(s): SN74LVC1G126-Q1
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
1P1G126QDBVRQ1 ACTIVE SOT-23 DBV 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC1G126-Q1 :
Catalog: SN74LVC1G126
Enhanced Product: SN74LVC1G126-EP
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Enhanced Product - Supports Defense, Aerospace and Medical Applications
PACKAGE OPTION ADDENDUM
www.ti.com 8-Jul-2009
Addendum-Page 1
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