 
   
1
FEATURES
APPLICATIONS
DESCRIPTION
3
2
4
5
DCK PACKAGE
(TOP VIEW)
1FB
GND
NC
OUT
IN
GND
TPS715xxOUT
IN MSP430
Solar
Cell
TPS71501-EP
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......................................................................................................................................................................................... SGLS396 – SEPTEMBER 2008
50-mA, 24-V, 3.2- µA SUPPLY CURRENT, LOW-DROPOUT LINEAR REGULATOR
•Minimum/Maximum Specified Current Limit
2
•Controlled Baseline •5-Pin SC70/SOT-323 (DCK) Package– One Assembly Site •For 80-mA Rated Current and Higher PowerPackage, See TPS715Axx– One Test Site– One Fabrication Site•Extended Temperature Performance of
•Ultra-Low Power Microcontrollers– 55 ° C to 125 ° C
•Cellular/Cordless Handsets•Enhanced Diminishing Manufacturing Sources
•Portable/Battery-Powered Equipment(DMS) Support•Enhanced Product-Change Notification•Qualification Pedigree
(1)
The TPS71501 low-dropout (LDO) voltage regulators•24-V Maximum Input Voltage
offer the benefits of high input voltage, low dropout•Low 3.2- µA Quiescent Current at 50 mA voltage, low-power operation, and miniaturizedpackaging. The device, which operates over an input•Stable With Any Capacitor ( ≥0.47 µF)
range of 2.5 V to 24 V, is stable with any capacitor•50-mA Low-Dropout Regulator
(≥0.47 µF). The low dropout voltage and low•Adjustable Output Voltage (1.2 V to 15 V)
quiescent current allow operation at extremely lowpower levels. Therefore, the devices are ideal for•Designed to Support MSP430 Families:
powering battery-management ICs. Specifically,– 1.9-V Version Ensured to be Higher
because the devices are enabled as soon as theThan Minimum V
IN
of 1.8 V
applied voltage reaches the minimum input voltage,– 2.3-V Version Ensured to Meet 2.2-V
the output is quickly available to power continuouslyoperating battery-charging ICs.Minimum V
IN
for Flash on MSP430F2xx– 3.45-V Version Ensured to be Lower
The usual PNP pass transistor has been replaced byThan Maximum V
IN
of 3.6 V
a PMOS pass element. Because the PMOS passelement behaves as a low-value resistor, the low– Wide Variety of Fixed Output Voltage
dropout voltage, typically 415 mV at 50 mA of loadOptions to Match V
IN
to the Minimum
current, is directly proportional to the load current.Required for Desired MSP430 Speed
The low quiescent current (3.2 µA typically) is stable(1)
Component qualification in accordance with JEDEC and
over the entire range of output load current (0 mA toindustry standards to ensure reliable operation over an
50 mA).extended temperature range. This includes, but is not limitedto, Highly Accelerated Stress Test (HAST) or biased 85/85,temperature cycle, autoclave or unbiased HAST,electromigration, bond intermetallic life, and mold compoundlife. Such qualification testing should not be viewed asjustifying use of this component beyond specifiedperformance and environmental limits.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of TexasInstruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments IncorporatedProducts conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters areInstruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, productionnecessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
ABSOLUTE MAXIMUM RATINGS
DISSIPATION RATINGS
TPS71501-EP
SGLS396 – SEPTEMBER 2008 .........................................................................................................................................................................................
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled withappropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be moresusceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
(1)
T
J
PACKAGE
(2)
ORDERABLE PART NUMBER TOP-SIDE MARKING
– 55 ° C to 125 ° C SC70 – DCK Reel of 3000 TPS71501MDCKREP CVP
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TIweb site at www.ti.com .(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging .
over operating junction temperature range unless otherwise noted
(1) (2)
V
IN
Input voltage range IN – 0.3 V to 24 VV
OUT
Output voltage range OUT – 0.3 V to 6 VPeak output current Internally limitedContinuous total power dissipation See Dissipation Ratings TableT
J
Junction temperature range – 55 ° C to 150 ° CT
stg
Storage temperature range – 65 ° C to 150 ° CHuman-Body Model (HBM) 2000 VESD Electrostatic discharge rating
Charged-Device Model (CDM) 500 V
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratingsonly, and functional operation of the device at these or any other conditions beyond those indicated under the Electrical Characteristicsis not implied. Exposure to absolute maximum rated conditions for extended periods may affect device reliability.(2) All voltage values are with respect to the network ground terminal.
DERATING FACTOR T
A
≤25 ° C T
A
= 70 ° C T
A
= 85 ° CBOARD PACKAGE R
θJC
° C/W R
θJA
° C/W
ABOVE T
A
= +25 ° C POWER RATING POWER RATING POWER RATING
Low-K
(1)
DCK 165 395 2.52 mW/ ° C 250 mW 140 mW 100 mWHigh-K
(2)
DCK 165 315 3.18 mW/ ° C 320 mW 175 mW 130 mW
(1) The JEDEC Low-K (1s) board design used to derive this data was a 3-in × 3-in, two-layer board with 2-oz copper traces on top of theboard.
(2) The JEDEC High-K (2s2p) board design used to derive this data was a 3-in × 3-in, multilayer board with 1-oz internal power and groundplanes and 2-oz copper traces on top and bottom of the board.
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ELECTRICAL CHARACTERISTICS
TPS71501-EP
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......................................................................................................................................................................................... SGLS396 – SEPTEMBER 2008
Over operating junction temperature range (T
J
= – 55 ° C to 125 ° C), V
IN
= V
OUT(NOM)
+ 1 V, I
OUT
= 1 mA, and C
OUT
= 1 µF(unless otherwise noted). Typical values are at T
J
= 25 ° C.
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
I
O
= 10 mA 2.5 24Input voltage
(1)
V
IN
VI
O
= 50 mA 3 24V
OUT
voltage range 1.2 15 VV
IN
+ 1.0 V ≤V
IN
≤24 VOver V
IN
, I
OUT
, andV
OUT
accuracy
(1)
– 6.25 +6.25 %temperature
100 µA≤I
OUT
≤50 mA0≤I
OUT
≤50 mA, T
J
= – 40 ° C to +85 ° C 3.2 4.2Ground pin current
(2)
I
GND
0 mA ≤I
OUT
≤50 mA 3.2 4.8 µA0 mA ≤I
OUT
≤50 mA, V
IN
= 24 V 5.8Load regulation ΔV
OUT
/ΔI
OUT
I
OUT
= 100 µA to 50 mA 22 mVOutput voltage
ΔV
OUT
/ΔV
IN
V
OUT
+ 1 V < V
IN
≤24 V 20 75 mVline regulation
(1)
BW = 200 Hz to 100 kHz, C
OUT
= 10 µF,Output noise voltage V
n
575 µVrmsI
OUT
= 50 mAV
OUT
= 0 V, V
IN
≥3.5 V 125 750 mAOutput current limit I
CL
V
OUT
= 0 V, V
IN
< 3.5 V 90 750 mAPower-supply ripple rejection PSRR f = 100 kHz, C
OUT
= 10 µF 60 dBDropout voltage
V
DO
I
OUT
= 50 mA 415 750 mVV
IN
= V
OUT(NOM)
– 1 V
(1) Minimum V
IN
= V
OUT
+ V
DO
or the value shown for Input voltage in this table, whichever is greater.(2) See Figure 1 . The TPS71501 employs a leakage null control circuit. This circuit is active only if output current is less than pass FETleakage current. The circuit is typically active when output load is less than 5 µA, V
IN
is greater than 18 V, and die temperature isgreater than 100 ° C.
Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 3
Product Folder Link(s): TPS71501-EP
_+
Current
Sense LeakageNull
ControlCircuit
R1
R2
V(IN)
GND
V(OUT)
ILIM
Bandgap
Reference
V =1.205V
ref
FB
TPS71501-EP
SGLS396 – SEPTEMBER 2008 .........................................................................................................................................................................................
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FUNCTIONAL BLOCK DIAGRAM
Figure 1. Functional Block Diagram
Table 1. Terminal Functions
TERMINAL
DESCRIPTIONNAME NO.
FB 1 Feedback. This terminal is used to set the output voltage.GND 2 GroundNC 3 No connectionIN 4 Input supplyOUT 5 Output of the regulator, any output capacitor ≥0.47 µF can be used for stability.
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TYPICAL CHARACTERISTICS
3.290
3.295
3.300
3.305
3.310
3.315
3.320
0 10 20 30 40 50
IO − Output Current − mA
VIN = 4.3 V
COUT = 1 µF
TJ = 25°C
VOUT − Output Voltage − V
−40−25−10 5 20 35 50 65 80 95 110 125
TJ − Junction Temperature − °C
3.25
3.26
3.27
3.28
3.29
3.30
3.31
3.32
VIN = 4.3 V
COUT = 1 µF
IOUT = 50 mA
IOUT = 1 mA
VOUT − Output Voltage − V
2
2.5
3
3.5
4
4.5
−40−25−10 5 20 35 50 65 80 95 110 125
TJ − Junction Temperature − °C
VIN = 4.3 V
VOUT = 3.3 V
IOUT = 1 µF
IGND − Ground Current − µ A
100 1 k 10 k 100 k
f − Frequency − Hz
IOUT = 1 mA
IOUT = 50 mA
µHzOutput Spectral Noise Density −
0
1
2
3
4
5
6
7
8VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 µF
V/
f − Frequency − Hz
− Output Impedance −ZoΩ
14
8
0
12
2
4
10
VIN = 4.3 V
VOUT = 3.3 V
COUT = 1 µF
TJ = 25°C
IOUT = 1 mA
100 1 M10 1k 10k 100k 10 M
IOUT = 50 mA
6
16
18
0
100
200
300
400
500
600
0 10 20 30 40 50
TJ = 125°C
TJ = 25°C
TJ = −40°C
VIN = 3.2 V
COUT = 1 µF
IOUT − Output Current − mA
− Dropout Voltage − mV
VDO
0
0.1
0.2
0.4
0.5
0.6
0.7
0.8
0.9
1
0 3 6 9 12 15
VIN − Input Voltage − V
− Dropout Voltage − V
VDO
IOUT = 50 mA
TJ = 25°C
TJ = −40°C
TJ = 125°C
0.3
TJ − Junction Temperature − °C
− Dropout Voltage − mV
VDO
−40 5−25 20 35 65 110 12550−10 80 95
VIN = 3.2 V
IOUT = 50 mA
IOUT = 10 mA
0
100
200
300
400
500
600
TPS71501-EP
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......................................................................................................................................................................................... SGLS396 – SEPTEMBER 2008
OUTPUT VOLTAGE OUTPUT VOLTAGE QUIESCENT CURRENTvs vs vsOUTPUT CURRENT JUNCTION TEMPERATURE JUNCTION TEMPERATURE
Figure 2. Figure 3. Figure 4.
OUTPUT SPECTRAL
NOISE DENSITY OUTPUT IMPEDANCE DROPOUT VOLTAGEvs vs vsFREQUENCY FREQUENCY OUTPUT CURRENT
Figure 5. Figure 6. Figure 7.
TPS71501 POWER-SUPPLYDROPOUT VOLTAGE DROPOUT VOLTAGE RIPPLE REJECTIONvs vs vsINPUT VOLTAGE JUNCTION TEMPERATURE FREQUENCY
Figure 8. Figure 9. Figure 10.
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18161412
VIN VOUT
VOUT = 3.3 V
RL = 66 Ω
COUT = 10 µF
8
7
6
5
4
3
2
1
0
t − Time − ms
20 64 108 20
VOUT − Output Voltage − V
VIN − Input Voltage − V
t − Time − µs
0 15010050 200 250 350300 400 450 500
5.3
VOUT = 3.3 V
IOUT = 50 mA
COUT = 10 µF
4.3
100
50
0
−50
DVOUT − Change in
Output Voltage − mV
VIN − Input Voltage − V
t − Time − ms
0 300200100 400 500 700600 800 900 1000
60
40
20
0
V =4.3V
V =3.3V
C =10 F
IN
OUT
OUT m
D -
-
V Changein
OutputVoltage mV
OUT
IOutputCurrent mA- -
OUT
0
400
-200
200
TPS71501-EP
SGLS396 – SEPTEMBER 2008 .........................................................................................................................................................................................
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TYPICAL CHARACTERISTICS (continued)
POWER UP / POWER DOWN LINE TRANSIENT RESPONSE LOAD TRANSIENT RESPONSE
Figure 11. Figure 12. Figure 13.
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APPLICATION INFORMATION
External Capacitor Requirements
Power Dissipation and Junction Temperature
PD(max) +TJmax *TA
RqJA
(1)
PD+ǒVIN*VOUTǓ IOUT
(2)
Regulator Protection
TPS71501-EP
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......................................................................................................................................................................................... SGLS396 – SEPTEMBER 2008
The TPS71501 LDO regulator has been optimized for ultra-low power applications such as the MSP430microcontroller. Its ultra-low supply current maximizes efficiency at light loads, and its high input voltage rangemakes it suitable for supplies such as unconditioned solar panels.
Although not required, a 0.047- µF or larger input bypass capacitor, connected between IN and GND and locatedclose to the device, is recommended to improve transient response and noise rejection of the power supply as awhole. A higher-value input capacitor may be necessary if large, fast-rise-time load transients are anticipated andthe device is located several inches from the power source.
The TPS71501 requires an output capacitor connected between OUT and GND to stabilize the internal controlloop. Any capacitor (including ceramic and tantalum) ≥0.47 µF properly stabilizes this loop. X7R type capacitorsare recommended but X5R and others may be used.
To ensure reliable operation, worst-case junction temperature should not exceed +125 ° C. This restriction limitsthe power dissipation the regulator can handle in any given application. To ensure the junction temperature iswithin acceptable limits, calculate the maximum allowable dissipation, P
D(max)
, and the actual dissipation, P
D
,which must be less than or equal to P
D(max)
.
The maximum-power-dissipation limit is determined using the following equation:
where:
•T
J
max is the maximum allowable junction temperature.•R
θJA
is the thermal resistance junction-to-ambient for the package (see the Dissipation Ratings table).•T
A
is the ambient temperature.
The regulator dissipation is calculated using:
For a higher power package version of the TPS715xx, see the TPS715Axx .
The TPS71501 PMOS-pass transistor has a built-in back diode that conducts reverse current when the inputvoltage drops below the output voltage (e.g., during power-down). Current is conducted from the output to theinput and is not internally limited. If extended reverse voltage operation is anticipated, external limiting might beappropriate.
The TPS71501 features internal current limiting. During normal operation, the TPS71501 limits output current toapproximately 500 mA. When current limiting engages, the output voltage scales back linearly until theovercurrent condition ends. Take care not to exceed the power dissipation ratings of the package.
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Programming the TPS71501 Adjustable LDO Regulator
VOUT +VREF ǒ1)R1
R2Ǔ
(3)
R1 +ǒVOUT
VREF *1Ǔ R2
(4)
OUTPUT VOLTAGE
PROGRAMMING GUIDE
OUTPUT
VOLTAGE R1 R2
1.8 V
2.8 V
5.0 V
0.499 MΩ
1.33 MΩ
3.16 MΩ
1 MΩ
1 MΩ
1 MΩ
GND FB
IN OUT
VIN VOUT
R1CFB
R2
TPS71501
VOUT +VREF ǒ1)R1
R2Ǔ
0.1µF 0.47µF
Power the MSP430 Microcontroller
TPS71501-EP
SGLS396 – SEPTEMBER 2008 .........................................................................................................................................................................................
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The output voltage of the TPS71501 adjustable regulator is programmed using an external resistor divider asshown in Figure 14 . The output voltage operating range is 1.2 V to 15 V, and is calculated using:
where:
•V
REF
= 1.205 V typ (the internal reference voltage)
Resistors R1 and R2 should be chosen for approximately 1.5- µA divider current. Lower value resistors can beused for improved noise performance, but the solution consumes more power. Higher resistor values should beavoided as leakage current into/out of FB across R1/R2 creates an offset voltage that artificiallyincreases/decreases the feedback voltage and thus erroneously decreases/increases V
OUT
. The recommendeddesign procedure is to choose R2 = 1 M Ωto set the divider current at 1.5 µA, and then calculate R1 usingEquation 4 :
Figure 14. TPS71501 Adjustable LDO Regulator Programming
Several versions of the TPS715xx are ideal for powering the MSP430 microcontroller. Table 2 shows potentialapplications of some voltage versions.
Table 2. Typical MSP430 Applications
DEVICE V
OUT
(TYP) APPLICATION
TPS71519 1.9 V V
OUT, MIN
> 1.800 V required by many MSP430s. Allows lowest power consumption operation.TPS71523 2.3 V V
OUT, MIN
> 2.200 V required by some MSP430s FLASH operation.TPS71530 3.0 V V
OUT, MIN
> 2.700 V required by some MSP430s FLASH operation.TPS715345 3.45 V V
OUT, MIN
< 3.600 V required by some MSP430s. Allows highest speed operation.
The TPS715xx family offers many output voltage versions to allow designers to minimize the supply voltage forthe processing speed required of the MSP430. This minimizes the supply current consumed by the MSP430.
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PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
TPS71501MDCKREP ACTIVE SC70 DCK 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
V62/08619-01XE ACTIVE SC70 DCK 5 3000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS71501-EP :
•Catalog: TPS71501
•Automotive: TPS71501-Q1
NOTE: Qualified Version Definitions:
•Catalog - TI's standard catalog product
•Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
PACKAGE OPTION ADDENDUM
www.ti.com 13-Oct-2008
Addendum-Page 1
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