LT1074/LT1076
1
sn1074 1074fds
, LTC and LT are registered trademarks of Linear Technology Corporation.
APPLICATIO S
U
FEATURES
DESCRIPTIO
U
TYPICAL APPLICATIO
U
Step-Down Switching
Regulator
The LT
®
1074 is a 5A (LT1076 is rated at 2A) monolithic
bipolar switching regulator which requires only a few
external parts for normal operation. The power switch, all
oscillator and control circuitry, and all current limit com-
■
Buck Converter with Output Voltage Range of 2.5V
to 50V
■
Tapped-Inductor Buck Converter with 10A Output
at 5V
■
Positive-to-Negative Converter
■
Negative Boost Converter
■
Multiple Output Buck Converter
■
5A Onboard Switch (LT1074)
■
Operates Up to 60V Input
■
100kHz Switching Frequency
■
Greatly Improved Dynamic Behavior
■
Available in Low Cost 5 and 7-Lead Packages
■
Only 8.5mA Quiescent Current
■
Programmable Current Limit
■
Micropower Shutdown Mode
ponents, are included on the chip. The topology is a classic
positive “buck” configuration but several design innova-
tions allow this device to be used as a positive-to-negative
converter, a negative boost converter, and as a flyback
converter. The switch output is specified to swing 40V
below ground, allowing the LT1074 to drive a tapped-
inductor in the buck mode with output currents up to 10A.
The LT1074 uses a true analog multiplier in the feedback
loop. This makes the device respond nearly instanta-
neously to input voltage fluctuations and makes loop gain
independent of input voltage. As a result, dynamic behav-
ior of the regulator is significantly improved over previous
designs.
On-chip pulse by pulse current limiting makes the LT1074
nearly bust-proof for output overloads or shorts. The input
voltage range as a buck converter is 8V to 60V, but a self-
boot feature allows input voltages as low as 5V in the
inverting and boost configurations.
The LT1074 is available in low cost TO-220 or DD packages
with frequency pre-set at 100kHz and current limit at 6.5A
(LT1076 = 2.6A). A 7-pin TO-220 package is also available
which allows current limit to be adjusted down to zero. In
addition, full micropower shutdown can be programmed.
See Application Note 44 for design details.
A fixed 5V output, 2A version is also available. See LT1076-5.
Buck Converter Efficiency
Basic Positive Buck Converter
++
VSW
VIN
VC
GND FB
LT1074
5V
5A
C1
500µF
R1
2.8k
1%
R2
2.21k
1%
MBR745*
10V TO 40V
C3†
200µF
R3
2.7k
C2
0.01µF
L1**
50µH (LT1074)
100µH (LT1076)
USE MBR340 FOR LT1076
COILTRONICS #50-2-52 (LT1074)
#100-1-52 (LT1076)
PULSE ENGINEERING, INC.
#PE-92114 (LT1074)
#PE-92102 (LT1076)
HURRICANE #HL-AK147QQ (LT1074)
#HL-AG210LL (LT1076)
RIPPLE CURRENT RATING ≥ IOUT/2
*
**
†
LT1074•TA01
25V
OUTPUT LOAD CURRENT (A)
0
EFFICIENCY (%)
60
70
80
90
1234
LT1074•TPC27
56
100
50
L = 50µH TYPE 52 CORE
DIODE = MBR735
V = 5V, V = 15V
OUT IN
V = 12V, V = 20V
OUT IN
LT1074
LT1074/LT1076
2
sn1074 1074fds
ABSOLUTE AXI U RATI GS
W
WW
U
PACKAGE/ORDER I FOR ATIO
UUW
(Note 1)
*Assumes package is soldered to 0.5 IN
2
of 1 oz. copper over internal ground plane or over back side plane.
LT1076CQ
LT1076IQ
LT1076CR
LT1076IR
LT1076HVCR
LT1076HVIR
LT1074CT7
LT1074HVCT7
LT1074IT7
LT1074HVIT7
LT1076CT7
LT1076HVCT7
LT1074CT
LT1074HVCT
LT1074IT
LT1074HVIT
LT1076CT
LT1076HVCT
LT1076IT
LT1076HVIT
LT1074CK
LT1074HVCK
LT1074MK
LT1074HVMK
LT1076CK
LT1076HVCK
LT1076MK
LT1076HVMK
Input Voltage
LT1074/ LT1076 .................................................. 45V
LT1074HV/LT1076HV ......................................... 64V
Switch Voltage with Respect to Input Voltage
LT1074/ LT1076 .................................................. 64V
LT1074HV/LT1076HV ......................................... 75V
Switch Voltage with Respect to Ground Pin (V
SW
Negative)
LT1074/LT1076 (Note 7) ..................................... 35V
LT1074HV/LT1076HV (Note 7) ........................... 45V
Feedback Pin Voltage..................................... –2V, +10V
Shutdown Pin Voltage (Not to Exceed V
IN
) .............. 40V
I
LIM
Pin Voltage (Forced) ............................................ 5.5V
Maximum Operating Ambient Temperature Range
Commercial ................................................. 0°C to 70°C
Industrial ................................................ –40°C to 85°C
Military (OBSOLETE) ..................... –55°C to 125°C
Maximum Operating Junction Temperature Range
Commercial ............................................... 0°C to 125°C
Industrial .............................................. –40°C to 125°C
Military (OBSOLETE) .................... –55°C to 150°C
Maximum Storage Temperature ............... –65°C to 150°C
Lead Temperature (Soldering, 10 sec)...................... 300°C
ORDER PART
NUMBER
ORDER PART
NUMBER
LT1076: θ
JC
= 4°C, θ
JA
= 30°C/W
LT1076: θ
JC
= 4°C, θ
JA
= 30°C/W
LT1074: θ
JC
= 2.5°C, θ
JA
= 50°C/W
LT1076: θ
JC
= 4°C, θ
JA
= 50°C/W
LT1074: θ
JC
= 2.5°C, θ
JA
= 35°C/W
LT1076: θ
JC
= 4°C, θ
JA
= 35°C/W
LT1074: θ
JC
= 2.5°C, θ
JA
= 50°C/W
LT1076: θ
JC
= 4°C, θ
JA
= 50°C/W
Q PACKAGE
5-LEAD PLASTIC DD
FRONT VIEW
VIN
VSW
GND
VC
FB/SENSE
5
4
3
2
1
R PACKAGE
7-LEAD PLASTIC DD
FRONT VIEW
SHDN
VC
FB/SENSE
GND
ILIM
VSW
VIN
7
6
5
4
3
2
1
2
4
1
3
V
C
V
IN
V
SW
CASE
IS GND
FB
K PACKAGE
4-LEAD TO-3 METAL CAN
BOTTOM VIEW
T PACKAGE
5-LEAD PLASTIC TO-220
LEADS ARE FORMED STANDARD FOR
STRAIGHT LEADS, ORDER FLOW 06
V
IN
V
SW
GND
V
C
FB
FRONT VIEW
5
4
3
2
1
T7 PACKAGE
7-LEAD PLASTIC TO-220
SHDN
VC
FB
GND
ILIM
VSW
VIN
FRONT VIEW
7
6
5
4
3
2
1
TAB IS
GND
TAB IS
GND
TAB IS
GND
TAB IS
GND
Consult LTC Marketing for parts specified with wider operating temperature ranges.
OBSOLETE PACKAGE
Consider the T5 Package for Alternate Source
LT1074/LT1076
3
sn1074 1074fds
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. Tj = 25°C, VIN = 25V, unless otherwise noted.
PARAMETER CONDITIONS MIN TYP MAX UNITS
Switch “On” Voltage (Note 2) LT1074 I
SW
= 1A, T
j
≥ 0°C 1.85 V
I
SW
= 1A, T
j
< 0°C 2.1 V
I
SW
= 5A, T
j
≥ 0°C 2.3 V
I
SW
= 5A, T
j
< 0°C 2.5 V
LT1076 I
SW
= 0.5A ●1.2 V
I
SW
= 2A ●1.7 V
Switch “Off” Leakage LT1074 V
IN
≤ 25V, V
SW
= 0 5 300 µA
V
IN
= V
MAX,
V
SW
= 0 (Note 8) 10 500 µA
LT1076 V
IN
= 25V, V
SW
= 0 150 µA
V
IN
= V
MAX,
V
SW
= 0 (Note 8) 250 µA
Supply Current (Note 3) V
FB
= 2.5V, V
IN
≤ 40V ●8.5 11 mA
40V < V
IN
< 60V ●912 mA
V
SHUT
= 0.1V (Device Shutdown) (Note 9) ●140 300 µA
Minimum Supply Voltage Normal Mode ●7.3 8 V
Startup Mode (Note 4) ●3.5 4.8 V
Switch Current Limit (Note 5) LT1074 I
LIM
Open ●5.5 6.5 8.5 A
R
LIM
= 10k (Note 6) 4.5 A
R
LIM
= 7k (Note 6) 3 A
LT1076 I
LIM
Open ●2 2.6 3.2 A
R
LIM
= 10k (Note 6) 1.8 A
R
LIM
= 7k (Note 6) 1.2 A
Maximum Duty Cycle ●85 90 %
Switching Frequency 90 100 110 kHz
T
j
≤ 125°C●85 120 kHz
T
j
> 125°C●85 125 kHz
V
FB
= 0V through 2kΩ (Note 5) 20 kHz
Switching Frequency Line Regulation 8V ≤ V
IN
≤ V
MAX
(Note 8) ●0.03 0.1 %/V
Error Amplifier Voltage Gain (Note 7) 1V ≤ V
C
≤ 4V 2000 V/V
Error Amplifier Transconductance 3700 5000 8000 µmho
Error Amplifier Source and Sink Current Source (V
FB
= 2V) 100 140 225 µA
Sink (V
FB
= 2.5V) 0.7 1 1.6 mA
Feedback Pin Bias Current V
FB
= V
REF
●0.5 2 µA
Reference Voltage V
C
= 2V ●2.155 2.21 2.265 V
Reference Voltage Tolerance V
REF
(Nominal) = 2.21V ±0.5 ±1.5 %
All Conditions of Input Voltage, Output ●±1±2.5 %
Voltage, Temperature and Load Current
Reference Voltage Line Regulation 8V ≤ V
IN
≤ V
MAX
(Note 8) ●0.005 0.02 %/V
V
C
Voltage at 0% Duty Cycle 1.5 V
Over Temperature ●–4 mV/°C
Multiplier Reference Voltage 24 V
Shutdown Pin Current V
SH
= 5V ●51020 µA
V
SH
≤ V
THRESHOLD
(≅2.5V) ●50 µA
Shutdown Thresholds Switch Duty Cycle = 0 ●2.2 2.45 2.7 V
Fully Shut Down ●0.1 0.3 0.6 V
Thermal Resistance Junction to Case LT1074 2.5 °C/W
LT1076 4.0 °C/W
ELECTRICAL CHARACTERISTICS
LT1074/LT1076
4
sn1074 1074fds
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: To calculate maximum switch “on” voltage at currents between
low and high conditions, a linear interpolation may be used.
Note 3: A feedback pin voltage (V
FB
) of 2.5V forces the V
C
pin to its low
clamp level and the switch duty cycle to zero. This approximates the zero
load condition where duty cycle approaches zero.
Note 4: Total voltage from V
IN
pin to ground pin must be ≥ 8V after start-
up for proper regulation.
Note 5: Switch frequency is internally scaled down when the feedback pin
voltage is less than 1.3V to avoid extremely short switch on times. During
testing, V
FB
is adjusted to give a minimum switch on time of 1µs.
Note 6: I
LIM
≈ (LT1074), I
LIM
≈ (LT1076).
Note 7: Switch to input voltage limitation must also be observed.
Note 8: V
MAX
= 40V for the LT1074/76 and 60V for the LT1074HV/76HV.
Note 9: Does not include switch leakage.
R
LIM
– 1k
2k
R
LIM
– 1k
5.5k
ELECTRICAL CHARACTERISTICS
6V
REGULATOR
AND BIAS
+
–
-POWER
SHUTDOWN
µ
10 Aµ320 Aµ
+
–
2.35V
0.3V
CURRENT
LIMIT
SHUTDOWN
4.5V 10k
S
+
–
CURRENT
LIMIT
COMP
C2
15
400
+
–
C1
R/S
LATCH
R
R
Q
X
Y
Z
+
–
A1
ERROR
AMP
FB V
100kHz
OSCILLATOR
ANALOG
MULTIPLIER
XY
Z
FREQ SHIFT
SYNC
G1
PULSE WIDTH
COMPARATOR
24V (EQUIVALENT)
2.21V SWITCH
OUTPUT
(V )
0.04
250
500
INPUT SUPPLY
SHUTDOWN* I *
6V TO ALL
CIRCUITRY
LIM
ΩΩ
SW
Ω
Ω
V
IN
C
LT1074 • BD01
100
SWITCH
OUTPUT (V )
0.1
Ω
SW
Ω
3V(p-p)
LT1076
LT1074
*AVAILABLE ON PACKAGES WITH PIN
COUNTS GREATER THAN 5.
BLOCK DIAGRA
W
LT1074/LT1076
5
sn1074 1074fds
A switch cycle in the LT1074 is initiated by the oscillator
setting the R/S latch. The pulse that sets the latch also
locks out the switch via gate G1. The effective width of this
pulse is approximately 700ns, which sets the maximum
switch duty cycle to approximately 93% at 100kHz switch-
ing frequency. The switch is turned off by comparator C1,
which resets the latch. C1 has a sawtooth waveform as one
input and the output of an analog multiplier as the other
input. The multiplier output is the product of an internal
reference voltage, and the output of the error amplifier, A1,
divided by the regulator input voltage. In standard buck
regulators, this means that the output voltage of A1
required to keep a constant regulated output is indepen-
dent of regulator input voltage. This greatly improves line
transient response, and makes loop gain independent of
input voltage. The error amplifier is a transconductance
type with a G
M
at null of approximately 5000µmho. Slew
current going positive is 140µA, while negative slew
current is about 1.1mA. This asymmetry helps prevent
overshoot on start-up. Overall loop frequency compensa-
tion is accomplished with a series RC network from V
C
to
ground.
Switch current is continuously monitored by C2, which
resets the R/S latch to turn the switch off if an overcurrent
condition occurs. The time required for detection and
switch turn off is approximately 600ns. So minimum
switch “on” time in current limit is 600ns. Under dead
shorted output conditions, switch duty cycle may have to
be as low as 2% to maintain control of output current. This
would require switch on time of 200ns at 100kHz switch-
ing frequency, so frequency is reduced at very low output
voltages by feeding the FB signal into the oscillator and
creating a linear frequency downshift when the FB signal
drops below 1.3V. Current trip level is set by the voltage on
the I
LIM
pin which is driven by an internal 320µA current
source. When this pin is left open, it self-clamps at about
4.5V and sets current limit at 6.5A for the LT1074 and 2.6A
for the LT1076. In the 7-pin package an external resistor
can be connected from the I
LIM
pin to ground to set a lower
current limit. A capacitor in parallel with this resistor will
soft-start the current limit. A slight offset in C2 guarantees
that when the I
LIM
pin is pulled to within 200mV of ground,
C2 output will stay high and force switch duty cycle to zero.
The “Shutdown” pin is used to force switch duty cycle to
zero by pulling the I
LIM
pin low, or to completely shut down
the regulator. Threshold for the former is approximately
2.35V, and for complete shutdown, approximately 0.3V.
Total supply current in shutdown is about 150µA. A 10µA
pull-up current forces the shutdown pin high when left
open. A capacitor can be used to generate delayed start-
up. A resistor divider will program “undervoltage lockout”
if the divider voltage is set at 2.35V when the input is at the
desired trip point.
The switch used in the LT1074 is a Darlington NPN (single
NPN for LT1076) driven by a saturated PNP. Special
patented circuitry is used to drive the PNP on and off very
quickly even from the saturation state. This particular
switch arrangement has no “isolation tubs” connected to
the switch output, which can therefore swing to 40V below
ground.
BLOCK DIAGRA
W
DESCRIPTIO
U
LT1074/LT1076
6
sn1074 1074fds
Supply Current
Shutdown Pin Characteristics
VC Pin Characteristics VC Pin Characteristics Feedback Pin Characteristics
Shutdown Pin Characteristics ILIM Pin Characteristics
TYPICAL PERFOR A CE CHARACTERISTICS
UW
0
–150
CURRENT (mA)
0
50
100
150
200
1234
LT1074•TPC01
–200
–100
56789
VOLTAGE (V)
–50
V ≤ 2V
FB
SLOPE ≈ 400kΩ
V ADJUSTED FOR
I = 0 AT V = 2V
FB
CC
0
–1.5
CURRENT (mA)
–0.5
0
0.5
1.0
1.5
2.0
1234
LT1074•TPC02
–2.0
–1.0
56789
V ≥ 2.5V
FB
VOLTAGE (V)
0
–400
CURRENT (µA)
–200
0
1234
LT1074•TPC03
–500
–300
5678 109
–100
100
200
300
400
500
VOLTAGE (V)
START OF
FREQUENCY SHIFTING
VOLTAGE (V)
10
–40
CURRENT (µA)
20 40
LT1074•TPC04
30 50 60 70 80
–30
–20
–10
0
10
20
30
40
V
IN
= 50V
THIS POINT MOVES
IN
WITH V
DETAILS OF THIS
AREA SHOWN IN
OTHER GRAPH
0
VOLTAGE (V)
0
–40
CURRENT (µA)
1.0 2.0
LT1074•PC05
1.5 2.5 3.0 3.5 4.0
–35
–30
–25
–20
–15
–10
–5
0
SHUTDOWN
THRESHOLD
CURRENT FLOWS OUT
OF SHUTDOWN PIN
= 25°CT
j
0.5
–2
–350
CURRENT (µA)
–250
–150
012
LT1074•TPC06
–400
–300
345
–200
–100
–50
0
50
100
VOLTAGE (V)
–1 678
T = 25°C
j
INPUT VOLTAGE (V)
0
0
INPUT CURRENT (mA)
4
6
10
20 30 60
LT1074•TPC11
10 40 50
2
8
12
14
16
18
20
V
C = 1V
DEVICE NOT SWITCHING
LT1074/LT1076
7
sn1074 1074fds
Reference Shift with Ripple
Voltage
Feedback Pin Frequency Shift
Supply Current (Shutdown)
Reference Voltage vs
Temperature Switch “On” Voltage
Error Amplifier Phase and GM
Switching Frequency vs
Temperature
Current Limit vs Temperature*
TYPICAL PERFOR A CE CHARACTERISTICS
UW
INPUT VOLTAGE (V)
0
0
INPUT CURRENT (µA)
50
100
150
200
250
300
30 50 60
LT1074•TPC13
10 20 40
JUNCTION TEMPERATURE (°C)
–50
2.19
VOLTAGE (V)
2.20
2.21
2.22
2.23
2.24
2.25
–25 0 25 50
LT1074•TPC14
2.18
2.17
75 100 125 150
0
“ON” VOLTAGE (V)
3.0
2.5
2.0
1.5
1.0
0.5 123
LT1074•TPC28
456
SWITCH CURRENT (A)
T = 25°C
j
LT1074
LT1076
SQUARE
WAVE
PEAK-TO-PEAK RIPPLE AT FB PIN (mV)
0
–80
CHANGE IN REFERENCE VOLTAGE (mV)
–70
–60
–50
–40
–30
20
20 40 60 80
LT1074•TPC16
100 120 140 160 180 200
–20
–10
0
10
TRI WAVE
FREQUENCY (Hz)
(µmho)
8k
1k 100k 1M 10M
0
10k
TRANSCONDUCTANCE
1k
2k
3k
4k
5k
6k
7k
200
150
100
50
0
–50
PHASE (°)
θ
M
G
–100
–150
–200
LT1074•TPC17
JUNCTION TEMPERATURE (°C)
–50
80
FREQUENCY (kHz)
95
100
105
110
115
120
–25 0 25 50
LT1074•TPC18
90
85
75 100 125 150
FEEDBACK PIN VOLTAGE (V)
0
0
SWITCHING FREQUENCY (kHz)
1.0 1.5 3.0
LT1074•TPC19
0.5 2.0 2.5
20
160
40
60
80
100
120
140
–55°C
25°C
150°C
JUNCTION TEMPERATURE (°C)
1
2
3
4
5
6
7
LT1074•TPC22
8
0
–50 –25 0 25 50 75 100 125 150
OUTPUT CURRENT LIMIT (A)
*MULTIPLY CURRENTS BY 0.4 FOR LT1076
I PIN OPEN
LIM
R = 10kΩ
LIM
R = 5kΩ
LIM
LT1074/LT1076
8
sn1074 1074fds
Figure 1. Input Capacitor Ripple Figure 2. Proper Ground Pin Connection
V
IN
PIN
The V
IN
pin is both the supply voltage for internal control
circuitry and one end of the high current switch. It is
important,
especially at low input voltages
, that this pin be
bypassed with a low ESR, and low inductance capacitor to
prevent transient steps or spikes from causing erratic
operation. At full switch current of 5A, the switching
transients at the regulator input can get very large as
shown in Figure 1. Place the input capacitor very close to
the regulator and connect it with wide traces to avoid extra
inductance. Use radial lead capacitors.
FEEDBACK PIN
The feedback pin is the inverting input of an error amplifier
which controls the regulator output by adjusting duty
cycle. The noninverting input is internally connected to a
trimmed 2.21V reference. Input bias current is typically
0.5µA when the error amplifier is balanced (I
OUT
= 0). The
error amplifier has asymmetrical G
M
for large input sig-
nals to reduce startup overshoot. This makes the amplifier
more sensitive to large ripple voltages at the feedback pin.
100mVp-p ripple at the feedback pin will create a 14mV
offset in the amplifier, equivalent to a 0.7% output voltage
shift. To avoid output errors, output ripple (P-P) should be
less than 4% of DC output voltage at the point where the
output divider is connected.
See the “Error Amplifier” section for more details.
Frequency Shifting at the Feedback Pin
The error amplifier feedback pin (FB) is used to downshift
the oscillator frequency when the regulator output voltage
is low. This is done to guarantee that output short-circuit
DESCRIPTIO S
U
PI
U
L
P
= Total inductance in input bypass connections
and capacitor.
“Spike” height (dI/dt • L
P
) is approximately 2V per
inch of lead length for LT1074 and 0.8V per inch for
LT1076.
“Step” for ESR = 0.05Ω and I
SW
= 5A is 0.25V.
“Ramp” for C = 200µF, T
ON
= 5µs, and I
SW
= 5A,
is 0.12V.
Input current on the V
IN
Pin in shutdown mode is the sum
of actual supply current (≈140µA, with a maximum of
300µA), and switch leakage current. Consult factory for
special testing if shutdown mode input current is critical.
GROUND PIN
It might seem unusual to describe a ground pin, but in the
case of regulators, the ground pin must be connected
properly to ensure good load regulation. The internal
reference voltage is referenced to the ground pin; so any
error in ground pin voltage will be multiplied at the output;
LT1074•PD01
()
ISW
()
ESR
STEP =
()
ISW
()
TON
RAMP =
()
()
LP
dl
dt
C
FB
GND
LT1074
LT1074•PD02
R2
HIGH CURRENT
RETURN PATH
NEGATIVE OUTPUT NODE
WHERE LOAD REGULATION
WILL BE MEASURED
∆∆
VVV
OUT
GND OUT
=
()()
221.
To ensure good load regulation, the ground pin must be
connected directly to the proper output node, so that no
high currents flow in this path. The output divider resistor
should also be connected to this low current connection
line as shown in Figure 2.
LT1074/LT1076
9
sn1074 1074fds
Figure 3. Frequency Shifting
Figure 4. Shutdown Pin Characteristics
current is well controlled even when switch duty cycle
must be extremely low. Theoretical switch “on” time for a
buck converter in continuous mode is:
tVV
Vf
ON OUT D
IN
=+
•
V
D
= Catch diode forward voltage ( ≈ 0.5V)
f = Switching frequency
At f = 100kHz, t
ON
must drop to 0.2µs when V
IN
= 25V
and the output is shorted (V
OUT
= 0V). In current limit,
the LT1074 can reduce t
ON
to a minimum value of
≈0.6µs, much too long to control current correctly for
V
OUT
= 0. To correct this problem, switching frequency
is lowered from 100kHz to 20kHz as the FB pin drops
from 1.3V to 0.5V. This is accomplished by the circuitry
shown in Figure 3.
Q1 is off when the output is regulating (V
FB
= 2.21V). As
the output is pulled down by an overload, V
FB
will eventu-
ally reach 1.3V, turning on Q1. As the output continues to
drop, Q1 current increases proportionately and lowers the
frequency of the oscillator. Frequency shifting starts when
the output is ≈ 60% of normal value, and is down to its
minimum value of ≅ 20kHz when the output is ≅ 20% of
normal value. The rate at which frequency is shifted is
determined by both the internal 3k resistor R3 and the
external divider resistors. For this reason, R2 should not
be increased to more than 4kΩ, if the LT1074 will be
subjected to the simultaneous conditions of high input
voltage and output short-circuit.
DESCRIPTIO S
U
PI
U
SHUTDOWN PIN
The shutdown pin is used for undervoltage lockout, micro-
power shutdown, soft-start, delayed start, or as a general
purpose on/off control of the regulator output. It controls
switching action by pulling the I
LIM
pin low, which forces
the switch to a continuous “off” state. Full micropower
shutdown is initiated when the shutdown pin drops below
0.3V.
The V/I characteristics of the shutdown pin are shown in
Figure 4. For voltages between 2.5V and ≈V
IN
, a current of
10µA flows
out
of the shutdown pin. This current in-
creases to ≈25µA as the shutdown pin moves through the
2.35V threshold. The current increases further to ≈30µA at
the 0.3V threshold, then drops to ≈15µA as the shutdown
voltage fall below 0.3V. The 10µA current source is in-
cluded to pull the shutdown pin to its high or default state
when left open. It also provides a convenient pull-up for
delayed start applications with a capacitor on the shut-
down pin.
When activated, the typical collector current of Q1 in
Figure 5, is ≈2mA. A soft-start capacitor on the I
LIM
pin will
delay regulator shutdown in response to C1, by
≈(5V)(C
LIM
)/2mA. Soft-start after full micropower shut-
down is ensured by coupling C2 to Q1.
+
–
2.21V
+2V
ERROR
AMPLIFIER
VC
FB R2
2.21k
R1
VOUT
EXTERNAL
DIVIDER
R3
3k
Q1
TO
OSCILLATOR
LT1074•PD03
VOLTAGE (V)
0
–40
CURRENT (µA)
1.0 2.0
LT1074•PC05
1.5 2.5 3.0 3.5 4.0
–35
–30
–25
–20
–15
–10
–5
0
SHUTDOWN
THRESHOLD
CURRENT FLOWS OUT
OF SHUTDOWN PIN
= 25°CTj
0.5
LT1074/LT1076
10
sn1074 1074fds
Figure 5. Shutdown Circuitry
Figure 6. Undervoltage Lockout
Figure 7. Adding Hysteresis
DESCRIPTIO S
U
PI
U
Undervoltage Lockout
Undervoltage lockout point is set by R1 and R2 in Figure 6.
To avoid errors due to the 10µA shutdown pin current, R2
is usually set at 5k, and R1 is found from:
RR
VV
V
TP SH
SH
12=−
()
V
TP
= Desired undervoltage lockout voltage
V
SH
= Threshold for lockout on the
shutdown pin = 2.45V
If quiescent supply current is critical, R2 may be increased
up to 15kΩ, but the denominator in the formula for R2
should replace V
SH
with V
SH
– (10µA)(R2).
–
+
C1
10 Aµ300 Aµ
–
+
SHUTDOWN
PIN
C2
VIN
I
PIN
6V
Q1
TO TOTAL
REGULATOR
SHUTDOWN
2.3V
0.3V
LT1074•PD07
LIM
EXTERNAL
CLIM
Hysteresis in undervoltage lockout may be accomplished
by connecting a resistor (R3) from the I
LIM
pin to the
shutdown pin as shown in Figure 7. D1 prevents the
shutdown divider from altering current limit.
LT1074•PD08
R1
R2
5k
V
SHUT
GND
IN
LT1074
LT1074•PD09
R1
R2
R3
V
SHUT
I
LIM
IN
LT1074
OPTIONAL CURRENT
LIMIT RESISTOR
D1*
*1N4148
Trip Po V V R
R
TP
int .== +
⎛
⎝
⎜⎞
⎠
⎟
235 1 1
2
If R3 is added, the lower trip point (V
IN
descending) will be
the same. The upper trip point (V
UTP
) will be:
VV
R
R
R
RVR
R
UTP SH
=+
⎛
⎝
⎜⎞
⎠
⎟−⎛
⎝
⎜⎞
⎠
⎟
11
2
1
308 1
3
.
If R1 and R2 are chosen, R3 is given by:
RVVR
VV R
R
SH
UTP SH
308 1
11
2
=−
()()
−+
⎛
⎝
⎜⎞
⎠
⎟
.
Example: An undervoltage lockout is required such that
the output will not start until V
IN
= 20V, but will continue
to operate until V
IN
drops to 15V. Let R2 = 2.32k.
Rk
VV
Vk
Rk
123415 2 35
235 12 5
3235 08 125
20 2 35 1 12 5
232
39
=
()
−
()
=
=−
()()
−+
⎛
⎝
⎜⎞
⎠
⎟
=
..
..
...
..
.
.
LT1074/LT1076
11
sn1074 1074fds
Figure 8. ILIM Pin Circuit
Figure 9. Foldback Current Limit
DESCRIPTIO S
U
PI
U
I
LIM
PIN
The I
LIM
pin is used to reduce current limit below the
preset value of 6.5A. The equivalent circuit for this pin is
shown in Figure 8.
Q1
R1
8K
TO LIMIT
CIRCUIT VIN
320 Aµ
D1
D3
6V
I
LIM
4.3V
D2
LT1047•PD12
When I
LIM
is left open, the voltage at Q1 base clamps at 5V
through D2. Internal current limit is determined by the
current through Q1. If an external resistor is connected
between I
LIM
and ground, the voltage at Q1 base can be
reduced for lower current limit. The resistor will have a
voltage across it equal to (320µA)(R), limited to ≈5V when
clamped by D2. Resistance required for a given current
limit is:
R
LIM
= I
LIM
(2kΩ) + 1kΩ (LT1074)
R
LIM
= I
LIM
(5.5kΩ) + 1kΩ (LT1076)
As an example, a 3A current limit would require
3A(2k) + 1k = 7kΩ for the LT1074. The accuracy of these
formulas is ±25% for 2A ≤ I
LIM
≤ 5A (LT1074) and
7A ≤ I
LIM
≤ 1.8A (LT1076), so I
LIM
should be set at least
25% above the
peak
switch current required.
Foldback current limiting can be easily implemented by
adding a resistor from the output to the I
LIM
pin as shown
in Figure 9. This allows full desired current limit (with or
without R
LIM
) when the output is regulating, but reduces
current limit under short-circuit conditions. A typical value
for R
FB
is 5kΩ, but this may be adjusted up or down to set
the amount of foldback. D2 prevents the output voltage
from forcing current back into the I
LIM
pin. To calculate a
value for R
FB
, first calculate R
LIM
, the R
FB
:
RIR
Rk I
Rink
FB
SC L
LSC
L
=−
()()
−Ω
()
−Ω
()
044
05 1
.*
.*
*Change 0.44 to 0.16, and 0.5 to 0.18 for LT1076.
Example: I
LIM
= 4A, ISC = 1.5A, R
LIM
= (4)(2k) + 1k = 9k
Rk
kk k
FB
=−
()
Ω
()
−
()
−Ω
()
15 044 9
059 1 15 38
..
..
.
Error Amplifier
The error amplifier in Figure 10 is a single stage design
with added inverters to allow the output to swing above
and below the common mode input voltage. One side of
the amplifier is tied to a trimmed internal reference voltage
of 2.21V. The other input is brought out as the FB (feed-
back) pin. This amplifier has a G
M
(voltage “in” to current
“out”) transfer function of ≈5000µmho. Voltage gain is
determined by multiplying G
M
times the total equivalent
output loading, consisting of the output resistance of Q4
and Q6 in parallel with the series RC external frequency
compensation network. At DC, the external RC is ignored,
and with a parallel output impedance for Q4 and Q6 of
400kΩ, voltage gain is ≈2000. At frequencies above a few
hertz, voltage gain is determined by the external compen-
sation, R
C
and C
C
.
VOUT
I
LIM
FB
RLIM
RFB D2
1N4148
LT1074•PD13
LT1074
LT1074/LT1076
12
sn1074 1074fds
Figure 10. Error Amplifier
DESCRIPTIO S
U
PI
U
AG
fCat mid frequencies
A G R at high frequencies
Vm
C
VmC
=••
=•
2π
Phase shift from the FB pin to the V
C
pin is 90° at mid
frequencies where the external C
C
is controlling gain, then
drops back to 0° (actually 180° since FB is an inverting
input) when the reactance of C
C
is small compared to R
C
.
The low frequency “pole” where the reactance of C
C
is
equal to the output impedance of Q4 and Q6 (r
O
), is:
frC
rk
POLE
O
O
=•• ≈Ω
1
2400
π
Although f
POLE
varies as much as 3:1 due to r
O
variations,
mid-frequency gain is dependent only on G
m
, which is
specified much tighter on the data sheet. The higher
frequency “zero” is determined solely by R
C
and C
C
.
fRC
ZERO
CC
=••
1
2π
The error amplifier has asymmetrical peak output current.
Q3 and Q4 current mirrors are unity-gain, but the Q6
mirror has a gain of 1.8 at output null and a gain of 8 when
the FB pin is high (Q1 current = 0). This results in a
maximum positive output current of 140µA and a maxi-
mum negative (sink) output current of ≅1.1mA. The asym-
metry is deliberate—it results in much less regulator
output overshoot during rapid start-up or following the
release of an output overload. Amplifier offset is kept low
by area scaling Q1 and Q2 at 1.8:1.
Amplifier swing is limited by the internal 5.8V supply for
positive outputs and by D1 and D2 when the output goes
low. Low clamp voltage is approximately one diode drop
(≈0.7V – 2mV/°C).
Note that both the FB pin and the V
C
pin have other internal
connections. Refer to the frequency shifting and synchro-
nizing discussions.
140 Aµ
Q1
LT1074 • PD11
Q2 FB
V
50 Aµ
90 A
µ
Q6
300
C
Q4
5.8V
CC
RC
Q3
50 Aµ
2.21V
EXTERNAL
FREQUENCY
COMPENSATION
90 Aµ
D1
90 Aµ
Ω
D2
X1.8
ALL CURRENTS SHOWN ARE AT NULL CONDITION
LT1074/LT1076
13
sn1074 1074fds
Tapped-Inductor Buck Converter
Positive-to-Negative Converter with 5V Output
TYPICAL APPLICATIO S
U
+
+
V
SW
V
IN
V
C
GND FB
LT1074HV R1
2.8k
R2
2.21k
D2
35V
5W
C3
200
µ
F
50V
R3
1k
C2
0.2
µ
F
L1*
LT1074 •TA02
D1**
D3
1N5819
31
C1
4400
µ
F
(2 EA
2200
µ
F,
16V)
L2
5
µ
H
C4
390
µ
F
16V
0.01
µ
F
+
PULSE ENGINEERING #PE±65282*
**
†MOTOROLA MBR2030CTL
IF INPUT VOLTAGE IS BELOW 20V,
MAXIMUM OUTPUT CURRENT WILL BE REDUCED. SEE AN44
V
IN
20V† TO 35V
V
OUT
5V, 10A†
R3*
2.74k
VIN VSW
V
GND
R4
1.82k*
C2
1000µF
10V
L1
25µH
5A††
+
+
D1†
MBR745
R1**
5.1k
VC
C3
0.1µF
C4**
0.01µF
+
R2**
10k
C1
220µF
50V
* = 1% FILM RESISTORS
D1 = MOTOROLA-MBR745
C1 = NICHICON-UPL1C221MRH6
C2 = NICHICON-UPL1A102MRH6
L1 = COILTRONICS-CTX25-5-52
V
4.5V to
40V
IN
–5V,1A***
+
200µF
10V
–
OPTIONAL FILTER
5µH
LOWER REVERSE VOLTAGE RATING MAY BE USED FOR LOWER INPUT VOLTAGES.
LOWER CURRENT RATING IS ALLOWED FOR LOWER OUTPUT CURRENT. SEE AN44.
R1, R2, AND C4 ARE USED FOR LOOP FREQUENCY COMPENSATION WITH LOW INPUT VOLTAGE,
BUT R1 AND R2 MUST BE INCLUDED IN THE CALCULATION FOR OUTPUT VOLTAGE DIVIDER VALUES.
LOWER CURRENT RATING MAY BE USED FOR LOWER OUTPUT CURRENT. SEE AN44.
R3 = –2.37 (KΩ)
R1 = (R3) (1.86)
R2 = (R3) (3.65)
VOUT
MAXIMUM OUTPUT CURRENT OF 1A IS DETERMINED BY MINIMUM INPUT
VOLTAGE OF 4.5V. HIGHER MINIMUM INPUT VOLTAGE WILL ALLOW MUCH HIGHER
OUTPUT CURRENTS. SEE AN44.
LT1074 • TA03
LT1074
FB
FOR HIGHER OUTPUT VOLTAGES, INCREASE R1, R2, AND R3 PROPORTIONATELY.
FOR INPUT VOLTAGE > 10V, R1, R2, AND C4 CAN BE ELIMINATED, AND COMPENSATION IS
DONE TOTALLY ON THE V PIN.
C
†
††
**
**
LT1074/LT1076
14
sn1074 1074fds
Q Package
5-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1461)
K Package
4-Lead TO-3 Metal Can
(Reference LTC DWG # 05-08-1311)
PACKAGE DESCRIPTIO
U
K4(TO-3) 1098
72°
18°
0.490 – 0.510
(12.45 – 12.95)
R
0.470 TP
P.C.D.
0.167 – 0.177
(4.24 – 4.49)
R
0.151 – 0.161
(3.84 – 4.09)
DIA 2 PLC
0.655 – 0.675
(16.64 – 19.05)
1.177 – 1.197
(29.90 – 30.40)
0.038 – 0.043
(0.965 – 1.09)
0.060 – 0.135
(1.524 – 3.429)
0.320 – 0.350
(8.13 – 8.89)
0.420 – 0.480
(10.67 – 12.19)
0.760 – 0.775
(19.30 – 19.69)
Q(DD5) 1098
0.028 – 0.038
(0.711 – 0.965)
0.143 +0.012
–0.020
()
3.632 +0.305
–0.508
0.067
(1.70)
BSC
0.013 – 0.023
(0.330 – 0.584)
0.095 – 0.115
(2.413 – 2.921)
0.004 +0.008
–0.004
()
0.102 +0.203
–0.102
0.050 ± 0.012
(1.270 ± 0.305)
0.059
(1.499)
TYP
0.045 – 0.055
(1.143 – 1.397)
0.165 – 0.180
(4.191 – 4.572)
0.330 – 0.370
(8.382 – 9.398)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
15° TYP
0.300
(7.620)
0.075
(1.905)
0.183
(4.648)
0.060
(1.524)
0.060
(1.524)
0.256
(6.502)
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
OBSOLETE PACKAGE
LT1074/LT1076
15
sn1074 1074fds
T Package
5-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1421)
R Package
7-Lead Plastic DD Pak
(Reference LTC DWG # 05-08-1462)
PACKAGE DESCRIPTIO
U
R (DD7) 1098
0.026 – 0.036
(0.660 – 0.914)
0.143 +0.012
–0.020
()
3.632 +0.305
–0.508
0.050
(1.27)
BSC
0.013 – 0.023
(0.330 – 0.584)
0.095 – 0.115
(2.413 – 2.921)
0.004 +0.008
–0.004
()
0.102 +0.203
–0.102
0.050 ± 0.012
(1.270 ± 0.305)
0.059
(1.499)
TYP
0.045 – 0.055
(1.143 – 1.397)
0.165 – 0.180
(4.191 – 4.572)
0.330 – 0.370
(8.382 – 9.398)
0.060
(1.524)
TYP
0.390 – 0.415
(9.906 – 10.541)
15° TYP
0.300
(7.620)
0.075
(1.905)
0.183
(4.648)
0.060
(1.524)
0.060
(1.524)
0.256
(6.502)
BOTTOM VIEW OF DD PAK
HATCHED AREA IS SOLDER PLATED
COPPER HEAT SINK
T5 (TO-220) 0399
0.028 – 0.038
(0.711 – 0.965)
0.067
(1.70) 0.135 – 0.165
(3.429 – 4.191)
0.700 – 0.728
(17.78 – 18.491)
0.045 – 0.055
(1.143 – 1.397)
0.095 – 0.115
(2.413 – 2.921)
0.013 – 0.023
(0.330 – 0.584)
0.620
(15.75)
TYP
0.155 – 0.195*
(3.937 – 4.953)
0.152 – 0.202
(3.861 – 5.131)
0.260 – 0.320
(6.60 – 8.13)
0.165 – 0.180
(4.191 – 4.572)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.390 – 0.415
(9.906 – 10.541)
0.330 – 0.370
(8.382 – 9.398)
0.460 – 0.500
(11.684 – 12.700)
0.570 – 0.620
(14.478 – 15.748)
0.230 – 0.270
(5.842 – 6.858)
BSC
SEATING PLANE
* MEASURED AT THE SEATING PLANE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
LT1074/LT1076
16
sn1074 1074fds
T7 Package
7-Lead Plastic TO-220 (Standard)
(Reference LTC DWG # 05-08-1422)
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 1994
LT/CPI 0202 1.5K REV D • PRINTED IN USA
RELATED PARTS
PACKAGE DESCRIPTIO
U
TYPICAL APPLICATIO
U
PART NUMBER DESCRIPTION COMMENTS
LT1375/LT1376 1.5A, 500kHz Step-Down Switching Regulators V
IN
Up to 25V, I
OUT
Up to 1.25A, SO-8
LT1374/LT1374HV 4.5A, 500kHz Step-Down Switching Regulators V
IN
Up to 25V (32V for HV), I
OUT
Up to 4.25A, SO-8/DD
LT1370 6A, 500kHz High Efficiency Switching Regulator 6A/42V Internal Switch, 7-Lead DD/TO-220
LT1676 Wide Input Range, High Efficiency Step-Down Regulator V
IN
from 7.4V to 60V, I
OUT
Up to 0.5A, SO-8
LT1339 High Power Synchronous DC/DC Controller V
IN
Up to 60V, I
OUT
Up to 50A, Current Mode
LT1765 3A, 1.25MHz, Step-Down Regulator V
IN
= 3V to 25V, V
µF
=1.2V, TSSOP-16E, SO8 Package
Negative Boost Converter
0.050
(1.27)
0.026 – 0.036
(0.660 – 0.914)
T7 (TO-220) 0399
0.135 – 0.165
(3.429 – 4.191)
0.700 – 0.728
(17.780 – 18.491)
0.045 – 0.055
(1.143 – 1.397)
0.165 – 0.180
(4.191 – 4.572)
0.095 – 0.115
(2.413 – 2.921)
0.013 – 0.023
(0.330 – 0.584)
0.620
(15.75)
TYP
0.155 – 0.195*
(3.937 – 4.953)
0.152 – 0.202
(3.860 – 5.130)
0.260 – 0.320
(6.604 – 8.128)
0.147 – 0.155
(3.734 – 3.937)
DIA
0.390 – 0.415
(9.906 – 10.541)
0.330 – 0.370
(8.382 – 9.398)
0.460 – 0.500
(11.684 – 12.700)
0.570 – 0.620
(14.478 – 15.748)
0.230 – 0.270
(5.842 – 6.858)
BSC
SEATING PLANE
*MEASURED AT THE SEATING PLANE
R1
12.7k
V
IN
V
FB
V
GND
R2
2.21k
C1
1000
µ
F
25V
L1
25
µ
H
+
C3
200µF
15V
+
D1*
R3
750Ω
V
C
0.01µF
100pF
C2
1nF
V
OUT
–15V**
V
IN
–5V TO –15V
MBR735
I
OUT
(MAX) = 1A TO 3A DEPENDING
ON INPUT VOLTAGE. SEE AN44
LT1074 • TA04
LT1074
SW
*
**
100µF
OPTIONAL OUTPUT FILTER
5
µ
H
+
