LM6162
LM6162 High Speed Operational Amplifier
Literature Number: SNOS601A
LM6162
OBSOLETE
October 24, 2011
High Speed Operational Amplifier
General Description
The LM6162 family of high-speed amplifiers exhibits an ex-
cellent speed-power product, delivering 300 V/μs and
100 MHz gain-bandwidth product (stable for gains as low as
+2 or −1) with only 5 mA of supply current. Further power
savings and application convenience are possible by taking
advantage of the wide dynamic range in operating supply
voltage which extends all the way down to +5V.
These amplifiers are built with National's VIP® (Vertically In-
tegrated PNP) process which provides fast transistors that
are true complements to the already fast NPN devices. This
advanced junction-isolated process delivers high speed per-
formance without the need for complex and expensive di-
electric isolation.
Features
■High slew rate: 300 V/μs
■High gain-bandwidth product: 100 MHz
■Low supply current: 5 mA
■Fast settling time: 120 ns to 0.1%
■Low differential gain: <0.1%
■Low differential phase: <0.1°
■Wide supply range: 4.75V to 32V
■Stable with unlimited capacitive load
■Well behaved; easy to apply
Applications
■Video amplifier
■Wide-bandwidth signal conditioning for image processing
(FAX, scanners, laser printers)
■Hard disk drive preamplifier
■Error amplifier for high-speed switching regulator
Connection Diagrams
10-Pin Ceramic Flatpak
1106115
Top View
See NS Package Number W10A
1106102
See NS Package Number N08E or J08A
Ordering Information
Temperature Range
Package NSC
Drawing
Military Industrial Commercial
−55°C ≤ TA ≤ +125°C −25°C ≤ TA ≤ +85°C 0°C ≤ TA ≤ +70°C
LM6162N 8-Pin Molded DIP N08E
LM6162J/883 8-Pin Ceramic DIP J08A
5962-9216501PA
LM6162WG/883 10-Lead Ceramic SOIC WG10A
5962-9216501XA
LM6162W/883 10-Pin Ceramic Flatpak W10A
5962-9216501HA
VIP® is a registered trademark of National Semiconductor Corporation.
© 2011 National Semiconductor Corporation 11061 www.national.com
11061 Version 4 Revision 4 Print Date/Time: 2011/10/24 14:05:16
LM6162 High Speed Operational Amplifier
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V+–V−)36V
Differential Input Voltage (Note 2) ±8V
Common-Mode Input Voltage (V+−0.7V) to
(Note 3)(V− + 0.7V)
Output Short Circuit to GND
(Note 4) Continuous
Soldering Information
Dual-In-Line Package (N)
Soldering (10 seconds) 260°C
Small Outline Package (M)
Vapor Phase (60 seconds)
Infrared (15 seconds)
215°C
220°C
See AN-450 “Surface Mounting Methods and Their Effect
on Product Reliability” for other methods of soldering
surface mount devices.
Storage Temperature Range −65°C ≤ TJ ≤ +150°C
Max Junction Temperature 150°C
ESD Tolerance (Note 5) ±1100V
Operating Ratings
Temperature Range (Note 6)
LM6162 −55°C ≤ TJ ≤ +125°C
Supply Voltage Range 4.75V to 32V
DC Electrical Characteristics
These limits apply for supply voltage = ±15V, VCM = 0V, and RL ≥ 100 kΩ, unless otherwise specified. Limits in standard typeface
are for TA = TJ = 25°C; limits in boldface type apply over the Operating Temperature Range.
Typical
(Note 7)
LM6162
Symbol Parameter Conditions Limit Units
(Note 8)
VOS Input Offset Voltage ±3 ±5 mV
±8 max
Input Offset Voltage 7 μV/°C
Average Drift
Ibias Input Bias Current 2.2 3 μA
6max
IOS Input Offset Current ±150 ±350 nA
±800 max
Input Offset Current 0.3 nA/°C
Average Drift
RIN Input Resistance Differential 180 kΩ
CIN Input Capacitance 2.0 pF
AVOL Large Signal VOUT = ±10V, RL = 2 kΩ1400 1000 V/V
Voltage Gain (Note 9) 500 min
RL = 10 kΩ6500 V/V
VCM Input Common-Mode Supply = ±15V +14.0 +13.9 V
Voltage Range +13.8 min
−13.2 −12.9 V
−12.7 max
Supply = +5V 4.0 3.9 V
(Note 10) 3.8 min
1.6 1.8 V
2.0 max
CMRR Common-Mode −10V ≤ VCM ≤ +10V 100 83 dB
Rejection Ratio 79 min
PSRR Power Supply ±10V ≤ VS ≤ ±16V 93 83 dB
Rejection Ratio 79 min
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LM6162
Typical
(Note 7)
LM6162
Symbol Parameter Conditions Limit Units
(Note 8)
VOOutput Voltage Supply = ±15V, RL = 2 kΩ+14.2 +13.5 V
Swing +13.3 min
−13.4 −13.0 V
−12.7 max
VOOutput Voltage Swing Supply = +5V and 4.2 3.5 V
RL = 2 kΩ (Note 10) 3.3 min
1.3 1.7 V
2.0 max
IOSC Output Short Sourcing 65 30 mA
Circuit Current 20 min
Sinking 65 30 mA
20 min
ISSupply Current 5.0 6.5 mA
6.8 max
AC Electrical Characteristics
These limits apply for supply voltage = ±15V, VCM = 0V, RL ≥ 100 kΩ, and CL ≤ 5 pF, unless otherwise specified. Limits in standard
typeface are for TA = TJ = 25°C; limits in boldface type apply over the Operating Temperature Range.
Typical
(Note 7)
LM6162
Symbol Parameter Conditions Limit Units
(Note 8)
GBW Gain-Bandwidth Product f = 20 MHz 100 80 MHz
55 min
Supply = ±5V 70 MHz
SR Slew Rate AV = +2 (Note 11) 300 200 V/μs
180 min
Supply = ±5V 200 V/μs
PBW Power Bandwidth VOUT = 20 VPP 4.5 MHz
tsSettling Time 10V step, to 0.1% 100 ns
AV = −1, RL = 2 kΩ
φmPhase Margin AV = +2 45 deg
Differential Gain NTSC, AV = +2 <0.1 %
Differential Phase NTSC, AV = +2 <0.1 deg
enInput Noise Voltage f = 10 kHz 10 nV/√Hz
inInput Noise Current f = 10 kHz 1.2 pA/√Hz
Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when operating the
device beyond its rated operating conditions.
Note 2: The ESD protection circuitry between the inputs will begin to conduct when the differential input voltage reaches 8V.
Note 3: a) In addition, the voltage between the V+ pin and either input pin must not exceed 36V.
b) When the voltage applied to an input pin is driven more than 3V below the negative supply pin voltage, a substrate diode begins to conduct. Current through
this pin must then be kept less than 20 mA to limit damage from self-heating.
Note 4: Although the output current is internally limited, continuous short-circuit operation at elevated ambient temperature can result in exceeding the maximum
allowed junction temperature of 150°C.
Note 5: This value is the average voltage that the weakest pin combinations can withstand and still conform to the datasheet limits. The test circuit used consists
of the human body model, 100 pF in series with 1500Ω.
Note 6: The typical thermal resistance, junction-to-ambient, of the molded plastic DIP (N package) is 105°C/W. For the molded plastic SO (M package), use 155°
C/W. All numbers apply for packages soldered directly into a printed circuit board.
Note 7: Typical values are for TJ = 25°C, and represent the most likely parametric norm.
Note 8: Limits are guaranteed, by testing or correlation.
Note 9: Voltage Gain is the total output swing (20V) divided by the magnitude of the input signal required to produce that swing.
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LM6162
Note 10: For single-supply operation, the following conditions apply: V+= 5V, V− = 0V, VCM = 2.5V, VOUT = 2.5V. Pin 1 and Pin 8 (VOS Adjust pins) are each
connected to pin 4 (V−) to realize maximum output swing. This connection will increase the offset voltage.
Note 11: VIN = 10V step. For ±5V supplies, VIN = 1V step.
Note 12: A military RETS electrical test specification is available on request.
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LM6162
Typical Performance Characteristics RL = 10 kΩ, TA = 25°C unless otherwise noted
Supply Current vs
Supply Voltage
1106116
Common-Mode
Rejection Ratio
1106117
Power Supply
Rejection Ratio
1106118
Gain-Bandwidth Product
vs Supply Voltage
1106119
Gain-Bandwidth Product
vs Load Capacitance
1106120
Propagation Delay,
Rise and Fall Times
1106121
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LM6162
Slew Rate vs
Supply Voltage
1106122
Slew Rate vs
Load Capacitance
1106123
Overshoot vs
Load Capacitance
1106124
Output Impedance
(Open-Loop)
1106125
Voltage Gain vs
Load Resistance
1106126
Voltage Gain vs
Supply Voltage
1106127
Differential Gain (Note)
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LM6162
Differential Gain (Note 13)
1106104
Differential Phase (Note 13)
1106105
Note 13: Differential gain and differential phase measured for four series LM6162 op amps configured with gain of +2 each, in series with a 1:16 attenuator and
an LM6321 buffer. Error added by LM6321 is negligible. Test performed using Tektronix Type 520 NTSC test system.
Step Response; Av = +2
1106106
Input Noise Voltage
1106128
Input Noise Current
1106129
Power Bandwidth
1106130
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LM6162
Open-Loop
Frequency Response
1106108
Open-Loop
High-Frequency Response
1106109
Common-Mode Input
Voltage Limits
1106131
Output Saturation Voltage
1106132
Bias Current vs
Common-Mode Voltage
1106133
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LM6162
Simplified Schematic
1106101
Application Tips
The LM6162 has been decompensated for a wider gain-
bandwidth product than the LM6361. However, the LM6162
still offers stability at gains of 2 (and −1) or greater over the
specified ranges of temperature, power supply voltage, and
load. Since this decompensation involved reducing the emit-
ter-degeneration resistors in the op amp's input stage, the DC
precision has been increased in the form of lower offset volt-
age and higher open-loop gain.
Other op amps in this family include the LM6361, LM6364,
and LM6365. If unity-gain stability is required, the LM6361
should be used. The LM6364 has been decompensated for
operation at gains of 5 or more, with corresponding greater
gain-bandwidth product (125 MHz, typical) and DC precision.
The fully-uncompensated LM6365 offers gain-bandwidth
product of 725 MHz, typical, and is stable for gains of 25 or
more. All parts in this family, regardless of compensation,
have the same high slew rate of 300 V/μs (typ).
The LM6162 is unusually tolerant of capacitive loads. Most
op amps tend to oscillate when their load capacitance is
greater than about 200 pF (in low-gain circuits). However,
load capacitance on the LM6162 effectively increases its
compensation capacitance, thus slowing the op amp's re-
sponse and reducing its bandwidth. The compensation is not
ideal, though, and ringing may occur in low-gain circuits with
large capacitive loads.
Power supply bypassing is not as critical for LM6162 as it is
for other op amps in its speed class. However, bypassing will
improve the stability and transient response of the LM6162,
and is recommended for every design. 0.01 μF to 0.1 μF ce-
ramic capacitors should be used (from each supply “rail” to
ground); if the device is far away from its power supply source,
an additional 2.2 μF to 10 μF of tantalum may be required for
extra noise reduction.
Keep all leads short to reduce stray capacitance and lead in-
ductance, and make sure ground paths are low-impedance,
especially where heavier currents will be flowing. Stray ca-
pacitance in the circuit layout can cause signal coupling from
one pin, input or lead to another, and can cause circuit gain
to unintentionally vary with frequency.
Breadboarded circuits will work best if they are built using
generic PC boards with a good ground plane. If the op amps
are used with sockets, as opposed to being soldered into the
circuit, the additional input capacitance may degrade circuit
frequency response. At low gains (+2 or −1), a feedback ca-
pacitor Cf from output to inverting input will compensate for
the phase lag caused by capacitance at the inverting input.
Typically, values from 2 pF to 5 pF work well; however, best
results can be obtained by observing the amplifier pulse re-
sponse and optimizing Cf for the particular layout.
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LM6162
Typical Applications
Offset Voltage Adjustment
1106111
Inverting Amplifier, 30 MHz Bandwidth
1106112
Operation on ±15V supplies results in wider bandwidth, 50 MHz (typ).
Video Cable Driver
1106113
* Network required when operating on supply voltage over ±5V, for overvoltage protection of LM6321. If ±5V supplies are used, omit network and connect output
of LM6162 directly to input of LM6321.
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LM6162
Physical Dimensions inches (millimeters) unless otherwise noted
Ceramic Dual-In-Line Package (J)
Order Number LM6162J/883
NS Package Number J08A
Molded Dual-In-Line Package (N)
Order Number LM6162N
NS Package Number N08E
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LM6162
10-Pin Ceramic Flatpak
Order Number LM6162W/883
NS Package Number W10A
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LM6162
Notes
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11061 Version 4 Revision 4 Print Date/Time: 2011/10/24 14:05:16
LM6162
Notes
LM6162 High Speed Operational Amplifier
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