PIC16C63A/65B/73B/74B PIC16C63A/65B/73B/74B Data Sheet Errata The PIC16C63A/65B/73B/74B parts you have received conform functionally to the Device Data Sheet (DS30605C), except for the anomalies described below. None. 2003 Microchip Technology Inc. DS80164A-page 1 PIC16C63A/65B/73B/74B Clarifications/Corrections to the Data Sheet: In the Device Data Sheet (DS30605C), the following clarifications and corrections should be noted. 1. Module: SSP (SPITM Mode) In Section 10.2 ("SPI Mode"), Figure 10-1 and the note box immediately beneath it have been amended to better demonstrate the Peripheral OE line of the SSP module and describe its relationship to the TRISC<5> bit of PORTC. Changes are indicated in bold. FIGURE 10-1: SSP BLOCK DIAGRAM (SPI MODE) Internal Data Bus Read Write Note 1: When the SPI module is in Slave mode pin control enabled with SS (SSPCON<3:0> = 0100), the SPI module will reset if the SS pin is set to VDD. 2: If the SPI is used in Slave mode with CKE = '1', then SS pin control must be enabled. 3: When the SPI is in Slave mode with SS pin control enabled (SSPCON<3:0> = 0100), the state of the SS pin can affect the state read back from the TRISC<5> bit. The Peripheral OE signal from the SSP module into PORTC, controls the state that is read back from the TRISC<5> bit (see Section 5.3 for information on PORTC). If Read-ModifyWrite instructions, such as BSF, are performed on the TRISC register while the SS pin is high, this will cause the TRISC<5> bit to be set, thus disabling the SDO output. SSPBUF reg SSPSR reg RC4/SDI/SDA RC5/SDO Shift Clock bit0 Peripheral OE SS Control Enable RA5/SS/AN4 Edge Select 2 Clock Select SSPM3:SSPM0 SMP:CKE 4 TMR2 Output 2 2 Edge Select RC3/SCK/SCL Prescaler TCY 4, 16, 64 TRISC<3> DS80164A-page 2 2003 Microchip Technology Inc. PIC16C63A/65B/73B/74B 2. Module: Packaging (Pinout and Product Identification) PIC16C63A and PIC16C73B devices are now offered in 28-pin near chip-scale micro lead frame packages (commonly known as "QFN"). This packaging type has been added to the product line since the latest revision of the Device Data Sheet. The addition of this option requires the following additions to the Device Data Sheet. The referenced figures and tables follow this text. 1. The "Pin Diagram" on page 2 of the Data Sheet is amended with the addition of the 28-pin QFN pinout, shown in Figure 1. PINOUT DIAGRAM FOR PIC16C63A AND PIC16C73B, 28-PIN QFN RA1/AN1 RA0/AN0 MCLR/VPP RB7 RB6 RB5 RB4 FIGURE 1: 2. Table 3-1 of Section 3.0 ("Architectural Overview") is replaced with an updated version that adds a column for QFN pin assignments. All new information is indicated in bold. 3. Section 18.1 ("Package Marking Information") is amended to include a marking template and example for 28-pin QFN devices. These are shown in Figure 2. 4. Section 18.0 ("Package Information") is amended to include the mechanical drawings of the 28-pin QFN package. These are shown in Figure 3 and Figure 4, respectively. 5. Table B-1 ("Device Differences") is amended to include the 28-pin QFN for the PIC16C63A and PIC16C73B devices. QFN (28-pin) 1 2 3 4 5 6 7 28 27 26 25 24 23 22 21 20 PIC16C63A 19 18 PIC16C73B 17 16 15 8 9 10 11 12 13 14 RB3 RB2 RB1 RB0/INT VDD VSS RC7/RX/DT RC0/T1OSO/T1CKI RC1/T1OSI/CCP2 RC2/CCP1 RC3/SCK/SCL RC4/SDI/SDA RC5/SDO RC6/TX/CK RA2/AN2 RA3/AN3/VREF+ RA4/T0CKI RA5/AN4/SS VSS OSC1/CLKI OSC2/CLKO FIGURE 2: PACKAGE MARKING TEMPLATE FOR PIC16C63A AND PIC16C73B, 28-PIN QFN 28-Lead QFN XXXXXXXX XXXXXXXX YYWWNNN 2003 Microchip Technology Inc. Example PIC16C63A -I/ML 0310017 DS80164A-page 3 PIC16C63A/65B/73B/74B TABLE 3-1: PIC16C63A/73B PINOUT DESCRIPTION DIP Pin# Pin Name SOIC Pin# QFN Pin# I/O/P Type Buffer Type Description ST/CMOS(3) Oscillator crystal input/external clock source input. OSC1/CLKIN 9 9 6 I OSC2/CLKOUT 10 10 7 O -- Oscillator crystal output. Connects to crystal or resonator in crystal oscillator mode. In RC mode, the OSC2 pin outputs CLKOUT which has 1/4 the frequency of OSC1, and denotes the instruction cycle rate. MCLR/VPP 1 1 26 I/P ST Master clear (RESET) input or programming voltage input. This pin is an active low RESET to the device. RA0/AN0(4) 2 2 27 I/O TTL RA0 can also be analog input 0(4). RA1/AN1(4) 3 3 28 I/O TTL RA1 can also be analog input 1(4). RA2/AN2(4) 4 4 1 I/O TTL RA2 can also be analog input 2(4). RA3/AN3/VREF(4) 5 5 2 I/O TTL RA3 can also be analog input 3 or analog reference voltage(4). RA4/T0CKI 6 6 3 I/O ST RA4 can also be the clock input to the Timer0 module. Output is open drain type. RA5/SS/AN4(4) 7 7 4 I/O TTL RA5 can also be analog input 4(4) or the slave select for the synchronous serial port. PORTA is a bidirectional I/O port. PORTB is a bidirectional I/O port. PORTB can be software programmed for internal weak pull-up on all inputs. RB0/INT 21 21 18 I/O TTL/ST(1) RB1 22 22 19 I/O TTL RB2 23 23 20 I/O TTL RB3 24 24 21 I/O TTL RB4 25 25 22 I/O TTL RB5 26 26 23 I/O TTL RB6 27 27 24 I/O TTL/ST(2) RB7 28 28 25 I/O TTL/ST(2) RB0 can also be the external interrupt pin. Interrupt-on-change pin. Interrupt-on-change pin. Interrupt-on-change pin. Serial programming clock. Interrupt-on-change pin. Serial programming data. PORTC is a bidirectional I/O port. RC0/T1OSO/T1CKI 11 11 8 I/O ST RC0 can also be the Timer1 oscillator output or Timer1 clock input. RC1/T1OSI/CCP2 12 12 9 I/O ST RC1 can also be the Timer1 oscillator input or Capture2 input/Compare2 output/PWM2 output. RC2/CCP1 13 13 10 I/O ST RC2 can also be the Capture1 input/Compare1 output/PWM1 output. RC3/SCK/SCL 14 14 11 I/O ST RC3 can also be the synchronous serial clock input/output for both SPI and I2C modes. RC4/SDI/SDA 15 15 12 I/O ST RC4 can also be the SPI Data In (SPI mode) or data I/O (I2C mode). RC5/SDO 16 16 13 I/O ST RC5 can also be the SPI Data Out (SPI mode). RC6/TX/CK 17 17 14 I/O ST RC6 can also be the USART Asynchronous Transmit or Synchronous Clock. RC7/RX/DT 18 18 15 I/O ST RC7 can also be the USART Asynchronous Receive or Synchronous Data. VSS 8, 19 8, 19 16 P -- Ground reference for logic and I/O pins. VDD 20 20 17 P -- Positive supply for logic and I/O pins. Legend: I = input -- = Not used Note 1: 2: 3: 4: O = output TTL = TTL input I/O = input/output P = power ST = Schmitt Trigger input This buffer is a Schmitt Trigger input when configured as the external interrupt. This buffer is a Schmitt Trigger input when used in Serial Programming mode. This buffer is a Schmitt Trigger input when configured in RC Oscillator mode and a CMOS input otherwise. A/D module is not available in the PIC16C63A. DS80164A-page 4 2003 Microchip Technology Inc. PIC16C63A/65B/73B/74B FIGURE 3: 28-PIN QFN PACKAGE (DRAWING 1, PACKAGING) 28-Lead Plastic Quad Flat No Lead Package (ML) 6x6 mm Body, Punch Singulated (QFN) EXPOSED METAL PADS E E1 Q D1 D D2 p 2 1 B n R E2 CH X 45 TOP VIEW L BOTTOM VIEW A2 A A1 A3 Units Dimension Limits n p Number of Pins Pitch Overall Height Molded Package Thickness Standoff Base Thickness Overall Width Molded Package Width Exposed Pad Width Overall Length Molded Package Length Exposed Pad Length Lead Width Lead Length Tie Bar Width Tie Bar Length Chamfer Mold Draft Angle Top A A2 A1 A3 E E1 E2 D D1 D2 B L R Q CH MIN .000 .140 .140 .009 .020 .005 .012 .009 INCHES NOM 28 .026 BSC .033 .026 .0004 .008 REF .236 BSC .226 BSC .146 .236 BSC .226 BSC .146 .011 .024 .007 .016 .017 MAX .039 .031 .002 .152 .152 .014 .030 .010 .026 .024 12 MILLIMETERS* NOM 28 0.65 BSC 0.85 0.65 0.00 0.01 0.20 REF 6.00 BSC 5.75 BSC 3.55 3.70 6.00 BSC 5.75 BSC 3.55 3.70 0.23 0.28 0.50 0.60 0.13 0.17 0.30 0.40 0.24 0.42 MIN MAX 1.00 0.80 0.05 3.85 3.85 0.35 0.75 0.23 0.65 0.60 12 *Controlling Parameter Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side. JEDEC equivalent: mMO-220 Drawing No. C04-114 2003 Microchip Technology Inc. DS80164A-page 5 PIC16C63A/65B/73B/74B FIGURE 4: 28-PIN QFN PACKAGE (DRAWING 2, PACKAGING) 28-Lead Plastic Quad Flat No Lead Package (ML) 6x6 mm Body, Saw Singulated (QFN) E E2 EXPOSED METAL PAD p D D2 2 B 1 n TOP VIEW ALTERNATE INDEX INDICATORS OPTIONAL INDEX AREA SEE DETAIL L BOTTOM VIEW A1 A DETAIL ALTERNATE PAD OUTLINE Number of Pins Pitch Overall Height Standoff Overall Width Exposed Pad Width Overall Length Exposed Pad Length Lead Width Lead Length Units Dimension Limits n p A A1 E E2 D D2 B L MIN .031 .000 .232 .140 .232 .140 .009 .020 INCHES NOM 28 .026 BSC .035 .001 .236 .146 .236 .146 .011 .022 MAX .039 .002 .240 .152 .240 .152 .013 .024 MILLIMETERS* NOM 28 0.65 BSC 0.80 0.90 0.00 0.02 6.00 5.90 3.55 3.70 5.90 6.00 3.55 3.70 0.23 0.28 0.50 0.55 MIN MAX 1.00 0.05 6.10 3.85 6.10 3.85 0.33 0.60 *Controlling Parameter Notes: JEDEC equivalent: mMO-220 Drawing No. C04-105 DS80164A-page 6 2003 Microchip Technology Inc. PIC16C63A/65B/73B/74B 3. Module: RESET Section 13.4.1 ("POWER-ON RESET (POR)") has been amended to clarify the minimum specifications required for MCLR in order to RESET the PIC16CXXX. The following paragraphs and figure have been added: If a MCLR pulse occurs that is less that the minimum specification (parameter #30), improper device operation can occur. If the minimum specification cannot be met, then an external circuit must be used to ensure that any pulse width less than the specification will be filtered before it reaches the MCLR pin. FIGURE 5: MCLR EXTERNAL CIRCUIT VDD R1 MCLR C1 (optional) PIC16CXXX 4.7 k R1 100 k 0.01 F C1 0.1 F A possible circuit to remedy this is shown in Figure 5. This circuit works by delaying the MCLR release following a power-up. If no delay is required, the capacitor may be omitted. An alternative would be to use a supervisory circuit to control MCLR. Design validation should be performed to verify that the application works as expected. 2003 Microchip Technology Inc. DS80164A-page 7 PIC16C63A/65B/73B/74B REVISION HISTORY Rev A Document (7/2003) First revision of this document. Device Data Sheet Clarification issues 1 (SSP), 2 (Packaging) and 3 (RESET). DS80164A-page 8 2003 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * Microchip products meet the specification contained in their particular Microchip Data Sheet. * Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. * There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. * Microchip is willing to work with the customer who is concerned about the integrity of their code. * Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART, PRO MATE and PowerSmart are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Accuron, Application Maestro, dsPICDEM, dsPICDEM.net, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, InCircuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, PICC, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode, SmartSensor, SmartShunt, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2003, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. 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