© 2011-2012 Microchip Technology Inc. Preliminary DS61168D-page 1
PIC32MX1XX/2XX
Operating Conditions
• 2.3V to 3.6V, -40ºC to +105ºC, DC to 40 MHz
Core: 40 MHz MIPS32® M4K®
• MIPS16e® mode for up to 40% smaller code size
• 1.56 DMIPS/MHz (Dhrystone 2.1) performance
• Code-efficient (C and Assembly) architecture
• Single-cycle (MAC) 32x16 and two-cycle 32x32 multiply
Clock Management
• 0.9% internal oscillator
• Programmable PLLs and oscillator clock sources
• Fail-Safe Clock Monitor (FSCM)
• Independent Watchdog Timer
• Fast wake-up and start-up
Power Management
• Low-power management modes (Sleep, Idle)
• Integrated Power-on Reset and Brown-out Reset
• 0.5 mA/MHz dynamic current (typical)
•20 μA IPD current (typical)
Audio Interface Features
• Data communication: I2S, LJ, RJ, DSP modes
• Control interface: SPI and I2C™
• Master clock:
- Generation of fractional clock frequencies
- Can be synchronized with USB clock
- Can be tuned in run-time
Advanced Analog Features
• ADC Module:
- 10-bit 1.1 Msps rate with one S&H
- Up to 10 analog inputs on 28-pin devices and 13
analog inputs on 44-pin devices
• Flexible and indep endent ADC trigger sources
• Charge Time Measurement Unit (CTMU):
- Supports mTouch™ capacitive touch sensing
- Provides high-resolution time measurement (1 ns)
- On-chip temperature measurement capability
• Comparators:
- Up to three Analog Comparator modules
- Programmable references with 32 voltage points
Timers/Output Compare/Input Capture
• Five General Purpose Timers:
- Five 16-bit and up to two 32-bit Timers/Counters
• Five Output Compare (OC) modules
• Five Input Capture (IC) modules
• Peripheral Pin Select (PPS) to allow function remap
• Real-Time Clock and Calendar (RTCC) module
Communication Interfaces
• USB 2.0-compliant Full-speed OTG controller
• Two UART modules (10 Mbps)
- Supports LIN 2.0 protocols and IrDA ® support
• Two 4-wire SPI modules (20 Mbps)
•Two I
2C modules (up to 1 Mbaud) with SMBus support
• Peripheral Pin Select (PPS) to allow function remap
• Parallel Master Port (PMP)
Direct Memory Access (DMA)
• Four channels of hardware DMA with automatic data
size detection
• Two additional channels dedicated for USB
• Programmable Cyclic Redundancy Check (CRC)
Input/Output
• 15 mA source/sink on all I/O pins
• 5V-tolerant pins
• Selectable open drain, pull-ups, and pull-downs
• Exter na l int errupts on all I/O pins
Qualification and Class B Support
• AEC-Q100 REVG (Grade 2 -40ºC to +105ºC) planned
• Class B Safety Library, IEC 60730
Debugger Development Support
• In-circuit and in-a pplication programming
•4-wire MIPS
® Enhanced JTAG interface
• Unlimited program and si x complex data breakpoints
• IEEE 1149.2-compatible (JTAG) boundary scan
Packages
Type SOIC SSOP SPDIP QFN VTLA TQFP
Pin Count 28 28 28 28 44 36 44 44
I/O Pins (up to) 21 21 21 21 34 25 34 34
Contact/Lead Pitch 1.27 0.65 0.100'' 0.65 0.65 0.50 0.50 0.80
Dimensions 17.90x7.50x2.65 10.2x5.3x2 1.365x.285x.135'' 6x6x0.9 8x8x0.9 5x5x0.9 6x6x0.9 10x10x1
Note: All dimensions are in millimeters (mm) unless specified.
32-bit Micr ocontr ollers (up to 128 KB Flash and 32 KB SRAM) with
Audio and Graphics Interfaces, USB, and Advanced Analog
PIC32MX1XX/2XX
DS61168D-page 2 Preliminary © 2011-2012 Microchip Technology Inc.
TABLE 1: PIC32MX1XX GENERAL PURPOSE FAMILY FEATURES
Device
Pins
Program Memory (KB)(1)
Data Memory (KB)
Remappable Peripherals
Analog Comparators
USB On-The-Go (OTG)
I2C™
PMP
DMA Channels
(Programmable/Dedicated)
CTMU
10-bit 1 Msps ADC (Channels)
RTCC
I/O Pins
JTAG
Packages
Remappable Pins
Timers(2)/Capture/Compare
UART
SPI/I2S
External Interrupts(3)
PIC32MX110F016B 28 16+3 4 20 5/5/5 2253N2Y4/0Y10Y21Y
SOIC,
SSOP,
SPDIP,
QFN
PIC32MX110F016C 36 16+3 4 24 5/5/5 2253N2Y4/0Y12Y25YVTLA
PIC32MX110F016D 44 16+3 4 32 5/5/5 2253N2Y4/0Y13Y34Y
VTLA,
TQFP,
QFN
PIC32MX120F032B 28 32+3 8 20 5/5/5 2253N2Y4/0Y10Y21Y
SOIC,
SSOP,
SPDIP,
QFN
PIC32MX120F032C 36 32+3 8 24 5/5/5 2253N2Y4/0Y12Y25YVTLA
PIC32MX120F032D 44 32+3 8 32 5/5/5 2253N2Y4/0Y13Y34Y
VTLA,
TQFP,
QFN
PIC32MX130F064B 28 64+3 16 20 5/5/5 2253N2Y4/0Y10Y21Y
SOIC,
SSOP,
SPDIP,
QFN
PIC32MX130F064C 36 64+3 16 24 5/5/5 2253N2Y4/0Y12Y25YVTLA
PIC32MX130F064D 44 64+3 16 32 5/5/5 2253N2Y4/0Y13Y34Y
VTLA,
TQFP,
QFN
PIC32MX150F128B 28 128+3 32 20 5/5/5 2253N2Y4/0Y10Y21Y
SOIC,
SSOP,
SPDIP,
QFN
PIC32MX150F128C 36 128+3 32 24 5/5/5 2253N2Y4/0Y12Y25YVTLA
PIC32MX150F128D 44 128+3 32 32 5/5/5 2253N2Y4/0Y13Y34Y
VTLA,
TQFP,
QFN
Note 1: This device features 3 KB of boot Flash memory.
2: Four out of five timers are remappable.
3: Four out of five external interrupts are remappable.
© 2011-2012 Microchip Technology Inc. Preliminary DS61168D-page 3
PIC32MX1XX/2XX
TABLE 2: PIC32MX2XX USB FAMILY FEATURES
Device
Pins
Program Memory (KB)(1)
Data Memory (KB)
Remappable Peripherals
Analog Comparators
USB On-The-Go (OTG)
I2C™
PMP
DMA Channels
(Programmable/Dedicated)
CTMU
10-bit 1 Msps ADC (Channels)
RTCC
I/O Pins
JTAG
Packages
Remappable Pins
Timers(2)/Capture/Compare
UART
SPI/I2S
External Interrupts(3)
PIC32MX210F016B 28 16+3 4 19 5/5/5 2253Y2Y4/2Y9Y19Y
SOIC,
SSOP,
SPDIP,
QFN
PIC32MX210F016C 36 16+3 4 23 5/5/5 2253Y2Y4/2Y12Y23YVTLA
PIC32MX210F016D 44 16+3 4 31 5/5/5 2253Y2Y4/2Y13Y33Y
VTLA,
TQFP,
QFN
PIC32MX220F032B 28 32+3 8 19 5/5/5 2253Y2Y4/2Y9Y19Y
SOIC,
SSOP,
SPDIP,
QFN
PIC32MX220F032C 36 32+3 8 23 5/5/5 2253Y2Y4/2Y12Y23YVTLA
PIC32MX220F032D 44 32+3 8 31 5/5/5 2253Y2Y4/2Y13Y33Y
VTLA,
TQFP,
QFN
PIC32MX230F064B 28 64+3 16 19 5/5/52253Y2Y4/2Y9Y19Y
SOIC,
SSOP,
SPDIP,
QFN
PIC32MX230F064C 36 64+3 16 23 5/5/52253Y2Y4/2Y12Y23YVTLA
PIC32MX230F064D 44 64+3 16 31 5/5/52253Y2Y4/2Y13Y33Y
VTLA,
TQFP,
QFN
PIC32MX250F128B 28 128+3 32 19 5/5/52253Y2Y4/2Y9Y19Y
SOIC,
SSOP,
SPDIP,
QFN
PIC32MX250F128C 36 128+3 32 23 5/5/52253Y2Y4/2Y12Y23YVTLA
PIC32MX250F128D 44 128+3 32 31 5/5/52253Y2Y4/2Y13Y33Y
VTLA,
TQFP,
QFN
Note 1: This device features 3 KB of boot Flash memory.
2: Four out of five timers are remappable.
3: Four out of five external interrupts are remappable.
PIC32MX1XX/2XX
DS61168D-page 4 Preliminary © 2011-2012 Microchip Technology Inc.
Pin Diagrams
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for more
information.
MCLR
VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/RA0
VREF-/CVREF-/AN1/RPA1/CTED2/RA1 AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/RB0 CVREF/AN10/C3INB/RPB14/SCK1/CTED5/PMWR/RB14
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/RB1 AN11/RPB13/CTPLS/PMRD/RB13
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2 AN12/PMD0/RB12
PGEC2/TMS/RPB11/PMD1/RB11
VSS PGED2/RPB10/CTED11/PMD2/RB10
OSC1/CLKI/RPA2/RA2
OSC2/CLKO/RPA3/PMA0/RA3 VSS
SOSCI/RPB4/RB4 TDO/RPB9/SDA1/CTED4/PMD3/RB9
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4 TCK/RPB8/SCL1/CTED10/PMD4/RB8
VDD TDI/RPB7/CTED3/PMD5/INT0/RB7
PGEC3/RPB6/PMD6/RB6
MCLR AVDD
AVSS
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
VSS
VSS
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4
VDD
MCLR
VSS
VSS
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4
VDD
28-Pin SOIC, SPDIP, SSOP(1,2) = Pins are up to 5V tolerant
MCLR
VSS VCAP
VSS
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4
VDD
PGED3/RPB5/PMD7/RB5
MCLR 128AVDD
PGED3/V
REF
+/CV
REF
+/AN0/C3INC/RPA0/CTED1/PMD7/RA0
227AVSS
PGEC3/VREF-/CVREF-/AN1/RPA1/CTED2/PMD6/RA1 3 26 AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/PMD0/RB0 4 25 CVREF/AN10/C3INB/RPB14/VBUSON/SCK1/CTED5/RB14
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/PMD1/RB1 5 24 AN11/RPB13/CTPLS/PMRD/RB13
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/PMD2/RB2 6 23 VUSB3V3
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/PMWR/RB3 7 22 PGEC2/RPB11/D-/RB11
VSS 8 21 PGED2/RPB10/D+/CTED11/RB10
OSC1/CLKI/RPA2/RA2 9 20 VCAP
OSC2/CLKO/RPA3/PMA0/RA3 10 19 VSS
SOSCI/RPB4/RB4 11 18 TDO/RPB9/SDA1/CTED4/PMD3/RB9
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4 12 17 TCK/RPB8/SCL1/CTED10/PMD4/RB8
VDD 13 16 TDI/RPB7/CTED3/PMD5/INT0/RB7
TMS/RPB5/USBID/RB5 14 15 VBUS
PIC32MX210F016B
PIC32MX220F032B
128
227
326
425
524
623
722
821
920
10 19
11 18
12 17
13 16
14 15
PIC32MX110F016B
PIC32MX120F032B
PIC32MX130F064B
PIC32MX150F128B PIC32MX230F064B
PIC32MX250F128B
© 2011-2012 Microchip Technology Inc. Preliminary DS61168D-page 5
PIC32MX1XX/2XX
Pin Diagrams (Continued)
28-Pin QFN(1,2,3) = Pins are up to 5V tolerant
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.
VREF-/CVREF-/AN1/RPA1/CTED2/RA1
VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/RA0
MCLR
AVDD
AVSS
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
CVREF/AN10/C3INB/RPB14/SCK1/CTED5/PMWR/RB14
28
27
26
25
24
23
22
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/RB0 121AN11/RPB13/CTPLS/PMRD/RB13
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/RB1 220AN12/PMD0/RB12
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2 319PGEC2/TMS/RPB11/PMD1/RB11
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3 4
PIC32MX110F016B
18 PGED2/RPB10/CTED11/PMD2/RB10
VSS 517VCAP
OSC1/CLKI/RPA2/RA2 616VSS
OSC2/CLKO/RPA3/PMA0/RA3 715TDO/RPB9/SDA1/CTED4/PMD3/RB9
8
9
10
11
12
13
14
SOSCI/RPB4/RB4
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4
VDD
PGED3/RPB5/PMD7/RB5
PGEC3/RPB6/PMD6/RB6
TDI/RPB7/CTED3/PMD5/INT0/RB7
TCK/RPB8/SCL1/CTED10/PMD4/RB8
PIC32MX120F032B
PIC32MX130F064B
PIC32MX150F128B
PIC32MX1XX/2XX
DS61168D-page 6 Preliminary © 2011-2012 Microchip Technology Inc.
Pin Diagrams (Continued)
28-Pin QFN(1,2,3) = Pins are up to 5V tolerant
PGEC3/VREF-/CVREF-/AN1/RPA1/CTED2/PMD6/RA1
PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0
MCLR
AVDD
AVSS
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
CVREF/AN10/C3INB/RPB14/VBUSON/SCK1/CTED5/RB14
28
27
26
25
24
23
22
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/PMD0/RB0 121AN11/RPB13/CTPLS/PMRD/RB13
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/PMD1/RB1 220VUSB3V3
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/PMD2/RB2 319PGEC2/RPB11/D-/RB11
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/PMWR/RB3 4PIC32MX210F016B 18 PGED2/RPB10/D+/CTED11/RB10
VSS 517VCAP
OSC1/CLKI/RPA2/RA2 616VSS
OSC2/CLKO/RPA3/PMA0/RA3 715TDO/RPB9/SDA1/CTED4/PMD3/RB9
8
9
10
11
12
13
14
SOSCI/RPB4/RB4
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4
VDD
TMS/RPB5/USBID/RB5
VBUS
TDI/RPB7/CTED3/PMD5/INT0/RB7
TCK/RPB8/SCL1/CTED10/PMD4/RB8
PIC32MX220F032B
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be conne cted to VSS externally.
PIC32MX230F064B
PIC32MX250F128B
© 2011-2012 Microchip Technology Inc. Preliminary DS61168D-page 7
PIC32MX1XX/2XX
Pin Diagrams (Continued)
36-Pin VTLA(1,2,3) = Pins are up to 5V tolerant
Note 1: The RPn pins can be used by rema pp able pe ripherals. S ee Table 1 for the available peripherals and Section 11.3 “Peripheral Pin
Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for more
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS ext ernally.
4: This pin function is available on PIC32MX130F064C and PIC32MX150F128C devices only.
PIC32MX120F032C
1
PIC32MX110F016C
10
33 32 31 30 29 28
2
3
4
5
6
24
23
22
21
20
19
11 12 13 14 15
7
8
9
34
35
36
16 17 18
27
26
25
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/RB1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/RB0
VREF-/CVREF-/AN1/RPA1/CTED2/RA1
VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/RA0
MCLR
AVDD
AVSS
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
CVREF/AN10/C3INB/RPB14/SCK1/CTED5/PMWR/RB14
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2
AN11/RPB13/CTPLS/PMRD/RB13
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
AN12/PMD0/RB12
PGED(4)/AN6/RPC0/RC0
PGEC2/TMS/RPB11/PMD1/RB11
PGEC(4)/AN7/RPC1/RC1
PGED2/RPB10/CTED11/PMD2/RB10
VDD
VDD
VSS
VCAP
OSC1/CLKI/RPA2/RA2
VSS
OSC2/CLKO/RPA3/PMA0/RA3
RPC9/CTED7/RC9
SOSCI/RPB4/RB4
TDO/RPB9/SDA1/CTED4/PMD3/RB9
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4
RPC3/RC3
VSS
VDD
VDD
PGED3/RPB5/PMD7/RB5
PGEC3/RPB6/PMD6/RB6
TDI/RPB7/CTED3/PMD5/INT0/RB7
TCK/RPB8/SCL1/CTED10/PMD4/RB8
PIC32MX130F064C
PIC32MX150F128C
PIC32MX1XX/2XX
DS61168D-page 8 Preliminary © 2011-2012 Microchip Technology Inc.
Pin Diagrams (Continued)
36-Pin VTLA(1,2,3) = Pins are up to 5V tolerant
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be conne cted to VSS externally.
4: This pin function is available on PI C3 2MX230F064C and PIC32MX250F128C devices only.
PIC32MX220F032C
1
PIC32MX210F016C
10
33 32 31 30 29 28
2
3
4
5
6
24
23
22
21
20
19
11 12 13 14 15
7
8
9
34
35
36
16 17 18
27
26
25
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/PMD1/RB1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/PMD0/RB0
PGEC3/VREF-/CVREF-/AN1/RPA1/CTED2/PMD6/RA1
PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0
MCLR
AVDD
AVSS
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
CVREF/AN10/C3INB/RPB14/VBUSON/SCK1/CTED5/RB14
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/PMD2/RB2
AN11/RPB13/CTPLS/PMRD/RB13
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/PMWR/RB3
VUSB3V3
PGED4(4)/AN6/RPC0/RC0
PGEC2/RPB11/D-/RB11
PGEC4(4)/AN7/RPC1/RC1
PGED2/RPB10/D+/CTED11/RB10
VDD
VCAP
OSC1/CLKI/RPA2/RA2
VSS
OSC2/CLKO/RPA3/PMA0/RA3
RPC9/CTED7/RC9
SOSCI/RPB4/RB4
TDO/RPB9/SDA1/CTED4/PMD3/RB9
SOSCO/RPA4/T1CK/CTED9/PMA1/RA4
AN12/RPC3/RC3
VSS
VDD
VDD
TMS/RPB5/USBID/RB5
VBUS
TDI/RPB7/CTED3/PMD5/INT0/RB7
TCK/RPB8/SCL1/CTED10/PMD4/RB8
VDD
VSS
PIC32MX230F064C
PIC32MX250F128C
© 2011-2012 Microchip Technology Inc. Preliminary DS61168D-page 9
PIC32MX1XX/2XX
Pin Diagrams (Continued)
44-Pin QFN(1,2,3) = Pins are up to 5V tole ran t
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.
4: This pin function is available on PI C3 2MX130F064D and PIC32MX150F128D devices only.
RPB8/SCL1/CTED10/PMD4/RB8
RPB7/CTED3/PMD5/INT0/RB7
PGEC3/RPB6/PMD6/RB6
PGED3/RPB5/PMD7/RB5
VDD
VSS
RPC5/PMA3/RC5
RPC4/PMA4/RC4
RPC3/RC3
TDI/RPA9/PMA9/RA9
SOSCO/RPA4/T1CK/CTED9/RA4
44
43
42
41
40
39
38
37
36
35
34
RPB9/SDA1/CTED4/PMD3/RB9 1 33 SOSCI/RPB4/RB4
RPC6/PMA1/RC6 2 32 TDO/RPA8/PMA8/RA8
RPC7/PMA0/RC7 3 31 OSC2/CLKO/RPA3/RA3
RPC8/PMA5/RC8 4 30 OSC1/CLKI/RPA2/RA2
RPC9/CTED7/PMA6/RC9 5 29 VSS
VSS 6
PIC32MX110F016D
28 VDD
VCAP 7 27 AN8/RPC2/PMA2/RC2
PGED2/RPB10/CTED11/PMD2/RB10 8 26 AN7/RPC1/RC1
PGEC2/RPB11/PMD1/RB11 9 25 AN6/RPC0/RC0
AN12/PMD0/RB12 10 24 AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
AN11/RPB13/CTPLS/PMRD/RB13 11 23 AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2
12
13
14
15
16
17
18
19
20
21
22
PGED4(4)/TMS/PMA10/RA10
PGEC(4)/TCK/CTED8/PMA7/RA7
CVREF/AN10/C3INB/RPB14/SCK1/CTED5/PMWR/RB14
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
AVSS
AVDD
MCLR
VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/RA0
VREF-/CVREF-/AN1/RPA1/CTED2/RA1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/RB0
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/RB1
PIC32MX120F032D
PIC32MX130F064D
PIC32MX150F128D
PIC32MX1XX/2XX
DS61168D-page 10 Preliminary © 2011-2012 Microchip Technology Inc.
Pin Diagrams (Continued)
44-Pin QFN(1,2,3) = Pins are up to 5V toleran t
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be conne cted to VSS externally.
4: This pin function is available on PI C3 2MX230F064D and PIC32MX250F128D devices only.
RPB8/SCL1/CTED10/PMD4/RB8
RPB7/CTED3/PMD5/INT0/RB7
VBUS
RPB5/USBID/RB5
VDD
VSS
RPC5/PMA3/RC5
RPC4/PMA4/RC4
AN12/RPC3/RC3
TDI/RPA9/PMA9/RA9
SOSCO/RPA4/T1CK/CTED9/RA4
44
43
42
41
40
39
38
37
36
35
34
1 33 SOSCI/RPB4/RB4
RPC6/PMA1/RC6 2 32 TDO/RPA8/PMA8/RA8
RPC7/PMA0/RC7 3 31 OSC2/CLKO/RPA3/RA3
RPC8/PMA5/RC8 4 30 OSC1/CLKI/RPA2/RA2
RPC9/CTED7/PMA6/RC9 5 29 VSS
VSS 6PIC32MX210F016D 28 VDD
VCAP 7 27 AN8/RPC2/PMA2/RC2
8 26 AN7/RPC1/RC1
PGEC2/RPB11/D-/RB11 9 25 AN6/RPC0/RC0
VUSB3V310 24
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/PMWR/CNB3/RB3
AN11/RPB13/CTPLS/PMRD/RB13 11 23
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/PMD2/CNB2/RB2
12
13
14
15
16
17
18
19
20
21
22
PGED(4)/TMS/PMA10/RA10
PGEC(4)/TCK/CTED8/PMA7/RA7
CVREF/AN10/C3INB/RPB14/VBUSON/SCK1/CTED5/RB14
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
AVSS
AVDD
MCLR
PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0
PGEC3/VREF-/CVREF-/AN1/RPA1/CTED2/PMD6/RA1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/PMD0/RB0
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/PMD1/RB1
PGED2/RPB10/D+/CTED11/RB10
RPB9/SDA1/CTED4/PMD3/RB9
PIC32MX220F032D
PIC32MX230F064D
PIC32MX250F128D
© 2011-2012 Microchip Technology Inc. Preliminary DS61168D-page 11
PIC32MX1XX/2XX
Pin Diagrams (Continued)
44-Pin TQFP(1,2,3) = Pins a re up to 5V tole rant
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.
4: This pin function is available on PI C3 2MX130F064D and PIC32MX150F128D devices only.
RPB8/SCL1/CTED10/PMD4/RB8
RPB7/CTED3/PMD5/INT0/RB7
PGEC3/RPB6/PMD6/RB6
PGED3/RPB5/PMD7/RB5
VDD
VSS
RPC5/PMA3/RC5
RPC4/PMA4/RC4
RPC3/RC3
TDI/RPA9/PMA9/RA9
SOSCO/RPA4/T1CK/CTED9/RA4
44
43
42
41
40
39
38
37
36
35
34
RPB9/SDA1/CTED4/PMD3/RB9 1 33 SOSCI/RPB4/RB4
RPC6/PMA1/RC6 2 32 TDO/RPA8/PMA8/RA8
RPC7/PMA0/RC7 3 31 OSC2/CLKO/RPA3/RA3
RPC8/PMA5/RC8 4 30 OSC1/CLKI/RPA2/RA2
RPC9/CTED7/PMA6/RC9 5 29 VSS
VSS 6PIC32MX110F016D 28 VDD
VCAP 7 27 AN8/RPC2/PMA2/RC2
PGED2/RPB10/CTED11/PMD2/RB10 8 26 AN7/RPC1/RC1
PGEC2/RPB11/PMD1/RB11 9 25 AN6/RPC0/RC0
AN12/PMD0/RB12 10 24 AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
AN11/RPB13/CTPLS/PMRD/RB13 11 23 AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2
12
13
14
15
16
17
18
19
20
21
22
PGED(4)/TMS/PMA10/RA10
PGEC(4)/TCK/CTED8/PMA7/RA7
CVREF/AN10/C3INB/RPB14/SCK1/CTED5/PMWR/RB14
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
AVSS
AVDD
MCLR
VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/RA0
VREF-/CVREF-/AN1/RPA1/CTED2/RA1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/RB0
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/RB1
PIC32MX120F032D
PIC32MX130F064D
PIC32MX150F128D
PIC32MX1XX/2XX
DS61168D-page 12 Preliminary © 2011-2012 Microchip Technology Inc.
Pin Diagrams (Continued)
44-Pin VTLA(1,2,3) = Pins are up to 5V tole rant
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be conne cted to VSS externally.
4: This pin function is available on PI C3 2MX130F064D and PIC32MX150F128D devices only.
RPB8/SCL1/CTED10/PMD4/RB8
RPB7/CTED3/PMD5/INT0/RB7
PGEC3/RPB6/PMD6/RB6
PGED3/RPB5/PMD7/RB5
VDD
VSS
RPC5/PMA3/RC5
RPC4/PMA4/RC4
RPC3/RC3
TDI/RPA9/PMA9/RA9
SOSCO/RPA4/T1CK/CTED9/RA4
RPB9/SDA1/CTED4/PMD3/RB9
SOSCI/RPB4/RB4
RPC6/PMA1/RC6
TDO/RPA8/PMA8/RA8
RPC7/PMA0/RC7
OSC2/CLKO/RPA3/RA3
RPC8/PMA5/RC8
OSC1/CLKI/RPA2/RA2
RPC9/CTED7/PMA6/RC9
VSS
VSS PIC32MX110F016D VDD
VCAP
AN8/RPC2/PMA2/RC2
PGED2/RPB10/CTED11/PMD2/RB10
AN7/RPC1/RC1
PGEC2/RPB11/PMD1/RB11
AN6/RPC0/RC0
AN12/PMD0/RB12 AN5/C1INA/C2INC/RTCC/RPB3/SCL2/RB3
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/RB2
PGEC(4)/TCK/CTED8/PMA7/RA7
CVREF/AN10/C3INB/RPB14/SCK1/CTED5/PMWR/RB14
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
AVSS
AVDD
MCLR
VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/RA0
VREF-/CVREF-/AN1/RPA1/CTED2/RA1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/RB0
PIC32MX120F032D
1
10
33
32
31
30
29
28
2
3
4
5
6
24
23
2221201911 12 13 14 15
7
8
9
343536
16 17 18
27
26
25
3738394041424344
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/RB1
AN11/RPB13/CTPLS/PMRD/RB13
PIC32MX130F064D
PIC32MX150F128D
PGED(4)/TMS/PMA10/RA10
© 2011-2012 Microchip Technology Inc. Preliminary DS61168D-page 13
PIC32MX1XX/2XX
Pin Diagrams (Continued)
44-Pin TQFP(1,2,3) = Pins are up to 5V toler an t
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be connected to VSS externally.
4: This pin function is available on PI C3 2MX230F064D and PIC32MX250F128D devices only.
RPB8/SCL1/CTED10/PMD4/RB8
RPB7/CTED3/PMD5/INT0/RB7
VBUS
RPB5/USBID/RB5
VDD
VSS
RPC5/PMA3/RC5
RPC4/PMA4/RC4
AN12/RPC3/RC3
TDI/RPA9/PMA9/RA9
SOSCO/RPA4/T1CK/CTED9/RA4
44
43
42
41
40
39
38
37
36
35
34
1 33 SOSCI/RPB4/RB4
RPC6/PMA1/RC6 2 32 TDO/RPA8/PMA8/RA8
RPC7/PMA0/RC7 3 31 OSC2/CLKO/RPA3/RA3
RPC8/PMA5/RC8 4 30 OSC1/CLKI/RPA2/RA2
RPC9/CTED7/PMA6/RC9 5 29 VSS
VSS 6
PIC32MX210F016D
28 VDD
VCAP 7 27 AN8/RPC2/PMA2/RC2
8 26 AN7/RPC1/RC1
PGEC2/RPB11/D-/RB11 9 25 AN6/RPC0/RC0
VUSB3V310 24
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/PMWR/CNB3/RB3
AN11/RPB13/CTPLS/PMRD/RB13 11 23
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/PMD2/CNB2/RB2
12
13
14
15
16
17
18
19
20
21
22
PGED(4)/TMS/PMA10/RA10
PGEC(4)/TCK/CTED8/PMA7/RA7
CVREF/AN10/C3INB/RPB14/VBUSON/SCK1/CTED5/RB14
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
AVSS
AVDD
MCLR
PGED3/VREF+/CVREF+/AN0/C3INC/RPA0/CTED1/PMD7/RA0
PGEC3/VREF-/CVREF-/AN1/RPA1/CTED2/PMD6/RA1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/PMD0/RB0
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/PMD1/RB1
PGED2/RPB10/D+/CTED11/RB10
RPB9/SDA1/CTED4/PMD3/RB9
PIC32MX220F032D
PIC32MX230F064D
PIC32MX250F128D
PIC32MX1XX/2XX
DS61168D-page 14 Preliminary © 2011-2012 Microchip Technology Inc.
Pin Diagrams (Continued)
44-Pin VTLA(1,2,3) = Pins are up to 5V tol erant
Note 1: The RPn pins can be used by remappable peripherals. See Table 1 for the available peripherals and Section 11.3 “Peripheral
Pin Select” for restrictions.
2: Every I/O port pin (RAx-RCx) can be used as a change notification pin (CNAx-CNCx). See Section 11.0 “I/O Ports” for mo re
information.
3: The metal plane at the bottom of the device is not connected to any pins and is recommended to be conne cted to VSS externally.
4: This pin function is available on PI C3 2MX230F064D and PIC32MX250F128D devices only.
RPB8/SCL1/CTED10/PMD4/RB8
RPB7/CTED3/PMD5/INT0/RB7
V
BUS
RPB5/USBID/RB5
V
DD
V
SS
RPC5/PMA3/RC5
RPC4/PMA4/RC4
AN12/RPC3/RC3
TDI/RPA9/PMA9/RA9
SOSCO/RPA4/T1CK/CTED9/RA4
SOSCI/RPB4/RB4
RPC6/PMA1/RC6
TDO/RPA8/PMA8/RA8
RPC7/PMA0/RC7
OSC2/CLKO/RPA3/RA3
RPC8/PMA5/RC8
OSC1/CLKI/RPA2/RA2
RPC9/CTED7/PMA6/RC9
V
SS
V
SS
V
DD
V
CAP
AN8/RPC2/PMA2/RC2
AN7/RPC1/RC1
PGEC2/RPB11/D-/RB11
AN6/RPC0/RC0
V
USB
3V3
AN5/C1INA/C2INC/RTCC/RPB3/SCL2/PMWR/CNB3/RB3
AN11/RPB13/CTPLS/PMRD/RB13
AN4/C1INB/C2IND/RPB2/SDA2/CTED13/PMD2/CNB2/RB2
PGED
(4)
/TMS/PMA10/RA10
PGEC
(4)
/TCK/CTED8/PMA7/RA7
CV
REF
/AN10/C3INB/RPB14/VBUSON/SCK1/CTED5/RB14
AN9/C3INA/RPB15/SCK2/CTED6/PMCS1/RB15
AV
SS
AV
DD
MCLR
PGED3/V
REF
+/CV
REF
+/AN0/C3INC/RPA0/CTED1/PMD7/RA0
PGEC3/V
REF
-/CV
REF
-/AN1/RPA1/CTED2/PMD6/RA1
PGED1/AN2/C1IND/C2INB/C3IND/RPB0/PMD0/RB0
PGEC1/AN3/C1INC/C2INA/RPB1/CTED12/PMD1/RB1
PGED2/RPB10/D+/CTED11/RB10
RPB9/SDA1/CTED4/PMD3/RB9
PIC32MX210F016D
PIC32MX220F032D
1
10
33
32
31
30
29
28
2
3
4
5
6
24
23
2221201911 12 13 14 15
7
8
9
343536
16 17 18
27
26
25
3738394041424344
PIC32MX230F064D
PIC32MX250F128D
