IRS2011(S)PBF
1
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© 2015 International Rectifier
October 28, 2015
High and Low Side Driver
Ordering Information
Features
Floating channel designed for bootstrap operation
Fully operational to 200V
Tolerant to negative transient voltage, dV/dt immune
Gate drive supply range from 10 to 20V
Independent low and high side channels
Input logic HIN/LIN active high
Undervoltage lockout for both channels
3.3V and 5V logic compatible
CMOS Schmitt-triggered inputs with pull-down
Matched propagation delay for both channels
Description
The IRS2011 is a high power, high speed power MOSFET
driver with independent high and low side referenced output
channels. Logic inputs are compatible with standard CMOS
or LSTTL output, down to 3.3V logic. The output drivers
feature a high pulse current buffer stage designed for
minimum driver cross-conduction. Propagation delays are
matched to simplify use in high frequency applications. The
floating channel can be used to drive an N-channel power
MOSFET in the high side configuration which operates up to
200 volts. Proprietary HVIC and latch immune CMOS
technologies enable ruggedized monolithic construction.
Applications
Converters
DC motor drive
Product Summary
VOFFSET (max)
200V
IO+/- (typ)
1.0A / 1.0A
VOUT
10 – 20V
ton/off (typ)
60ns
Delay Matching (max)
20ns
Package Options
8-Lead PDIP 8-Lead SOIC
Base Part Number
Package Type
Standard Pack
Orderable Part Number
Form
Quantity
IRS2011PBF
PDIP8
Tube
50
IRS2011PBF
IRS2011SPBF
SO8N
Tube
95
IRS2011SPBF
IRS2011SPBF
SO8N
Tape and Reel
2500
IRS2011STRPBF
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© 2015 International Rectifier
October 28, 2015
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are
measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply voltage
-0.3
220†
V
VS
High side floating supply offset voltage
VB - 20
VB + 0.3
VHO
High side floating output voltage
VS - 0.3
VB + 0.3
VCC
Low side fixed supply voltage
-0.3
20†
VLO
Low side output voltage
-0.3
VCC + 0.3
VIN
Logic input voltage (HIN, LIN)
-0.3
VCC + 0.3
dVs/dt
Allowable offset supply voltage transient
—
50
V/ns
PD
Package power dissipation
@ TA ≤ +25°C
8-Lead PDIP
—
1.0
W
8-Lead SOIC
—
0.625
RthJA
Thermal resistance, junction to
ambient
8-Lead PDIP
—
125
°C/W
8-Lead SOIC
—
200
TJ
Junction temperature
—
150
°C
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
—
300
† All supplies are fully tested at 25V and an internal 20V clamp exists for each supply
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions. The VS and COM offset
ratings are tested with all supplies biased at 15V differential.
Symbol
Definition
Min.
Max.
Units
VB
High side floating supply absolute voltage
VS + 10
VS + 20
V
VS
High side floating supply offset voltage
††
200
VHO
High side floating output voltage
VS
VB
VCC
Low side fixed supply voltage
10
20
VLO
Low side output voltage
0
VCC
VIN
Logic input voltage (HIN, LIN)
COM
VCC
TA
Ambient temperature
-40
125
°C
†† Logic operational for VS of -5 to +200V. Logic state held for VS of -5V to -VBS.
IRS2011(S)PBF
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© 2015 International Rectifier
October 28, 2015
Dynamic Electrical Characteristics
VBIAS (VCC, VBS) = 15V, CL = 1000pF and TA = 25°C unless otherwise specified. Figure 1 shows the timing
definitions.
Symbol
Definition
Min.
Typ.
Max.
Units
Test Conditions
ton
Turn-on propagation delay
—
60
80
ns
VS = 0V
toff
Turn-off propagation delay
—
60
80
VS = 200V
tr
Turn-on rise time
—
25
40
tf
Turn-off fall time
—
15
35
DM1
Turn-on delay matching
| ton (H) - ton (L) |
—
—
20
DM2
Turn-off delay matching
| toff (H) - toff (L) |
—
—
20
Static Electrical Characteristics
VBIAS (VCC, VBS) = 15V and TA = 25°C unless otherwise specified. The VIN, VTH and IIN parameters are referenced to
COM and are applicable to all logic input leads: HIN and LIN. The VO and IO parameters are referenced to COM
and are applicable to the respective output leads: HO or LO.
Symbol
Definition
Min.
Typ.
Max.
Units
Test Conditions
VIH
Logic “1” input voltage
2.5
—
—
V
VCC = 10V – 20V
VIL
Logic “0” input voltage
—
—
0.7
VOH
High level output voltage, VBIAS - VO
—
—
1.4
IO = 0A
VOL
Low level output voltage, VO
—
—
0.1
IO = 20mA
ILK
Offset supply leakage current
—
—
50
μA
VB = VS = 200V
IQBS
Quiescent VBS supply current
—
120
210
VIN = 0V or 3.3V
IQCC
Quiescent VCC supply current
—
200
300
IIN+
Logic “1” input bias current
—
3
10
VIN = 3.3V
IIN-
Logic “0” input bias current
—
—
5
VIN = 0V
VBSUV+
VBS supply undervoltage positive
going threshold
8.3
9.0
9.7
V
VBSUV-
VBS supply undervoltage negative
going threshold
7.5
8.2
8.9
VCCUV+
VCC supply undervoltage positive
going threshold
8.3
9.0
9.7
VCCUV-
VCC supply undervoltage negative
going threshold
7.5
8.2
8.9
IO+
Output high short circuit pulsed
current
—
1.0
—
A
VO = 0V,
PW ≤ 10 μs
IO-
Output low short circuit pulsed
current
—
1.0
—
VO = 15V
PW ≤ 10 μs
IRS2011(S)PBF
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© 2015 International Rectifier
October 28, 2015
Lead Definitions
Symbol
Description
HIN
Logic input for high side gate driver outputs (HO), in phase
LIN
Logic input for low side gate driver outputs (LO), in phase
VB
High side floating supply
HO
High side gate drive output
VS
High side floating supply return
VCC
Low side supply
LO
Low side gate drive output
COM
Low side return
Lead Assignments
8-Lead PDIP
8-Lead SOIC
IRS2011(S)PBF
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© 2015 International Rectifier
October 28, 2015
Figure 6A. Turn-on Delay Matching Time vs.
Temperature
Figure 6B. Turn-on Delay Matching Time vs. Supply
Voltage
Figure 7A Turn-off Delay Matching Time vs.
Temperature
Figure 7B. Turn-off Delay Matching Time vs. Supply
Voltage
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© 2015 International Rectifier
October 28, 2015
Figure 10A. High Level Output Voltage vs.
Temperature (IO = 0mA)
Figure 10B. High Level Output Voltage vs. Supply
Voltage (IO = 0mA)
Figure 11A. Low Level Output Voltage vs.
Temperature
Figure 11B. Low Level Output vs. Supply Voltage
IRS2011(S)PBF
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© 2015 International Rectifier
October 28, 2015
Figure 16A. Logic “0” Input Bias Current vs.
Temperature
Figure 16B. Logic “0” Input Bias Current vs.
Voltage
Figure 17. VCC and VBS Undervoltage Threshold (+)
vs. Temperature
Figure 18. VCC and VBS Undervoltage Threshold (-)
vs. Temperature
IRS2011(S)PBF
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© 2015 International Rectifier
October 28, 2015
Tape and Reel Details
CARRIER TAPE DIMENSION FOR 8SOICN
Code Min Max Min Max
A 7.90 8.10 0.311 0.318
B 3.90 4.10 0.153 0.161
C 11.70 12.30 0.46 0.484
D 5.45 5.55 0.214 0.218
E 6.30 6.50 0.248 0.255
F 5.10 5.30 0.200 0.208
G 1.50 n/a 0.059 n/a
H 1.50 1.60 0.059 0.062
REEL DIMENSIONS FOR 8SOICN
Code Min Max Min Max
A 329.60 330.25 12.976 13.001
B 20.95 21.45 0.824 0.844
C 12.80 13.20 0.503 0.519
D 1.95 2.45 0.767 0.096
E 98.00 102.00 3.858 4.015
F n/a 18.40 n/a 0.724
G 14.50 17.10 0.570 0.673
H 12.40 14.40 0.488 0.566
Metric
Imperial
Metric
Imperial
E
F
A
C
D
G
A
B
H
NOTE : CONTROLLING
DIMENSION IN MM
LOADED TAPE FEED DIRECTION
A
H
F
E
G
D
B
C
IRS2011(S)PBF
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© 2015 International Rectifier
October 28, 2015
Part Marking Information
IRxxxxx
IR logo
YWW ?
Part number
Date code
Pin 1
Identifier
Lot Code
(Prod mode –
4 digit SPN code)
Assembly site code
Per SCOP 200-002
? XXXX
MARKING CODE
Lead Free Released
Non-Lead Free Released
?
P
IRS2011(S)PBF
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© 2015 International Rectifier
October 28, 2015
Qualification Information†
Qualification Level
Industrial††
(per JEDEC JESD 47)
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
Moisture Sensitivity Level
8-Lead SOIC
MSL2†††
(per IPC/JEDEC J-STD-020)
RoHS Compliant
Yes
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
††
Higher qualification ratings may be available should the user have such requirements. Please contact your
International Rectifier sales representative for further information.
†††
Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
The information provided in this document is believed to be accurate and reliable. However, International Rectifier assumes no responsibility
for the consequences of the use of this information. International Rectifier assumes no responsibility for any infringement of patents or of
other rights of third parties which may result from the use of this information. No license is granted by implication or otherwise under any
patent or patent rights of International Rectifier. The specifications mentioned in this document are subject to change without notice. This
document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
233 Kansas St., El Segundo, California 90245
Tel: (310) 252-7105
