LMP2011, LMP2012 www.ti.com SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 LMP2011 Single/LMP2012 Dual High Precision, Rail-to-Rail Output Operational Amplifier Check for Samples: LMP2011, LMP2012 FEATURES DESCRIPTION 1 (For VS = 5V, Typical Unless Otherwise Noted) 2 * * * * * * * * * * Low Ensured VOS Over Temperature 60 V Low Noise with No 1/f 35nV/Hz High CMRR 130 dB High PSRR 120 dB High AVOL 130 dB Wide Gain-Bandwidth Product 3MHz High Slew Rate 4V/s Low Supply Current 930A Rail-to-Rail Output 30mV No External Capacitors Required APPLICATIONS * * * Precision Instrumentation Amplifiers Thermocouple Amplifiers Strain Gauge Bridge Amplifier The LMP201X series are the first members of TI's new LMPTM precision amplifier family. The LMP201X series offers unprecedented accuracy and stability in space-saving miniature packaging while also being offered at an affordable price. This device utilizes patented techniques to measure and continually correct the input offset error voltage. The result is an amplifier which is ultra stable over time and temperature. It has excellent CMRR and PSRR ratings, and does not exhibit the familiar 1/f voltage and current noise increase that plagues traditional amplifiers. The combination of the LMP201X characteristics makes it a good choice for transducer amplifiers, high gain configurations, ADC buffer amplifiers, DAC I-V conversion, and any other 2.7V5V application requiring precision and long term stability. Other useful benefits of the LMP201X are rail-to-rail output, a low supply current of 930 A, and wide gain-bandwidth product of 3 MHz. These extremely versatile features found in the LMP201X provide high performance and ease of use. Connection Diagram N/C - 2 + 3 - 4 VIN VIN V Figure 1. 5-Pin SOT-23 Single (LMP2011) Top View 1 8 - 7 + 6 5 N/C + V VOUT N/C Figure 2. 8-Pin Single SOIC (LMP2011) Top View Figure 3. 8-Pin Dual SOIC/VSSOP (LMP2012) Top View These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright (c) 2004-2013, Texas Instruments Incorporated LMP2011, LMP2012 SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 Absolute Maximum Ratings www.ti.com (1) (2) ESD Tolerance Human Body Model 2000V Machine Model 200V Supply Voltage 5.8V -0.3 VCM VCC +0.3V Common-Mode Input Voltage Lead Temperature (soldering 10 sec.) +300C Differential Input Voltage Supply Voltage Current at Input Pin 30 mA Current at Output Pin 30 mA Current at Power Supply Pin 50 mA (1) (2) Absolute Maximum Ratings indicate limits beyond which damage may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and test conditions, see the Electrical Characteristics. If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. Operating Ratings (1) Supply Voltage 2.7V to 5.25V Storage Temperature Range -65C to 150C Operating Temperature Range -40C to 125C (1) Absolute Maximum Ratings indicate limits beyond which damage may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. For ensured specifications and test conditions, see the Electrical Characteristics. 2.7V DC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25C, V+ = 2.7V, V- = 0V, V CM = 1.35V, VO = 1.35V and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VOS Parameter Conditions Min (1) Typ (2) Max Input Offset Voltage (LMP2011 only) 0.8 25 60 Input Offset Voltage (LMP2012 only) 0.8 36 60 Offset Calibration Time 0.5 10 12 (1) Units V ms Input Offset Voltage 0.015 V/C Long-Term Offset Drift 0.006 V/month Lifetime VOS Drift 2.5 V IIN Input Current -3 pA IOS Input Offset Current 6 pA RIND Input Differential Resistance 9 M CMRR Common Mode Rejection Ratio 95 90 130 dB PSRR Power Supply Rejection Ratio 95 90 120 dB AVOL Open Loop Voltage Gain RL = 10 k 95 90 130 RL = 2 k 90 85 124 TCVOS (1) (2) 2 -0.3 VCM 0.9V 0 VCM 0.9V dB Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method. Typical values represent the most likely parametric norm. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 LMP2011, LMP2012 www.ti.com SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 2.7V DC Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for TJ = 25C, V+ = 2.7V, V- = 0V, V CM = 1.35V, VO = 1.35V and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol VO Parameter Output Swing (LMP2011 only) Conditions RL = 10 k to 1.35V VIN(diff) = 0.5V Min (1) 2.665 2.655 Typ (2) 2.630 2.615 RL = 10 k to 1.35V VIN(diff) = 0.5V 2.64 2.63 2.615 2.6 Output Current IS V 0.085 0.105 V 0.060 0.075 2.65 0.061 IO V 0.060 0.075 2.68 0.033 RL = 2 k to 1.35V VIN(diff) = 0.5V Units 2.65 0.061 Output Swing (LMP2012 only) (1) 2.68 0.033 RL = 2 k to 1.35V VIN(diff) = 0.5V Max Sourcing, VO = 0V VIN(diff) = 0.5V 5 3 12 Sinking, VO = 5V VIN(diff) = 0.5V 5 3 18 Supply Current per Channel V 0.085 0.105 mA 0.919 1.20 1.50 mA 2.7V AC Electrical Characteristics TJ = 25C, V+ = 2.7V, V- = 0V, VCM = 1.35V, VO = 1.35V, and RL > 1 M. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units GBW Gain-Bandwidth Product 3 MHz SR Slew Rate 4 V/s m Phase Margin 60 Deg Gm Gain Margin -14 dB en Input-Referred Voltage Noise 35 nV/Hz in Input-Referred Current Noise enp-p Input-Referred Voltage Noise trec Input Overload Recovery Time (1) (2) pA/Hz RS = 100, DC to 10 Hz 850 nVpp 50 ms Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method. Typical values represent the most likely parametric norm. 5V DC Electrical Characteristics Unless otherwise specified, all limits ensured for TJ = 25C, V+ = 5V, V- = 0V, V CM = 2.5V, VO = 2.5V and RL > 1M. Boldface limits apply at the temperature extremes. Symbol VOS (1) (2) Parameter Conditions Min (1) Typ (2) Max Input Offset Voltage (LMP2011 only) 0.12 25 60 Input Offset Voltage (LMP2012 only) 0.12 36 60 Offset Calibration Time 0.5 10 12 (1) Units V ms Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method. Typical values represent the most likely parametric norm. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 Submit Documentation Feedback 3 LMP2011, LMP2012 SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 www.ti.com 5V DC Electrical Characteristics (continued) Unless otherwise specified, all limits ensured for TJ = 25C, V+ = 5V, V- = 0V, V CM = 2.5V, VO = 2.5V and RL > 1M. Boldface limits apply at the temperature extremes. Symbol TCVOS Parameter Conditions Min (1) Typ (2) Max (1) Units Input Offset Voltage 0.015 V/C Long-Term Offset Drift 0.006 V/month Lifetime VOS Drift 2.5 V IIN Input Current -3 pA IOS Input Offset Current 6 pA RIND Input Differential Resistance CMRR Common Mode Rejection Ratio PSRR Power Supply Rejection Ratio AVOL Open Loop Voltage Gain VO Output Swing (LMP2011 only) 9 M 100 90 130 dB 95 90 120 dB RL = 10 k 105 100 130 RL = 2 k 95 90 132 4.96 4.95 4.978 -0.3 VCM 3.2 0 VCM 3.2 RL = 10 k to 2.5V VIN(diff) = 0.5V 0.040 RL = 2 k to 2.5V VIN(diff) = 0.5V 4.895 4.875 RL = 10 k to 2.5V VIN(diff) = 0.5V 4.92 4.91 4.875 4.855 Output Current IS Sourcing, VO = 0V VIN(diff) = 0.5V 8 6 15 Sinking, VO = 5V V IN(diff) = 0.5V 8 6 17 Supply Current per Channel V 0.080 0.095 4.919 0.0.91 IO V 0.115 0.140 4.978 0.040 RL = 2 k to 2.5V VIN(diff) = 0.5V V 0.070 0.085 4.919 0.091 Output Swing (LMP2012 only) dB V 0.125 0.150 mA 0.930 1.20 1.50 mA 5V AC Electrical Characteristics TJ = 25C, V+ = 5V, V- = 0V, VCM = 2.5V, VO = 2.5V, and RL > 1M. Boldface limits apply at the temperature extremes. Symbol Parameter Conditions Min (1) Typ (2) Max (1) Units GBW Gain-Bandwidth Product 3 MHz SR Slew Rate 4 V/s m Phase Margin 60 deg Gm Gain Margin -15 dB en Input-Referred Voltage Noise 35 nV/Hz in Input-Referred Current Noise enp-p Input-Referred Voltage Noise trec Input Overload Recovery Time (1) (2) 4 pA/Hz RS = 100, DC to 10 Hz 850 nVpp 50 ms Limits are 100% production tested at 25C. Limits over the operating temperature range are ensured through correlations using statistical quality control (SQC) method. Typical values represent the most likely parametric norm. Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 LMP2011, LMP2012 www.ti.com SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 Typical Performance Characteristics TA=25C, VS= 5V unless otherwise specified. Supply Current vs. Supply Voltage Offset Voltage vs. Supply Voltage Figure 4. Figure 5. Offset Voltage vs. Common Mode Offset Voltage vs. Common Mode Figure 6. Figure 7. Voltage Noise vs. Frequency Input Bias Current vs. Common Mode 500 10000 VS = 5V 400 300 BIAS CURRENT (pA) VOLTAGE NOISE (nV/ Hz) VS = 5V 1000 100 200 100 0 -100 -200 -300 -400 10 0.1 1 10 100 1k 10k 100k 1M -500 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 VCM (V) FREQUENCY (Hz) Figure 8. Figure 9. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 Submit Documentation Feedback 5 LMP2011, LMP2012 SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA=25C, VS= 5V unless otherwise specified. PSRR vs. Frequency PSRR vs. Frequency 120 120 VS = 2.7V 100 80 VCM = 2.5V 100 80 NEGATIVE PSRR (dB) PSRR (dB) VS = 5V VCM = 1V 60 40 NEGATIVE 60 40 POSITIVE POSITIVE 20 20 0 0 10 100 1k 10k 100k 1M 10M 10 100 FREQUENCY (Hz) 6 1k 10k 100k 1M Figure 10. Figure 11. Output Sourcing @ 2.7V Output Sourcing @ 5V Figure 12. Figure 13. Output Sinking @ 2.7V Output Sinking @ 5V Figure 14. Figure 15. Submit Documentation Feedback 10M FREQUENCY (Hz) Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 LMP2011, LMP2012 www.ti.com SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 Typical Performance Characteristics (continued) TA=25C, VS= 5V unless otherwise specified. Max Output Swing vs. Supply Voltage Max Output Swing vs. Supply Voltage Figure 16. Figure 17. Min Output Swing vs. Supply Voltage Min Output Swing vs. Supply Voltage Figure 18. Figure 19. CMRR vs. Frequency Open Loop Gain and Phase vs. Supply Voltage 100 140 150.0 VS = 5V VS = 5V 120 80 120.0 PHASE 80 60 90.0 60.0 40 GAIN 30.0 20 40 PHASE () VS = 5V 60 GAIN (dB) CMRR (dB) 100 RL = 1M 0 20 0.0 VS = 2.7V CL = < 20pF VS = 2.7V OR 5V -20 0 10 100 100k 1k FREQUENCY (Hz) 100k 100 Figure 20. 1k 10k 100k 1M -30.0 10M FREQUENCY (Hz) Figure 21. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 Submit Documentation Feedback 7 LMP2011, LMP2012 SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) TA=25C, VS= 5V unless otherwise specified. Open Loop Gain and Phase vs. RL @ 2.7V 100 Open Loop Gain and Phase vs. RL @ 5V 150.0 100 120.0 80 150.0 RL = >1M 80 120.0 PHASE PHASE 60.0 RL = >1M 40 30.0 20 VS = 5V VS = 2.7V 0.0 CL = < 20 pF RL = >1M & 2k 100k 10k 1k RL = 2k CL = < 20 pF 1M 100 100k 10k 1k FREQUENCY (Hz) Figure 23. Open Loop Gain and Phase vs. CL @ 5V 150.0 100 150.0 10pF 10pF 80 120.0 80 120.0 PHASE PHASE 60.0 40 GAIN 30.0 20 CL = 10,50,200 & 500pF 100k 10k 1k 30.0 0.0 VS = 5V, RL = >1M 500pF CL = 10,50,200 & 500pF -20 100 1M 1k 10k 100k FREQUENCY (Hz) -30.0 10M 1M GAIN 0 500pF -20 60.0 500pF 20 0.0 VS = 2.7V, RL = >1M 40 FREQUENCY (Hz) Figure 24. Open Loop Gain and Phase vs. Temperature @ 5V 113 100 113 100 PHASE PHASE 90 -40C -40C 80 90 -40C -40C 68 45 20 85C VS = 2.7V 23 VOUT = 200 mVPP 0 0 RL = >1M GAIN (dB) GAIN 85C 85C 85C 20 VS = 5V VOUT = 200 mVPP 0 RL = >1M 100k 1M -23 10M 23 0 -20 1k 10k FREQUENCY (Hz) Submit Documentation Feedback 100k 1M -23 10M FREQUENCY (Hz) Figure 26. 8 45 25C CL = < 20pF -20 10k GAIN 40 CL = < 20 pF 1k 68 60 PHASE () GAIN (dB) 60 25C -30.0 10M Figure 25. Open Loop Gain and Phase vs. Temperature @ 2.7V 40 90.0 PHASE () 500pF 10pF 60 90.0 GAIN (dB) 10pF PHASE () GAIN (dB) 60 80 1M Figure 22. Open Loop Gain and Phase vs. CL @ 2.7V 100 -30.0 10M -20 FREQUENCY (Hz) 100 0 0.0 RL = >1M & 2k -30.0 10M -20 100 0 RL = 2k PHASE () 0 60.0 RL = >1M GAIN 30.0 20 90.0 PHASE () RL = >1M GAIN (dB) GAIN (dB) GAIN 40 60 90.0 PHASE () RL = 2k 60 Figure 27. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 LMP2011, LMP2012 www.ti.com SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 Typical Performance Characteristics (continued) TA=25C, VS= 5V unless otherwise specified. THD+N vs. AMPL THD+N vs. Frequency 10 10 MEAS FREQ = 1 KHz MEAS BW = 22 KHz VOUT = 2 VPP MEAS BW = 500 kHz RL = 10k RL = 10k 1 AV = +10 1 THD+N (%) THD+N (%) AV = +10 VS = 2.7V 0.1 VS = 2.7V VS = 5V 0.1 VS = 5V VS = 5V VS = 2.7V 0.01 0.1 0.01 1 10 10 100 1k 10k OUTPUT VOLTAGE (VPP) FREQUENCY (Hz) Figure 28. Figure 29. 100k NOISE (200 nV/DIV) 0.1 Hz - 10 Hz Noise vs. Time 1 sec/DIV Figure 30. Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 Submit Documentation Feedback 9 LMP2011, LMP2012 SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 www.ti.com APPLICATION INFORMATION THE BENEFITS OF LMP201X NO 1/f NOISE Using patented methods, the LMP201X eliminates the 1/f noise present in other amplifiers. That noise, which increases as frequency decreases, is a major source of measurement error in all DC-coupled measurements. Low-frequency noise appears as a constantly-changing signal in series with any measurement being made. As a result, even when the measurement is made rapidly, this constantly-changing noise signal will corrupt the result. The value of this noise signal can be surprisingly large. For example: If a conventional amplifier has a flat-band noise level of 10nV/Hz and a noise corner of 10 Hz, the RMS noise at 0.001 Hz is 1V/Hz. This is equivalent to a 0.50 V peak-to-peak error, in the frequency range 0.001 Hz to 1.0 Hz. In a circuit with a gain of 1000, this produces a 0.50 mV peak-to-peak output error. This number of 0.001 Hz might appear unreasonably low, but when a data acquisition system is operating for 17 minutes, it has been on long enough to include this error. In this same time, the LMP201X will only have a 0.21 mV output error. This is smaller by 2.4 x. Keep in mind that this 1/f error gets even larger at lower frequencies. At the extreme, many people try to reduce this error by integrating or taking several samples of the same signal. This is also doomed to failure because the 1/f nature of this noise means that taking longer samples just moves the measurement into lower frequencies where the noise level is even higher. The LMP201X eliminates this source of error. The noise level is constant with frequency so that reducing the bandwidth reduces the errors caused by noise. Another source of error that is rarely mentioned is the error voltage caused by the inadvertent thermocouples created when the common "Kovar type" IC package lead materials are soldered to a copper printed circuit board. These steel-based leadframe materials can produce over 35 V/C when soldered onto a copper trace. This can result in thermocouple noise that is equal to the LMP201X noise when there is a temperature difference of only 0.0014C between the lead and the board! For this reason, the lead-frame of the LMP201X is made of copper. This results in equal and opposite junctions which cancel this effect. The extremely small size of the SOT-23 package results in the leads being very close together. This further reduces the probability of temperature differences and hence decreases thermal noise. OVERLOAD RECOVERY The LMP201X recovers from input overload much faster than most chopper-stabilized op amps. Recovery from driving the amplifier to 2X the full scale output, only requires about 40 ms. Many chopper-stabilized amplifiers will take from 250 ms to several seconds to recover from this same overload. This is because large capacitors are used to store the unadjusted offset voltage. Figure 31. Overload Recovery Test The wide bandwidth of the LMP201X enhances performance when it is used as an amplifier to drive loads that inject transients back into the output. ADCs (Analog-to-Digital Converters) and multiplexers are examples of this type of load. To simulate this type of load, a pulse generator producing a 1V peak square wave was connected to the output through a 10 pF capacitor. (Figure 31) The typical time for the output to recover to 1% of the applied pulse is 80 ns. To recover to 0.1% requires 860ns. This rapid recovery is due to the wide bandwidth of the output stage and large total GBW. NO EXTERNAL CAPACITORS REQUIRED The LMP201X does not need external capacitors. This eliminates the problems caused by capacitor leakage and dielectric absorption, which can cause delays of several seconds from turn-on until the amplifier's error has settled. 10 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 LMP2011, LMP2012 www.ti.com SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 MORE BENEFITS The LMP201X offers the benefits mentioned above and more. It has a rail-to-rail output and consumes only 950 A of supply current while providing excellent DC and AC electrical performance. In DC performance, the LMP201X achieves 130 dB of CMRR, 120 dB of PSRR and 130 dB of open loop gain. In AC performance, the LMP201X provides 3 MHz of gain-bandwidth product and 4 V/s of slew rate. HOW THE LMP201X WORKS The LMP201X uses new, patented techniques to achieve the high DC accuracy traditionally associated with chopper-stabilized amplifiers without the major drawbacks produced by chopping. The LMP201X continuously monitors the input offset and corrects this error. The conventional chopping process produces many mixing products, both sums and differences, between the chopping frequency and the incoming signal frequency. This mixing causes large amounts of distortion, particularly when the signal frequency approaches the chopping frequency. Even without an incoming signal, the chopper harmonics mix with each other to produce even more trash. If this sounds unlikely or difficult to understand, look at the plot (Figure 32), of the output of a typical (MAX432) chopper-stabilized op amp. This is the output when there is no incoming signal, just the amplifier in a gain of -10 with the input grounded. The chopper is operating at about 150 Hz; the rest is mixing products. Add an input signal and the noise gets much worse. Compare this plot with Figure 33 of the LMP201X. This data was taken under the exact same conditions. The auto-zero action is visible at about 30 kHz but note the absence of mixing products at other frequencies. As a result, the LMP201X has very low distortion of 0.02% and very low mixing products. Figure 32. The Output of a Chopper Stabilized Op Amp (MAX432) 10000 VOLTAGE NOISE (nV/ Hz) VS = 5V 1000 100 10 0.1 1 10 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 33. The Output of the LMP2011/LMP2012 Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 Submit Documentation Feedback 11 LMP2011, LMP2012 SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 www.ti.com INPUT CURRENTS The LMP201X's input currents are different than standard bipolar or CMOS input currents in that it appears as a current flowing in one input and out the other. Under most operating conditions, these currents are in the picoamp level and will have little or no effect in most circuits. These currents tend to increase slightly when the common-mode voltage is near the minus supply. (See the typical curves.) At high temperatures such as 85C, the input currents become larger, 0.5 nA typical, and are both positive except when the VCM is near V-. If operation is expected at low common-mode voltages and high temperature, do not add resistance in series with the inputs to balance the impedances. Doing this can cause an increase in offset voltage. A small resistance such as 1 k can provide some protection against very large transients or overloads, and will not increase the offset significantly. PRECISION STRAIN-GAUGE AMPLIFIER This Strain-Gauge amplifier (Figure 34) provides high gain (1006 or ~60 dB) with very low offset and drift. Using the resistors' tolerances as shown, the worst case CMRR will be greater than 108 dB. The CMRR is directly related to the resistor mismatch. The rejection of common-mode error, at the output, is independent of the differential gain, which is set by R3. The CMRR is further improved, if the resistor ratio matching is improved, by specifying tighter-tolerance resistors, or by trimming. 5V + VOUT + R1 R2 10k, 0.1% 2k, 1% R3 R2 R1 2k, 1% 10k, 0.1% 20: Figure 34. Precision Strain Gauge Amplifier Extending Supply Voltages and Output Swing by Using a Composite Amplifier Configuration: In cases where substantially higher output swing is required with higher supply voltages, arrangements like the ones shown in Figure 35 and Figure 36 could be used. These configurations utilize the excellent DC performance of the LMP201X while at the same time allow the superior voltage and frequency capabilities of the LM6171 to set the dynamic performance of the overall amplifier. For example, it is possible to achieve 12V output swing with 300 MHz of overall GBW (AV = 100) while keeping the worst case output shift due to VOS less than 4 mV. The LMP201X output voltage is kept at about mid-point of its overall supply voltage, and its input common mode voltage range allows the V- terminal to be grounded in one case (Figure 35, inverting operation) and tied to a small non-critical negative bias in another (Figure 36, non-inverting operation). Higher closed-loop gains are also possible with a corresponding reduction in realizable bandwidth. Table 1 shows some other closed loop gain possibilities along with the measured performance in each case. 12 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 LMP2011, LMP2012 www.ti.com SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 Figure 35. Composite Amplifier Configuration Table 1. Composite Amplifier Measured Performance AV R1 () R2 () C2 (pF) BW (MHz) SR (V/s) en p-p (mVPP) 50 200 10k 8 3.3 178 37 100 100 10k 10 2.5 174 70 100 1k 100k 0.67 3.1 170 70 500 200 100k 1.75 1.4 96 250 1000 100 100k 2.2 0.98 64 400 In terms of the measured output peak-to-peak noise, the following relationship holds between output noise voltage, en p-p, for different closed-loop gain, AV, settings, where -3 dB Bandwidth is BW: (1) C2 R2 R7, 3.9k 0.01 PF R1 +15V 1N4731A (4.3V) D1 C4 2 7 LMP201X 3 U1 + 4 Input (-0.7V) C5 0.01 PF 3 6 -15V R6 10k +15V R3 20k D2 R4 1N4148 3.9k 7 + LM6171 2 U2 4 6 Output (+2.5V) R5, 1M C3 0.01 PF Figure 36. Composite Amplifier Configuration Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 Submit Documentation Feedback 13 LMP2011, LMP2012 SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 www.ti.com It should be kept in mind that in order to minimize the output noise voltage for a given closed-loop gain setting, one could minimize the overall bandwidth. As can be seen from Equation 1 above, the output noise has a square-root relationship to the Bandwidth. In the case of the inverting configuration, it is also possible to increase the input impedance of the overall amplifier, by raising the value of R1, without having to increase the feed-back resistor, R2, to impractical values, by utilizing a "Tee" network as feedback. See the LMC6442 data sheet (Application Notes section) for more details on this. +5V +5V LMP201X + VIN 430: (0V to 5V Range) +VREF +Input ADC1203X -Input -VREF +2.5V LM9140-2.5 GND 1M Figure 37. AC Coupled ADC Driver LMP201X AS ADC INPUT AMPLIFIER The LMP201X is a great choice for an amplifier stage immediately before the input of an ADC (Analog-to-Digital Converter), whether AC or DC coupled. See Figure 37 and Figure 38. This is because of the following important characteristics: A) Very low offset voltage and offset voltage drift over time and temperature allow a high closed-loop gain setting without introducing any short-term or long-term errors. For example, when set to a closed-loop gain of 100 as the analog input amplifier for a 12-bit A/D converter, the overall conversion error over full operation temperature and 30 years life of the part (operating at 50C) would be less than 5 LSBs. B) Fast large-signal settling time to 0.01% of final value (1.4 s) allows 12 bit accuracy at 100 KHZ or more sampling rate C) No flicker (1/f) noise means unsurpassed data accuracy over any measurement period of time, no matter how long. Consider the following op amp performance, based on a typical low-noise, high-performance commercially-available device, for comparison: Op amp flatband noise = 8nV/Hz 1/f corner frequency = 100 Hz AV = 2000 Measurement time = 100 sec Bandwidth = 2 Hz This example will result in about 2.2 mVPP (1.9 LSB) of output noise contribution due to the op amp alone, compared to about 594 VPP (less than 0.5 LSB) when that op amp is replaced with the LMP201X which has no 1/f contribution. If the measurement time is increased from 100 seconds to 1 hour, the improvement realized by using the LMP201X would be a factor of about 4.8 times (2.86 mVPP compared to 596 V when LMP201X is used) mainly because the LMP201X accuracy is not compromised by increasing the observation time. D) Copper leadframe construction minimizes any thermocouple effects which would degrade low level/high gain data conversion application accuracy (see discussion under The Benefits of the LMP201X section above). E) Rail-to-Rail output swing maximizes the ADC dynamic range in 5-Volt single-supply converter applications. Below are some typical block diagrams showing the LMP201X used as an ADC amplifier (Figure 37 and Figure 38). 14 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 LMP2011, LMP2012 www.ti.com SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 Figure 38. DC Coupled ADC Driver Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 Submit Documentation Feedback 15 LMP2011, LMP2012 SNOSA71K - OCTOBER 2004 - REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision J (March 2013) to Revision K * 16 Page Changed layout of National Data Sheet to TI format .......................................................................................................... 15 Submit Documentation Feedback Copyright (c) 2004-2013, Texas Instruments Incorporated Product Folder Links: LMP2011 LMP2012 PACKAGE OPTION ADDENDUM www.ti.com 1-Nov-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (C) Device Marking (4/5) LMP2011MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMP20 11MA LMP2011MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMP20 11MA LMP2011MF NRND SOT-23 DBV 5 1000 TBD Call TI Call TI -40 to 125 AN1A LMP2011MF/NOPB ACTIVE SOT-23 DBV 5 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AN1A LMP2011MFX/NOPB ACTIVE SOT-23 DBV 5 3000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AN1A LMP2012MA/NOPB ACTIVE SOIC D 8 95 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMP20 12MA LMP2012MAX/NOPB ACTIVE SOIC D 8 2500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 LMP20 12MA LMP2012MM/NOPB ACTIVE VSSOP DGK 8 1000 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AP1A LMP2012MMX/NOPB ACTIVE VSSOP DGK 8 3500 Green (RoHS & no Sb/Br) CU SN Level-1-260C-UNLIM -40 to 125 AP1A (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com (4) 1-Nov-2013 There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. 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Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LMP2011MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMP2011MF SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMP2011MF/NOPB SOT-23 DBV 5 1000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMP2011MFX/NOPB SOT-23 DBV 5 3000 178.0 8.4 3.2 3.2 1.4 4.0 8.0 Q3 LMP2012MAX/NOPB SOIC D 8 2500 330.0 12.4 6.5 5.4 2.0 8.0 12.0 Q1 LMP2012MM/NOPB VSSOP DGK 8 1000 178.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 LMP2012MMX/NOPB VSSOP DGK 8 3500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LMP2011MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMP2011MF SOT-23 DBV 5 1000 210.0 185.0 35.0 LMP2011MF/NOPB SOT-23 DBV 5 1000 210.0 185.0 35.0 LMP2011MFX/NOPB SOT-23 DBV 5 3000 210.0 185.0 35.0 LMP2012MAX/NOPB SOIC D 8 2500 367.0 367.0 35.0 LMP2012MM/NOPB VSSOP DGK 8 1000 210.0 185.0 35.0 LMP2012MMX/NOPB VSSOP DGK 8 3500 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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