PD - 95533 IRF820ASPbF IRF820ALPbF SMPS MOSFET Applications Switch Mode Power Supply (SMPS) l Uninterruptable Power Supply l High speed power switching l Lead-Free l Benefits Low Gate Charge Qg Results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Effective COSS specified (See AN 1001) HEXFET(R) Power MOSFET VDSS RDS(on) max ID 3.0 2.5A 500V l D2 Pak IRF820AS TO-262 IRF820AL Absolute Maximum Ratings ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Parameter Max. Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torqe, 6-32 or M3 screw 2.5 1.6 10 50 0.4 30 3.4 -55 to + 150 Units A W W/C V V/ns C 300 (1.6mm from case ) 10 lbf*in (1.1N*m) Typical SMPS Topologies: l l Two Transistor Forward Half Bridge and Full Bridge Notes through are on page 8 Document Number: 91058 7/20/04 www.vishay.com 1 IRF820AS/LPbF Static @ TJ = 25C (unless otherwise specified) Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient RDS(on) Static Drain-to-Source On-Resistance VGS(th) Gate Threshold Voltage V(BR)DSS IDSS Drain-to-Source Leakage Current IGSS Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Min. 500 --- --- 2.0 --- --- --- --- Typ. --- 0.60 --- --- --- --- --- --- Max. Units Conditions --- V VGS = 0V, ID = 250A --- V/C Reference to 25C, ID = 1mA 3.0 VGS = 10V, ID = 1.5A 4.5 V VDS = VGS, ID = 250A 25 VDS = 500V, VGS = 0V A 250 VDS = 400V, VGS = 0V, TJ = 125C 100 VGS = 30V nA -100 VGS = -30V Dynamic @ TJ = 25C (unless otherwise specified) gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 1.4 --- --- --- --- --- --- --- --- --- --- --- --- --- Avalanche Characteristics Typ. --- --- --- --- 8.1 12 16 13 340 53 2.7 490 15 28 Max. Units Conditions --- S VDS = 50V, ID = 1.5A 17 ID = 2.5A 4.3 nC VDS = 400V 8.5 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 2.5A ns --- RG = 21 --- RD = 97,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V Parameter EAS IAR EAR Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Typ. Max. Units --- --- --- 140 2.5 5.0 mJ A mJ Typ. Max. Units --- --- 2.5 62 C/W Thermal Resistance Parameter RJC RJA Junction-to-Case Junction-to-Ambient ( PCB Mounted, steady-state)* Diode Characteristics IS ISM VSD trr Qrr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Document Number: 91058 Min. Typ. Max. Units Conditions D MOSFET symbol --- --- 2.5 showing the A G integral reverse --- --- 10 S p-n junction diode. --- --- 1.6 V TJ = 25C, IS = 2.5A, VGS = 0V --- 330 500 ns TJ = 25C, IF = 2.5A --- 760 1140 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) www.vishay.com 2 IRF820AS/LPbF 10 10 VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V 1 TOP 0.1 I D , Drain-to-Source Current (A) I D , Drain-to-Source Current (A) TOP 4.5V 20s PULSE WIDTH TJ = 25 C 0.01 0.1 1 10 1 4.5V 20s PULSE WIDTH TJ = 150 C 0.1 100 1 3.0 RDS(on) , Drain-to-Source On Resistance (Normalized) I D , Drain-to-Source Current (A) 10 TJ = 150 C 1 TJ = 25 C 0.1 V DS = 50V 20s PULSE WIDTH 5.0 6.0 7.0 8.0 VGS , Gate-to-Source Voltage (V) Fig 3. Typical Transfer Characteristics Document Number: 91058 100 Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics 0.01 4.0 10 VDS , Drain-to-Source Voltage (V) VDS , Drain-to-Source Voltage (V) 9.0 ID = 2.5A 2.5 2.0 1.5 1.0 0.5 0.0 -60 -40 -20 VGS = 10V 0 20 40 60 80 100 120 140 160 TJ , Junction Temperature ( C) Fig 4. Normalized On-Resistance Vs. Temperature www.vishay.com 3 IRF820AS/LPbF VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd C, Capacitance(pF) 1000 Ciss 100 Coss 10 20 VGS , Gate-to-Source Voltage (V) 10000 ID = 2.5A VDS = 400V VDS = 250V VDS = 100V 15 10 5 Crss 0 1 1 10 100 1000 FOR TEST CIRCUIT SEE FIGURE 13 0 4 VDS, Drain-to-Source Voltage (V) 12 16 Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage 100 10 OPERATION IN THIS AREA LIMITED BY RDS(on) TJ = 150 C ID , Drain Current (A) ISD , Reverse Drain Current (A) 8 QG , Total Gate Charge (nC) 1 TJ = 25 C 0.1 0.4 V GS = 0 V 0.6 0.8 1.0 VSD ,Source-to-Drain Voltage (V) Fig 7. Typical Source-Drain Diode Forward Voltage Document Number: 91058 1.2 10 10us 100us 1 0.1 1ms TC = 25 C TJ = 150 C Single Pulse 10 10ms 100 1000 10000 VDS , Drain-to-Source Voltage (V) Fig 8. Maximum Safe Operating Area www.vishay.com 4 IRF820AS/LPbF 3.0 VGS 2.5 ID , Drain Current (A) RD V DS D.U.T. RG + -VDD 2.0 10V Pulse Width 1 s Duty Factor 0.1 % 1.5 1.0 Fig 10a. Switching Time Test Circuit VDS 0.5 0.0 90% 25 50 75 100 125 TC , Case Temperature ( C) 150 10% VGS Fig 9. Maximum Drain Current Vs. Case Temperature td(on) tr t d(off) tf Fig 10b. Switching Time Waveforms Thermal Response (Z thJC ) 10 D = 0.50 1 0.20 0.10 0.05 0.1 0.02 0.01 PDM t1 SINGLE PULSE (THERMAL RESPONSE) t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJC + TC 0.01 0.00001 0.0001 0.001 0.01 0.1 1 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case Document Number: 91058 www.vishay.com 5 15V DRIVER L VDS D.U.T RG + V - DD IAS 20V 0.01 tp Fig 12a. Unclamped Inductive Test Circuit V(BR)DSS tp A EAS , Single Pulse Avalanche Energy (mJ) IRF820AS/LPbF 300 TOP 250 BOTTOM ID 1.1A 1.6A 2.5A 200 150 100 50 0 25 50 75 100 125 150 Starting TJ , Junction Temperature ( C) I AS Fig 12c. Maximum Avalanche Energy Vs. Drain Current Fig 12b. Unclamped Inductive Waveforms QG QGS QGD 700 VG Charge Fig 13a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. 50K 12V V DSav , Avalanche Voltage ( V ) 10 V 650 600 .2F .3F D.U.T. + V - DS 550 0.0 0.5 1.0 1.5 2.0 2.5 IAV , Avalanche Current ( A) VGS 3mA IG ID Current Sampling Resistors Fig 13b. Gate Charge Test Circuit Document Number: 91058 Fig 12d. Typical Drain-to-Source Voltage Vs. Avalanche Current www.vishay.com 6 IRF820AS/LPbF Peak Diode Recovery dv/dt Test Circuit + D.U.T Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer + - - + RG * * * * Driver Gate Drive P.W. + dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test Period D= - VDD P.W. Period VGS=10V * D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt Re-Applied Voltage Body Diode VDD Forward Drop Inductor Curent Ripple 5% ISD * VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) power MOSFETs Document Number: 91058 www.vishay.com 7 IRF820AS/LPbF D2Pak Package Outline Dimensions are shown in millimeters (inches) D2Pak Part Marking Information (Lead-Free) T H IS IS AN IR F 5 3 0 S W IT H L O T CO D E 8 0 2 4 AS S E M B L E D O N W W 0 2 , 2 0 0 0 IN T H E AS S E M B L Y L IN E "L " IN T E R N AT IO N AL R E CT IF IE R L O GO N ote: "P " in as s em bly lin e po s i tion in dicates "L ead-F r ee" P AR T N U M B E R F 53 0 S AS S E M B L Y L O T CO D E D AT E CO D E Y E AR 0 = 2 0 0 0 W E E K 02 L IN E L OR IN T E R N AT IO N AL R E C T IF IE R L OG O AS S E M B L Y L OT CO D E Document Number: 91058 P AR T N U M B E R F 530 S D AT E C O D E P = D E S IGN AT E S L E AD -F R E E P R O D U C T (O P T IO N AL ) Y E AR 0 = 2 0 0 0 WE E K 02 A = AS S E M B L Y S IT E C O D E www.vishay.com 8 IRF820AS/LPbF TO-262 Package Outline TO-262 Part Marking Information E XAMPLE : T HIS IS AN IR L 3103L L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T HE AS S E MB LY LINE "C" Note: "P" in as s embly line pos ition indicates "L ead-F ree" INT ER NAT IONAL RE CT IF IE R LOGO AS S E MB LY L OT CODE PAR T NU MB ER DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C OR INT E R NAT IONAL R E CT IF IE R LOGO AS S E MB L Y L OT CODE Document Number: 91058 PAR T NU MB ER DAT E CODE P = DE S IGNAT E S L EAD-F R E E PR ODU CT (OPT IONAL ) YE AR 7 = 1997 WE E K 19 A = AS S E MB L Y S IT E CODE www.vishay.com 9 IRF820AS/LPbF D2Pak Tape & Reel Infomation TRR 1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153) FEED DIRECTION 1.85 (.073) 1.60 (.063) 1.50 (.059) 11.60 (.457) 11.40 (.449) 1.65 (.065) 0.368 (.0145) 0.342 (.0135) 24.30 (.957) 23.90 (.941) 15.42 (.609) 15.22 (.601) TRL 10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 4.72 (.136) 4.52 (.178) 16.10 (.634) 15.90 (.626) FEED DIRECTION 13.50 (.532) 12.80 (.504) 27.40 (1.079) 23.90 (.941) 4 330.00 (14.173) MAX. 60.00 (2.362) MIN. NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE. 26.40 (1.039) 24.40 (.961) 3 30.40 (1.197) MAX. 4 Notes: Repetitive rating; pulse width limited by Pulse width 300s; duty cycle 2%. Starting TJ = 25C, L = 45mH Coss eff. is a fixed capacitance that gives the same charging time max. junction temperature. ( See fig. 11 ) RG = 25, IAS = 2.5A. (See Figure 12) ISD 2.5A, di/dt 270A/s, VDD V(BR)DSS, TJ 150C as Coss while VDS is rising from 0 to 80% VDSS Uses IRF820A data and test conditions * When mounted on 1" square PCB ( FR-4 or G-10 Material ). For recommended footprint and soldering techniques refer to application note #AN-994. Data and specifications subject to change without notice. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 07/04 Document Number: 91058 www.vishay.com 10 Legal Disclaimer Notice Vishay Notice The products described herein were acquired by Vishay Intertechnology, Inc., as part of its acquisition of International Rectifier's Power Control Systems (PCS) business, which closed in April 2007. Specifications of the products displayed herein are pending review by Vishay and are subject to the terms and conditions shown below. Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc., or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies. Information contained herein is intended to provide a product description only. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document. 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Document Number: 99901 Revision: 12-Mar-07 www.vishay.com 1