EC1300TS-33.000M EC13 00 Series RoHS Compliant (Pb-free) 3.3V 14 Pin DIP Metal Thru-Hole LVCMOS/TTL Oscillator Frequency Tolerance/Stability 100ppm Maximum Operating Temperature Range 0C to +70C RoHS Pb TS -33.000M Nominal Frequency 33.000MHz Pin 1 Connection Tri-State (High Impedance) Duty Cycle 50 10(%) ELECTRICAL SPECIFICATIONS Nominal Frequency 33.000MHz Frequency Tolerance/Stability 100ppm Maximum (Inclusive of all conditions: Calibration Tolerance at 25C, Frequency Stability over the Operating Temperature Range, Supply Voltage Change, Output Load Change, First Year Aging at 25C, Shock, and Vibration) Aging at 25C 5ppm/year Maximum Operating Temperature Range 0C to +70C Supply Voltage 3.3Vdc 0.3Vdc Input Current 25mA Maximum Output Voltage Logic High (Voh) 2.4Vdc Minimum with TTL Load, 2.7Vdc Minimum with LVCMOS Load Output Voltage Logic Low (Vol) 0.4Vdc Maximum with TTL Load, 0.5Vdc Maximum with LVCMOS Load Rise/Fall Time 6nSec Maximum (10% to 90% of Wavform) Duty Cycle 50 10(%) (Measured at 50% of waveform) Load Drive Capability 15pF LVCMOS Load Maximum Output Logic Type CMOS Pin 1 Connection Tri-State (High Impedance) Tri-State Input Voltage (Vih and Vil) +2.2Vdc Minimum to enable output, +0.8Vdc Maximum to disable output, No connect to enable output. Absolute Clock Jitter 100pSec Maximum One Sigma Clock Period Jitter 25pSec Maximum Start Up Time 10mSec Maximum Storage Temperature Range -55C to +125C ENVIRONMENTAL & MECHANICAL SPECIFICATIONS Fine Leak Test MIL-STD-883, Method 1014, Condition A Gross Leak Test MIL-STD-883, Method 1014, Condition C Lead Integrity MIL-STD-883, Method 2004 Mechanical Shock MIL-STD-202, Method 213, Condition C Resistance to Soldering Heat MIL-STD-202, Method 210 Resistance to Solvents MIL-STD-202, Method 215 Solderability MIL-STD-883, Method 2003 Temperature Cycling MIL-STD-883, Method 1010 Vibration MIL-STD-883, Method 2007, Condition A www.ecliptek.com | Specification Subject to Change Without Notice | Rev Q 2/17/2010 | Page 1 of 7 EC1300TS-33.000M MECHANICAL DIMENSIONS (all dimensions in millimeters) 15.240 0.203 7.620 0.203 0.9 MAX 1 7 14 8 DIA 0.457 0.100 (X4) CONNECTION 1 Tri-State 7 Ground/Case Ground 8 Output 14 Supply Voltage LINE MARKING 5.08 MIN 5.08 MAX 13.2 MAX PIN MARKING ORIENTATION 1 ECLIPTEK 2 EC13TS EC13=Product Series 3 33.000M 4 XXYZZ XX=Ecliptek Manufacturing Code Y=Last Digit of the Year ZZ=Week of the Year 20.8 MAX CLOCK OUTPUT TRI-STATE INPUT OUTPUT WAVEFORM & TIMING DIAGRAM VIH VIL VOH 90% or 2.4VDC OUTPUT DISABLE (HIGH IMPEDANCE STATE) 50% or 1.4VDC 10% or 0.4VDC VOL tPLZ Fall Time Rise Time tPZL TW T Duty Cycle (%) = TW/T x 100 www.ecliptek.com | Specification Subject to Change Without Notice | Rev Q 2/17/2010 | Page 2 of 7 EC1300TS-33.000M Test Circuit for TTL Output Output Load Drive Capability RL Value (Ohms) CL Value (pF) 10TTL 5TTL 2TTL 10LSTTL 1TTL 390 780 1100 2000 2200 15 15 6 15 3 Oscilloscope Table 1: RL Resistance Value and CL Capacitance Value Vs. Output Load Drive Capability + + Power Supply _ Current Meter _ Supply Voltage (VDD) Frequency Counter Probe (Note 2) RL (Note 4) Output + Voltage Meter _ + 0.01F (Note 1) 0.1F (Note 1) Ground CL (Note 3) Power Supply _ No Connect or Tri-State Note 1: An external 0.1F low frequency tantalum bypass capacitor in parallel with a 0.01F high frequency ceramic bypass capacitor close to the package ground and VDD pin is required. Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth (>300MHz) passive probe is recommended. Note 3: Capacitance value CL includes sum of all probe and fixture capacitance. Note 4: Resistance value RL is shown in Table 1. See applicable specification sheet for 'Load Drive Capability'. Note 5: All diodes are MMBD7000, MMBD914, or equivalent. www.ecliptek.com | Specification Subject to Change Without Notice | Rev Q 2/17/2010 | Page 3 of 7 EC1300TS-33.000M Test Circuit for CMOS Output Frequency Counter Oscilloscope + + Power Supply _ Current Meter _ Supply Voltage (VDD) Probe (Note 2) Output + Voltage Meter _ 0.01F (Note 1) 0.1F (Note 1) Ground CL (Note 3) No Connect or Tri-State Note 1: An external 0.1F low frequency tantalum bypass capacitor in parallel with a 0.01F high frequency ceramic bypass capacitor close to the package ground and VDD pin is required. Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth (>300MHz) passive probe is recommended. Note 3: Capacitance value CL includes sum of all probe and fixture capacitance. www.ecliptek.com | Specification Subject to Change Without Notice | Rev Q 2/17/2010 | Page 4 of 7 EC1300TS-33.000M Recommended Solder Reflow Methods Critical Zone TL to T P Temperature (T) TP Ramp-up Ramp-down TL TS Max TS Min tL t S Preheat t 25C to Peak tP Time (t) High Temperature Solder Bath (Wave Solder) TS MAX to TL (Ramp-up Rate) Preheat - Temperature Minimum (TS MIN) - Temperature Typical (TS TYP) - Temperature Maximum (TS MAX) - Time (tS MIN) Ramp-up Rate (TL to TP) Time Maintained Above: - Temperature (TL) - Time (tL) Peak Temperature (TP) Target Peak Temperature (TP Target) Time within 5C of actual peak (tp) Ramp-down Rate Time 25C to Peak Temperature (t) Moisture Sensitivity Level Additional Notes 3C/second Maximum 150C 175C 200C 60 - 180 Seconds 3C/second Maximum 217C 60 - 150 Seconds 260C Maximum for 10 Seconds Maximum 250C +0/-5C 20 - 40 seconds 6C/second Maximum 8 minutes Maximum Level 1 Temperatures shown are applied to back of PCB board and device leads only. Do not use this method for product with the Gull Wing option. www.ecliptek.com | Specification Subject to Change Without Notice | Rev Q 2/17/2010 | Page 5 of 7 EC1300TS-33.000M Recommended Solder Reflow Methods Critical Zone TL to T P Temperature (T) TP Ramp-up Ramp-down TL TS Max TS Min tL t S Preheat t 25C to Peak tP Time (t) Low Temperature Infrared/Convection 185C TS MAX to TL (Ramp-up Rate) Preheat - Temperature Minimum (TS MIN) - Temperature Typical (TS TYP) - Temperature Maximum (TS MAX) - Time (tS MIN) Ramp-up Rate (TL to TP) Time Maintained Above: - Temperature (TL) - Time (tL) Peak Temperature (TP) Target Peak Temperature (TP Target) Time within 5C of actual peak (tp) Ramp-down Rate Time 25C to Peak Temperature (t) Moisture Sensitivity Level Additional Notes 5C/second Maximum N/A 150C N/A 60 - 120 Seconds 5C/second Maximum 150C 200 Seconds Maximum 185C Maximum 185C Maximum 2 Times 10 seconds Maximum 2 Times 5C/second Maximum N/A Level 1 Temperatures shown are applied to body of device. Use this method only for product with the Gull Wing option. www.ecliptek.com | Specification Subject to Change Without Notice | Rev Q 2/17/2010 | Page 6 of 7 EC1300TS-33.000M Recommended Solder Reflow Methods Critical Zone TL to T P Temperature (T) TP Ramp-up Ramp-down TL TS Max TS Min tL t S Preheat t 25C to Peak tP Time (t) Low Temperature Solder Bath (Wave Solder) TS MAX to TL (Ramp-up Rate) Preheat - Temperature Minimum (TS MIN) - Temperature Typical (TS TYP) - Temperature Maximum (TS MAX) - Time (tS MIN) Ramp-up Rate (TL to TP) Time Maintained Above: - Temperature (TL) - Time (tL) Peak Temperature (TP) Target Peak Temperature (TP Target) Time within 5C of actual peak (tp) Ramp-down Rate Time 25C to Peak Temperature (t) Moisture Sensitivity Level Additional Notes 5C/second Maximum N/A 150C N/A 30 - 60 Seconds 5C/second Maximum 150C 200 Seconds Maximum 245C Maximum 245C Maximum 1 Time / 235C Maximum 2 Times 5 seconds Maximum 1 Time / 15 seconds Maximum 2 Times 5C/second Maximum N/A Level 1 Temperatures shown are applied to back of PCB board and device leads only. Do not use this method for product with the Gull Wing option. Low Temperature Manual Soldering 185C Maximum for 10 seconds Maximum, 2 times Maximum. (Temperatures listed are applied to device leads only. This method can be utilized with both Gull Wing and Non-Gull Wing devices.) High Temperature Manual Soldering 260C Maximum for 5 seconds Maximum, 2 times Maximum. (Temperatures listed are applied to device leads only. This method can be utilized with both Gull Wing and Non-Gull Wing devices.) www.ecliptek.com | Specification Subject to Change Without Notice | Rev Q 2/17/2010 | Page 7 of 7