MCC56-18io8B
Phase leg
Thyristor Module
3 1 2
6 5
Part number
MCC56-18io8B
Backside: isolated
TAV
T
VV1.24
RRM
60
1800
=
V= V
I= A
2x
Features / Ad vantages: Applications: Package:
Thyristor for line frequency
Planar passivated chip
Long-term stability
Direct Copper Bonded Al2O3-ceramic
Line rectifying 50/60 Hz
Softstart AC motor control
DC Motor control
Power converter
AC power control
Lighting and temperature control
TO-240AA
Industry standard outline
RoHS compliant
Soldering pins for PCB mounting
Base plate: DCB ceramic
Reduced weight
Advanced power cycling
Isolation Voltage: V~
3600
IXYS reserves the right to change limits, conditions and dimensions. 20130605aData according to IEC 60747and per semiconductor unless otherwise specified
© 2013 IXYS all rights reserved
MCC56-18io8B
V = V
kA²s
kA²s
kA²s
kA²s
Symbol Definition
Ratings
typ. max.
I
V
IA
V
T
1.26
R0.45 K/W
min.
60
VV
200T = 25°C
VJ
T = °C
VJ
mA5V = V
T = 25°C
VJ
I = A
T
V
T = °C
C
85
P
tot
222 WT = 25°C
C
100
1800
forward voltage drop
total power dissipation
Conditions Unit
1.57
T = 25°C
VJ
125
V
T0
V0.85T = °C
VJ
125
r
T
3.7 m
V1.24T = °C
VJ
I = A
T
V
100
1.62
I = A200
I = A200
threshold voltage
slope resistance for power loss calculation only
µA
125
VV1800T = 25°C
VJ
IA100
P
GM
Wt = 30 µs 10
max. gate power dissipation
P
T = °C
C
125
Wt = 5
P
P
GAV
W0.5
average gate power dissipation
C
J
74
j
unction capacitance V = V400 T = 25°Cf = 1 MHz
RVJ
pF
I
TSM
t = 10 ms; (50 Hz), sine T = 45°C
VJ
max. forward surge current
T = °C
VJ
125
I²t T = 45°C
value for fusing
T = °C125
V = 0 V
R
V = 0 V
R
V = 0 V
V = 0 V
t = 8,3 ms; (60 Hz), sine
t = 10 ms; (50 Hz), sine
t = 8,3 ms; (60 Hz), sine
t = 10 ms; (50 Hz), sine
t = 8,3 ms; (60 Hz), sine
t = 10 ms; (50 Hz), sine
t = 8,3 ms; (60 Hz), sine
VJ
R
VJ
R
thJC
thermal resistance junction to case
T = °C
VJ
125
1.50
1.62
8.13
7.87
kA
kA
kA
kA
1.28
1.38
11.3
10.9
1800
300 µs
RMS forward current
T(RMS)
TAV
180° sine
average forward current
(di/dt)
cr
A/µs
150repetitive, I =T
VJ
= 125°C; f = 50 Hz
critical rate of rise of current
V
GT
gate trigger voltage V= 6 V T = °C25
(dv/dt) T=125°C
critical rate of rise of voltage
A/µs500
V/µs
t = µs;
IA;V = V
R = ; method 1 (linear voltage rise)
VJ
DVJ
150 A
T
P
G
=0.45
di /dt A/µs;
G
=0.45
DDRM
cr
V = V
D DRM
GK
1000
1.5 V
T= °C-40
VJ
I
GT
gate trigger current V= 6 V T = °C25
DVJ
100 mA
T= °C-40
VJ
1.6 V
200 mA
V
GD
gate non-trigger voltage T= °C
VJ
0.2 V
I
GD
gate non-trigger current 10 mA
V = V
D DRM
125
latching current T= °C
VJ
450 mAI
L
25s
p
=10
IA;
G
= 0.45 di /dt A/µs
G
=0.45
holding current T= °C
VJ
200 mAI
H
25V= 6 V
D
R =
GK
gate controlled delay tim e T= °C
VJ
st
gd
25
IA;
G
= 0.45 di /dt A/µs
G
=0.45
V = ½ V
D DRM
turn-off time T= °C
VJ
150 µst
q
di/dt = A/µs;10 dv/dt = V/µs;20
V =
R
100 V; I A;
T
= 150 V = V
D DRM
tµs
p
= 200
non-repet., I = 60 A
T
125
R
thCH
thermal resistance case to heatsink K/W
Thyristor
1900
RRM/DRM
RSM/DSM
max. non-repetitive reverse/forward blocking voltage
max. re pe titive reverse/forward bl ocking volt a ge
R/D
reverse current, drain current
T
T
R/D
R/D
200
0.20
IXYS reserves the right to change limits, conditions and dimensions. 20130605aData according to IEC 60747and per semiconductor unless otherwise specified
© 2013 IXYS all rights reserved
MCC56-18io8B
Ratings
Package
T
VJ
°C
M
D
Nm4
mounting torque 2.5
T
stg
°C125
storage temperature -40
Weight g90
Symbol Definition typ. max.min.Conditions
virt ua l j un ctio n temp eratu re
Unit
M
T
Nm4
terminal torque 2.5
VV
t = 1 second
V
t = 1 minute
isolation voltage
mm
mm
13.0 9.7
16.0 16.0
d
Spp/App
creepage distance on surface | striking distance through air
d
Spb/Apb
terminal to backside
I
RMS
RMS current 200 A
per terminal
125-40
terminal to terminal
TO-240AA
Delivery Mode Quantity Code No.Part Number Marking on ProductOrdering
50/60 Hz, RMS; I 1 mA
ISOL
MCC56-18io8B 454559Box 6MCC56-18io8BStandard
3000
3600
ISOL
threshold voltage V0.85
m
V
0 max
R
0 max
slope resistance * 2.5
Equivalent Circuits for Simulation
T =
VJ
IV
0
R
0
Thyristor
125 °C
* on die level
IXYS reserves the right to change limits, conditions and dimensions. 20130605aData according to IEC 60747and per semiconductor unless otherwise specified
© 2013 IXYS all rights reserved
MCC56-18io8B
3 1 2
6 5
Outlines TO-240AA
IXYS reserves the right to change limits, conditions and dimensions. 20130605aData according to IEC 60747and per semiconductor unless otherwise specified
© 2013 IXYS all rights reserved
MCC56-18io8B
I
TSM
I
FSM
[A]
t [s]
Fig. 1 Surge overload current
I
TSM
, I
FSM
: Crest value, t: duration
t [ms]
I
2
t
[A
2
s]
Fig. 2 I
2
t versus time (1-10 ms) Fig. 3 Maximum forward current
at case temperature
I
TAVM
[A]
T
C
[°C]
1500
1000
500
0
10
-3
10
-2
10
-1
10
0
10
1
T
VJ
= 45°C
T
VJ
=
125°C
50 Hz, 80% V
RRM
V
R
= 0 V
10
5
10
3
1236810
T
VJ
= 45°C
T
VJ
= 125°C
10
4
120
80
60
40
20
0
0 50 100 150
DC
180° sin
120°
60°
30°
100
Fig. 4 Power dissipation vs. onstate current and ambient temperature (per thyristor/diode)
DC
180° sin
120°
60°
30°
050100150
T
A
[°C]I
TAVM
, I
FAVM
[A]
020 40 60 80
150
100
50
0
P
T
[W]
R
thJA
[K/W]
0.8
1
1.2
1.5
2
2.5
3
4
Fig. 6 Three phase rectifier bridge: Power dissipation versus direct output current
and ambient temperature
R
thKA
[K/W]
0.1
0.15
0.2
0.25
0.3
0.4
0.5
0.6
0 50 100 150
T
A
[°C]I
dAVM
[A]
050100
P
tot
[W]
100
0
200
300
400
600
Circuit
B6
3x MCC56 or
3x MCD56
500
150
I
G
[mA]
V
G
[V]
Fig. 5 Gate trigger charact.
10
0
10
1
10
2
10
3
10
4
0.1
1
10
1: I
GT
,T
VJ
=125°C
2: I
GT
,T
VJ
=25°C
3: I
GT
,T
VJ
=-40°C
4: P
GAV
=0.5W
5: P
GM
=5W
6: P
GM
=10W
I
GD
,T
VJ
=125°C
3
4
2
156
10 100 1000
1
10
100
1000
Limit
typ.
T
VJ
=25°C
I
G
[mA]
t
gd
s]
Fig. 7 Gate trigger delay time
Thyristor
IXYS reserves the right to change limits, conditions and dimensions. 20130605aData according to IEC 60747and per semiconductor unless otherwise specified
© 2013 IXYS all rights reserved
MCC56-18io8B
I
RMS
[A]
P
tot
[W]
T
A
[°C]
[KW]
0.1
0.15
0.2
0.25
0.3
0.4
0.5
Circuit
W3
3x MCC56 or
3x MCD56
600
300
200
100
0
400
0 50 100 0 50 100 150
Fig. 8 Three phase AC-controller: Power dissipation vs. RMS output current
and ambient temperature
R
thJA
500
0.6
Fig. 9
T
ransient thermal impedance junction to case (per thyristor)
0.6
0.5
0.1
0
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
0.3
30°
60°
120°
180°
DC
0.2
0.4
30°
60°
120°
180°
DC
Fig. 10 Transient thermal impedance junction to heatsink (per thyristor)
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
0.8
0.6
0.2
0
0.4
R
thJC
for various conduction angles d:
DC 0.450
180° 0.470
120° 0.490
60° 0.505
30° 0.520
Constants for Z
thJC
calculation:
1 0.014 0.0150
2 0.026 0.0095
3 0.410 0.1750
R
thJK
for various conduction angles d:
DC 0.650
180° 0.670
120° 0.690
60° 0.705
30° 0.720
Constants for Z
thJC
calculation:
1 0.014 0.0150
2 0.026 0.0095
3 0.410 0.1750
4 0.200 0.6700
Thyristor
IXYS reserves the right to change limits, conditions and dimensions. 20130605aData according to IEC 60747and per semiconductor unless otherwise specified
© 2013 IXYS all rights reserved