1
LT1211/LT1212
FEATURES
APPLICATIO S
U
DESCRIPTIO
U
TYPICAL APPLICATIO
U
14MHz, 7V/µs, Single Supply
Dual and Quad
Precision Op Amps
■
Slew Rate: 7V/
µ
s Typ
■
Gain-Bandwidth Product: 14MHz Typ
■
Fast Settling to 0.01%
2V Step to 200µV: 900ns Typ
10V Step to 1mV: 2.2µs Typ
■
Excellent DC Precision in All Packages
Input Offset Voltage: 275µV Max
Input Offset Voltage Drift: 6µV/°C Max
Input Offset Current: 30nA Max
Input Bias Current: 125nA Max
Open-Loop Gain: 1200V/mV Min
■
Single Supply Operation
Input Voltage Range Includes Ground
Output Swings to Ground While Sinking Current
■
Low Input Noise Voltage: 12nV/√Hz Typ
■
Low Input Noise Current: 0.2pA/√Hz Typ
■
Specified on 3.3V, 5V and ±15V
■
Large Output Drive Current: 20mA Min
■
Low Supply Current per Amplifier: 1.8mA Max
■
Dual in 8-Pin DIP and SO-8
■
Quad in 14-Pin DIP and Narrow SO-16
The LT
®
1211 is a dual, single supply precision op amp with
a 14MHz gain-bandwidth product and a 7V/µs slew rate.
The LT1212 is a quad version of the same amplifier. The
DC precision of the LT1211/LT1212 eliminates trims in
most systems while providing high frequency perfor-
mance not usually found in single supply amplifiers.
The LT1211/LT1212 will operate on any supply greater
than 2.5V and less than 36V total. These amplifiers are
specified on single 3.3V, single 5V and ±15V supplies, and
only require 1.3mA of quiescent supply current per ampli-
fier. The inputs can be driven beyond the supplies without
damage or phase reversal of the output. The minimum
output drive is 20mA, ideal for driving low impedance
loads.
Note: For applications requiring higher slew rate, see the LT1213/LT1214 and
LT1215/LT1216 data sheets.
Input Bias Current Cancellation
–
+
V
IN
V
+
1/2
LT1211
R
F
V
OUT
1211/12 TA01
1M
SIGNAL AMP
–
+
1/2
LT1211
R
G
CANCELLATION
AMP
1M
22pF
, LTC and LT are registered trademarks of Linear Technology Corporation.
■
2.5V Full-Scale 12-Bit Systems: V
OS
≤ 0.45LSB
■
10V Full-Scale 16-Bit Systems: V
OS
≤ 1.8LSB
■
Active Filters
■
Photo Diode Amplifiers
■
DAC Current-to-Voltage Amplifiers
■
Battery-Powered Systems
INPUT VOLTAGE (V)
0.01
INPUT CURRENT (nA)
0.1 1 10
1211/12 TA02
100
90
80
70
60
50
40
30
20
10
0
VS = 5V, VOUT IN
LINEAR REGION
RIN = 300M
RIN = 2.4G
WITHOUT CANCELLATION
WITH CANCELLATION
Input Current vs Input Voltage
2
LT1211/LT1212
A
U
G
W
A
W
U
W
ARBSOLUTEXI T
IS
Total Supply Voltage (V
+
to V
–
) ............................. 36V
Input Current ..................................................... ±15mA
Output Short-Circuit Duration (Note 2)........ Continuous
Operating Temperature Range
LT1211C/LT1212C ............................ –40°C to 85°C
LT1211I/LT1212I............................... –40°C to 85°C
LT1211M (OBSOLETE) ............... –55°C to 125°C
Specified Temperature Range
LT1211C/LT1212C/
LT1211I/LT1212I (Note 6)................... –40°C to 85°C
LT1211M (OBSOLETE) ............... –55°C to 125°C
Storage Temperature Range ................ –65°C to 150°C
Junction Temperature (Note 3)
Plastic Package (N8, S8, N, S) ........................ 150°C
Ceramic Package (J8) (OBSOLETE)................. 175°C
Lead Temperature (Soldering, 10 sec)................. 300°C
PACKAGE
NUMBER OF MAX TC V
OS
CERAMIC (J) PLASTIC DIP SURFACE MOUNT
OP AMPS T
A
RANGE MAX V
OS
(25°C) (∆V
OS
/∆T) OBSOLETE (N) (S)
Two (Dual) –40°C to 85°C 150µV 1.5µV/°C LT1211ACN8
275µV3µV/°C LT1211CN8,
LT1211IN8
275µV6µV/°C LT1211CS8,
LT1211IS8
AVAILABLE OPTIO S
U
WU
U
PACKAGE/ORDER I FOR ATIO
LT1211CN8
LT1211ACN8
LT1211IN8
LT1211MJ8
LT1211AMJ8 1211
1211I
LT1212CS
LT1212IS
TJMAX = 150°C, θJA = 100°C/W
TJMAX = 150°C, θJA = 70°C/W
TJMAX = 150°C, θJA = 150°C/W
LT1212CN
LT1212IN
LT1211CS8
LT1211IS8
ORDER PART
NUMBER
ORDER PART
NUMBER
ORDER PART
NUMBER
S8 PART MARKING
ORDER PART
NUMBER
1
2
3
4
8
7
6
5
S8 PACKAGE
8-LEAD PLASTIC SO
1
2
3
4
TOP VIEW
B
A
OUT A
–IN A
+IN A
V
–
V
+
OUT B
–IN B
+IN B
TOP VIEW
S PACKAGE
16-LEAD PLASTIC SO
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
OUT A
–IN A
+IN A
V
+
+IN B
–IN B
OUT B
NC
OUT D
–IN D
+IN D
V
–
+IN C
–IN C
OUT C
NC
A
C
B
D
N8 PACKAGE
8-LEAD PDIP
J8 PACKAGE
8-LEAD CERDIP
1
2
3
4
8
7
6
5
TOP VIEW
OUT A
–IN A
+IN A
V
–
V
+
OUT B
–IN B
+IN B
B
A
OUT A
–IN A
+IN A
V
+
+IN B
–IN B
OUT B
OUT D
–IN D
+IN D
V
–
+IN C
–IN C
OUT C
1
2
3
4
5
6
7
14
13
12
11
10
9
8
D
A
C
B
N PACKAGE
14-LEAD PDIP
TOP VIEW
(Note 1)
OBSOLETE PACKAGE
TJMAX = 150°C, θJA = 100°C/W (N)
TJMAX = 175°C, θJA = 100°C/W (J)
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consider the N8 Package for Alternate Source
3
LT1211/LT1212
VS = 5V, VCM = 0.5V, VOUT = 0.5V, TA = 25°C, unless otherwise noted.
LT1211AC LT1211C/LT1211M
LT1211AM LT1212C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 75 150 100 275 µV
∆V
OS
Long-Term Input Offset 0.5 0.6 µV/Mo
∆Time Voltage Stability
I
OS
Input Offset Current 5 20 5 30 nA
I
B
Input Bias Current 50 100 60 125 nA
Input Noise Voltage 0.1Hz to 10Hz 250 250 nV
P-P
e
n
Input Noise Voltage Density f
O
= 10Hz 12.5 12.5 nV/√Hz
f
O
= 1000Hz 12.0 12.0 nV/√Hz
i
n
Input Noise Current Density f
O
= 10Hz 0.9 0.9 pA/√Hz
f
O
= 1000Hz 0.2 0.2 pA/√Hz
Input Resistance (Note 4) Differential Mode 10 40 10 40 MΩ
Common Mode 500 500 MΩ
Input Capacitance f = 1MHz 10 10 pF
Input Voltage Range 3.5 3.8 3.5 3.8 V
0 –0.3 0 –0.3 V
CMRR Common Mode Rejection Ratio V
CM
= 0V to 3.5V 90 105 86 102 dB
PSRR Power Supply Rejection Ratio V
S
= 2.5V to 12.5V 90 115 87 110 dB
A
VOL
Large-Signal Voltage Gain V
O
= 0.05V to 3.7V, R
L
= 500Ω250 560 250 560 V/mV
Maximum Output Voltage Swing Output High, No Load 4.30 4.40 4.30 4.40 V
(Note 5) Output High, I
SOURCE
= 1mA 4.20 4.30 4.20 4.30 V
Output High, I
SOURCE
= 15mA 3.85 4.00 3.85 4.00 V
Output Low, No Load 0.003 0.006 0.003 0.006 V
Output Low, I
SINK
= 1mA 0.047 0.065 0.047 0.065 V
Output Low, I
SINK
= 15mA 0.362 0.500 0.362 0.500 V
I
O
Maximum Output Current (Note 10) ±20 ±50 ±20 ±50 mA
SR Slew Rate A
V
= –2 4 4 V/µs
GBW Gain-Bandwidth Product f = 100kHz 13 13 MHz
I
S
Supply Current per Amplifier 0.9 1.3 1.8 0.9 1.3 1.8 mA
Minimum Supply Voltage Single Supply 2.2 2.5 2.2 2.5 V
Full Power Bandwidth A
V
= 1, V
O
= 2.5V
P-P
300 300 kHz
t
r
, t
f
Rise Time, Fall Time A
V
= 1, 10% to 90%, V
O
= 100mV 45 45 ns
OS Overshoot A
V
= 1, V
O
= 100mV 25 25 %
t
PD
Propagation Delay A
V
= 1, V
O
= 100mV 36 36 ns
t
S
Settling Time 0.01%, A
V
= 1, ∆V
O
= 2V 900 900 ns
Open-Loop Output Resistance I
O
= 0mA, f = 5MHz 75 75 Ω
THD Total Harmonic Distortion A
V
= 1, V
O
= 1V
RMS
, 20Hz to 20kHz 0.001 0.001 %
PACKAGE
NUMBER OF MAX TC V
OS
CERAMIC (J) PLASTIC DIP SURFACE MOUNT
OP AMPS T
A
RANGE MAX V
OS
(25°C) (∆V
OS
/∆T) OBSOLETE (N) (S)
Two (Dual) –55°C to 125°C 150µV 1.5µV/°C LT1211AMJ8
275µV3µV/°C LT1211MJ8
Four (Quad) –40°C to 85°C 275µV6µV/°C LT1212CN, LT1212CS,
LT1212IN LT1212IS
AVAILABLE OPTIO S
U
5V
ELECTRICAL C CHARA TERISTICS
4
LT1211/LT1212
5V
ELECTRICAL C CHARA TERISTICS
VS = 5V, VCM = 0.5V, VOUT = 0.5V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
LT1211AC LT1211C/LT1212C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 100 175 150 375 µV
∆V
OS
Input Offset Voltage Drift 8-Pin DIP Package 0.7 1.5 1 3 µV/°C
∆T(Note 4) 14-Pin DIP, SOIC Package 2 6 µV/°C
I
OS
Input Offset Current 5 25 10 35 nA
I
B
Input Bias Current 60 110 70 135 nA
Input Voltage Range 3.4 3.5 3.4 3.5 V
0.1 –0.1 0.1 –0.1 V
CMRR Common Mode Rejection Ratio V
CM
= 0.1V to 3.4V 89 105 85 102 dB
PSRR Power Supply Rejection Ratio V
S
= 2.5V to 12.5V 89 114 86 110 dB
A
VOL
Large-Signal Voltage Gain V
O
= 0.05V to 3.7V, R
L
= 500Ω150 430 150 430 V/mV
Maximum Output Voltage Swing Output High, No Load 4.20 4.33 4.20 4.33 V
(Note 5) Output High, I
SOURCE
= 1mA 4.10 4.23 4.10 4.23 V
Output High, I
SOURCE
= 10mA 3.90 4.03 3.90 4.03 V
Output Low, No Load 0.004 0.007 0.004 0.007 V
Output Low, I
SINK
= 1mA 0.052 0.070 0.052 0.070 V
Output Low, I
SINK
= 10mA 0.290 0.400 0.290 0.400 V
I
S
Supply Current per Amplifier 0.8 1.4 2.1 0.8 1.4 2.1 mA
VS = 5V, VCM = 0.5V, VOUT = 0.5V, –40°C ≤ TA ≤ 85°C, unless otherwise noted. (Note 6)
LT1211C/LT1212C
LT1211AC LT1211I/LT1212I
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 120 200 175 500 µV
∆V
OS
Input Offset Voltage Drift 8-Pin DIP Package 0.7 1.5 1 3 µV/°C
∆T(Note 4) 14-Pin DIP, SOIC Package 2 6 µV/°C
I
OS
Input Offset Current 10 30 20 50 nA
I
B
Input Bias Current 70 120 80 145 nA
Input Voltage Range 3.1 3.2 3.1 3.2 V
0.2 0 0.2 0 V
CMRR Common Mode Rejection Ratio V
CM
= 0.2V to 3.1V 88 104 84 101 dB
PSRR Power Supply Rejection Ratio V
S
= 2.5V to 12.5V 88 113 85 109 dB
A
VOL
Large-Signal Voltage Gain V
O
= 0.05V to 3.7V, R
L
= 500Ω100 390 100 390 V/mV
Maximum Output Voltage Swing Output High, No Load 4.15 4.25 4.15 4.25 V
(Note 5) Output High, I
SOURCE
= 1mA 4.00 4.16 4.00 4.16 V
Output High, I
SOURCE
= 10mA 3.80 3.96 3.80 3.96 V
Output Low, No Load 0.005 0.008 0.005 0.008 V
Output Low, I
SINK
= 1mA 0.053 0.075 0.053 0.075 V
Output Low, I
SINK
= 10mA 0.300 0.420 0.300 0.420 V
I
S
Supply Current per Amplifier 0.7 1.5 2.2 0.7 1.5 2.2 mA
5
LT1211/LT1212
5V
ELECTRICAL C CHARA TERISTICS
VS = 5V, VCM = 0.5V, VOUT = 0.5V, –55°C ≤ TA ≤ 125°C, unless otherwise noted.
LT1211AM LT1211M
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 140 250 200 500 µV
∆V
OS
Input Offset Voltage Drift 0.7 1.5 1 3 µV/°C
∆T(Note 4)
I
OS
Input Offset Current 15 40 25 75 nA
I
B
Input Bias Current 75 130 85 160 nA
Input Voltage Range 3.1 3.2 3.1 3.2 V
0.4 0.2 0.4 0.2 V
CMRR Common Mode Rejection Ratio V
CM
= 0.4V to 3.1V 87 104 81 101 dB
PSRR Power Supply Rejection Ratio V
S
= 2.5V to 12.5V 87 113 84 109 dB
A
VOL
Large-Signal Voltage Gain V
O
= 0.05V to 3.7V, R
L
= 500Ω100 250 100 250 V/mV
Maximum Output Voltage Swing Output High, No Load 4.10 4.20 4.10 4.20 V
(Note 5) Output High, I
SOURCE
= 1mA 3.95 4.10 3.95 4.10 V
Output High, I
SOURCE
= 10mA 3.70 3.90 3.70 3.90 V
Output Low, No Load 0.007 0.010 0.007 0.010 mV
Output Low, I
SINK
= 1mA 0.060 0.085 0.060 0.085 mV
Output Low, I
SINK
= 10mA 0.350 0.500 0.350 0.500 mV
I
S
Supply Current per Amplifier 0.5 1.7 2.5 0.5 1.7 2.5 mA
VS = ±15V, VCM = 0V, VOUT = 0V, TA = 25°C, unless otherwise noted.
LT1211AC LT1211C/LT1211M
LT1211AM LT1212C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 125 400 150 550 µV
I
OS
Input Offset Current 5 20 5 30 nA
I
B
Input Bias Current 45 95 50 120 nA
Input Voltage Range 13.5 13.8 13.5 13.8 V
–15.0 –15.3 –15.0 – 15.3 V
CMRR Common Mode Rejection Ratio V
CM
= –15V to 13.5V 90 105 86 102 dB
PSRR Power Supply Rejection Ratio V
S
= ±2V to ±18V 90 113 87 110 dB
A
VOL
Large-Signal Voltage Gain V
O
= 0V to ±10V, R
L
= 2k 1200 5000 1200 5000 V/mV
Maximum Output Voltage Swing Output High, I
SOURCE
= 15mA 13.8 14.0 13.8 14.0 V
Output Low, I
SINK
= 15mA –14.4 –14.6 –14.4 –14.6 V
I
O
Maximum Output Current (Note 10) ±20 ±50 ±20 ±50 mA
SR Slew Rate A
V
= –2 (Note 7) 5 7 5 7 V/µs
GBW Gain-Bandwidth Product f = 100kHz 8 14 8 14 MHz
I
S
Supply Current per Amplifier 0.9 1.8 2.5 0.9 1.8 2.5 mA
Channel Separation V
O
= ±10V, R
L
= 2k 128 140 128 140 dB
Minimum Supply Voltage Equal Split Supplies ±1.2 ±2.0 ±1.2 ±2.0 V
Full Power Bandwidth A
V
= 1, V
O
= 20V
P-P
60 60 kHz
Settling Time 0.01%, A
V
= 1, ∆V
O
= 10V 2.2 2.2 µs
+
15V
ELECTRICAL C CHARA TERISTICS
–
6
LT1211/LT1212
VS = ±15V, VCM = 0V, VOUT = 0V, 0°C ≤ TA ≤ 70°C, unless otherwise noted.
+
–
15V
ELECTRICAL C CHARA TERISTICS
LT1211AM LT1211M
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 200 500 300 800 µV
∆V
OS
Input Offset Voltage Drift 0.7 1.5 1 3 µV/°C
∆T(Note 4)
I
OS
Input Offset Current 10 40 10 60 nA
I
B
Input Bias Current 55 110 60 140 nA
Input Voltage Range 13.1 13.2 13.1 13.2 V
–14.6 –14.8 –14.6 –14.8 V
CMRR Common Mode Rejection Ratio V
CM
= –14.6V to 13.1V 87 103 81 100 dB
PSRR Power Supply Rejection Ratio V
S
= ±2V to ±15V 87 111 84 107 dB
A
VOL
Large-Signal Voltage Gain V
O
= 0V to ±10V, R
L
= 2k 800 1500 800 1500 V/mV
Maximum Output Voltage Swing Output High, I
SOURCE
= 10mA 13.6 13.8 13.6 13.8 V
Output Low, I
SINK
= 10mA –14.3 –14.5 –14.3 –14.5 V
I
S
Supply Current per Amplifier 0.5 2.3 3.4 0.5 2.3 3.4 mA
LT1211C/LT1212C
LT1211AC LT1211I/LT1212I
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 175 450 250 700 µV
∆V
OS
Input Offset Voltage Drift 8-Pin DIP Package 0.7 1.5 1 3 µV/°C
∆T(Note 4) 14-Pin DIP, SOIC Package 2 6 µV/°C
I
OS
Input Offset Current 10 25 10 40 nA
I
B
Input Bias Current 55 100 60 130 nA
Input Voltage Range 13.1 13.2 13.1 13.2 V
–14.8 –15.0 –14.8 –15.0 V
CMRR Common Mode Rejection Ratio V
CM
= –14.8V to 13.1V 88 103 84 100 dB
PSRR Power Supply Rejection Ratio V
S
= ±2V to ±18V 88 111 85 107 dB
A
VOL
Large-Signal Voltage Gain V
O
= 0V to ±10V, R
L
= 2k 1000 3000 1000 3000 V/mV
Maximum Output Voltage Swing Output High, I
SOURCE
= 10mA 13.7 13.9 13.7 13.9 V
Output Low, I
SINK
= 10mA –14.5 –14.7 –14.5 –14.7 V
I
S
Supply Current per Amplifier 0.7 2.2 3.0 0.7 2.2 3.0 mA
LT1211AC LT1211C/LT1212C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 150 425 200 650 µV
∆V
OS
Input Offset Voltage Drift 8-Pin DIP Package 0.7 1.5 1 3 µV/°C
∆T(Note 4) 14-Pin DIP, SOIC Package 2 6 µV/°C
I
OS
Input Offset Current 10 20 10 35 nA
I
B
Input Bias Current 55 100 60 125 nA
Input Voltage Range 13.4 13.5 13.4 13.5 V
–14.9 –15.1 –14.9 –15.1 V
CMRR Common Mode Rejection Ratio V
CM
= –14.9V to 13.4V 89 104 85 101 dB
PSRR Power Supply Rejection Ratio V
S
= ±2V to ±18V 89 112 86 108 dB
A
VOL
Large-Signal Voltage Gain V
O
= 0V to ±10V, R
L
= 2k 1000 3500 1000 3500 V/mV
Maximum Output Voltage Swing Output High, I
SOURCE
= 10mA 13.8 14.0 13.8 14.0 V
Output Low, I
SINK
= 10mA –14.5 –14.7 –14.5 –14.7 V
I
S
Supply Current per Amplifier 0.8 2.1 2.9 0.8 2.1 2.9 mA
VS = ±15V, VCM = 0V, VOUT = 0V, –55°C ≤ TA ≤ 125°C, unless otherwise noted.
VS = ±15V, VCM = 0V, VOUT = 0V, –40°C ≤ TA ≤ 85°C, unless otherwise noted. (Note 6)
7
LT1211/LT1212
3.3V
ELECTRICAL C CHARA TERISTICS
VS = 3.3V, VCM = 0.5V, VOUT = 0.5V, TA = 25°C, unless otherwise noted. (Note 8)
LT1211AM LT1211M
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 130 250 200 500 µV
Input Voltage Range (Note 9) 1.4 1.5 1.4 1.5 V
0.4 0.2 0.4 0.2 V
Maximum Output Voltage Swing Output High, No Load 2.40 2.50 2.40 2.50 V
Output High, I
SOURCE
= 1mA 2.25 2.40 2.25 2.40 V
Output High, I
SOURCE
= 10mA 2.00 2.20 2.00 2.20 V
Output Low, No Load 0.007 0.010 0.007 0.010 V
Output Low, I
SINK
= 1mA 0.060 0.085 0.060 0.085 V
Output Low, I
SINK
= 10mA 0.350 0.500 0.350 0.500 V
LT1211AC LT1211C/LT1211M
LT1211AM LT1212C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 75 150 100 275 µV
Input Voltage Range (Note 9) 1.8 2.1 1.8 2.1 V
0 –0.3 0 – 0.3 V
Maximum Output Voltage Swing Output High, No Load 2.60 2.70 2.60 2.70 V
Output High, I
SOURCE
= 1mA 2.50 2.60 2.50 2.60 V
Output High, I
SOURCE
= 15mA 2.15 2.30 2.15 2.30 V
Output Low, No Load 0.003 0.006 0.003 0.006 V
Output Low, I
SINK
= 1mA 0.047 0.065 0.047 0.065 V
Output Low, I
SINK
= 15mA 0.362 0.500 0.362 0.500 V
I
O
Maximum Output Current ±20 ±50 ±20 ±50 mA
VS = 3.3V, VCM = 0.5V, VOUT = 0.5V, –55°C ≤ TA ≤ 125°C, unless otherwise noted. (Note 8)
VS = 3.3V, VCM = 0.5V, VOUT = 0.5V, 0°C ≤ TA ≤ 70°C, unless otherwise noted. (Note 8)
LT1211C/LT1212C
LT1211AC LT1211I/LT1212I
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 120 200 175 500 µV
Input Voltage Range (Note 9) 1.4 1.5 1.4 1.5 V
0.2 0 0.2 0 V
Maximum Output Voltage Swing Output High, No Load 2.45 2.55 2.45 2.55 V
Output High, I
SOURCE
= 1mA 2.30 2.46 2.30 2.46 V
Output High, I
SOURCE
= 10mA 2.10 2.26 2.10 2.26 V
Output Low, No Load 0.005 0.008 0.005 0.008 V
Output Low, I
SINK
= 1mA 0.053 0.075 0.053 0.075 V
Output Low, I
SINK
= 10mA 0.300 0.420 0.300 0.420 V
VS = 3.3V, VCM = 0.5V, VOUT = 0.5V, –40°C ≤ TA ≤ 85°C, unless otherwise noted. (Notes 6, 8)
LT1211AC LT1211C/LT1212C
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
Input Offset Voltage 100 175 150 375 µV
Input Voltage Range (Note 9) 1.7 1.4 1.7 1.8 V
0.1 –0.1 0.1 –0.1 V
Maximum Output Voltage Swing Output High, No Load 2.50 2.63 2.50 2.63 V
Output High, I
SOURCE
= 1mA 2.40 2.53 2.40 2.53 V
Output High, I
SOURCE
= 10mA 2.20 2.33 2.20 2.33 V
Output Low, No Load 0.004 0.007 0.004 0.007 V
Output Low, I
SINK
= 1mA 0.052 0.070 0.052 0.070 V
Output Low, I
SINK
= 10mA 0.290 0.400 0.290 0.400 V
8
LT1211/LT1212
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: A heat sink may be required to keep the junction temperature
below absolute maximum when the output is shorted indefinitely.
Note 3: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formulas:
LT1211MJ8, LT1211AMJ8: T
J
= T
A
+ (P
D
× 100°C/W)
LT1211CN8, LT1211ACN8: T
J
= T
A
+ (P
D
× 100°C/W)
LT1211CS8: T
J
= T
A
+ (P
D
× 150°C/W)
LT1212CN: T
J
= T
A
+ (P
D
× 70°C/W)
LT1212CS: T
J
= T
A
+ (P
D
× 100°C/W)
Note 4: This parameter is not 100% tested.
Note 5: Guaranteed by correlation to 3.3V and ±15V tests.
Note 6: The LT1211C/LT1212C are guaranteed to meet specified
performance from 0°C to 70°C and are designed, characterized and
expected to meet these extended temperature limits, but are not tested at
–40°C and 85°C. The LT1211I/LT1212I are guaranteed to meet the
extended temperature limits.
Note 7: Slew rate is measured between ±8.5V on an output swing of ±10V
on ±15V supplies.
Note 8: Most LT1211/LT1212 electrical characteristics change very little
with supply voltage. See the 5V tables for characteristics not listed in the
3.3V table.
Note 9: Guaranteed by correlation to 5V and ±15V tests.
Note 10: Guaranteed by correlation to 3.3V tests.
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
ELECTRICAL C CHARA TERISTICS
INPUT OFFSET VOLTAGE (µV)
–350
PERCENT OF UNITS (%)
70
60
50
40
30
20
10
0 –150 50 150
1211/12 G01
–250 –50 250 350
LT1211 J8 PACKAGE
LT1211 N8 PACKAGE
V
S
= 5V
INPUT OFFSET VOLTAGE (µV)
–700
PERCENT OF UNITS (%)
70
60
50
40
30
20
10
0 –300 100 300
1211/12 G03
–500 –100 500 700
LT1211 J8 PACKAGE
LT1211 N8 PACKAGE
V
S
= ±15V
INPUT OFFSET VOLTAGE (µV)
–350
PERCENT OF UNITS (%)
70
60
50
40
30
20
10
0 –150 50 150
1211/12 G04
–250 –50 250 350
LT1211 S8 PACKAGE
LT1212 N PACKAGE
LT1212 S PACKAGE
V
S
= 5V
INPUT OFFSET VOLTAGE (µV)
–700
PERCENT OF UNITS (%)
70
60
50
40
30
20
10
0 –300 100 300
1211/12 G06
–500 –100 500 700
LT1211 S8 PACKAGE
LT1212 N PACKAGE
LT1212 S PACKAGE
V
S
= ±15V
Distribution of Offset Voltage Drift
Distribution of Input Offset Voltage with Temperature Distribution of Input Offset Voltage
Distribution of Offset Voltage Drift
Distribution of Input Offset Voltage with Temperature Distribution of Input Offset Voltage
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)
–3
PERCENT OF UNITS (%)
50
40
30
20
10
03
1211/12 G02
–2 –1 1
LT1211 J8 PACKAGE
LT1211 N8 PACKAGE
V
S
= 5V
02
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)
–6
PERCENT OF UNITS (%)
50
40
30
20
10
06
1211/12 G05
–4 –2 2
LT1211 S8 PACKAGE
LT1212 N PACKAGE
LT1212 S PACKAGE
V
S
= 5V
04
9
LT1211/LT1212
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
Voltage Gain, Phase vs Gain-Bandwidth Product,
Voltage Gain vs Frequency Frequency Phase Margin vs Supply Voltage
FREQUENCY (Hz)
1
VOLTAGE GAIN (dB)
100M
1211/12 G07
100 10k 1M
140
120
100
80
60
40
20
0
–20 10 1k 100k 10M
C
L
= 20pF
R
L
= 2k
V
S
= 5V
V
S
= ±15V
TOTAL SUPPLY VOLTAGE (V)
1
GAIN-BANDWIDTH PRODUCT (MHz)
16
15
14
13
12
11
10
10 40
1211/12 G09
60
50
40
30
20
10
0
35720 30
PHASE MARGIN (DEG)
T
A
= 25°C
T
A
= 125°C
T
A
= 25°C, 125°C
T
A
= –55°C
T
A
= –55°C
TEMPERATURE (°C)
–50
SLEW RATE (V/µs)
10
8
6
4
2–25 05075
1211/12 G10
100 125
25
VS = ±15V
VS = 5V
TA = 25°C
AV = –2
RL = 10k
FREQUENCY (Hz)
OUTPUT SWING (V
P-P
)
5
4
3
2
1
010k 100k 1M
1211/12 G13
1k
A
V
= –1
A
V
= 1
V
S
= 5V
100
FREQUENCY (Hz)
OUTPUT SWING (VP-P)
30
25
20
15
10
5
010k 100k 1M
1211/12 G14
1k100
VS = ±15V
Slew Rate vs Temperature Slew Rate vs Supply Voltage Capacitive Load Handling
Undistorted Output Swing Undistorted Output Swing Total Harmonic Distortion and
vs Frequency, VS = 5V vs Frequency, VS = ±15V Noise vs Frequency
FREQUENCY (Hz)
100k
VOLTAGE GAIN (dB)
60
40
20
0
–20 1M 10M 100M
1211/12 G08
100
80
60
40
20
0
–20
–40
–60
PHASE SHIFT (DEG)
PHASE
GAIN
V
S
= 5V
V
S
= ±15V
V
S
= 5V
V
S
= ±15V
C
L
= 20pF
R
L
= 2k
TOTAL SUPPLY VOLTAGE (V)
0
SLEW RATE (V/µs)
816 20 36
412 24 28 32
10
8
6
4
2
0
1211/12 G11
AV = –2
RL = 10k TA = 125°C
TA = 25°C
TA = –55°C
CAPACITIVE LOAD (pF)
10
OVERSHOOT (%)
80
70
60
50
40
30
20
10
0100 10000
1211/12 G12
A
V
= 1
A
V
= 5
A
V
= 10
V
S
= 5V
1000
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION AND NOISE (%)
10 1k 10k 100k
1211/12 G15
100
0.1
0.01
0.001
0.0001
V
S
= 5V
V
O
= 3V
P-P
R
L
= 1k
A
V
= 10
A
V
= 1
10
LT1211/LT1212
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
Open-Loop Voltage Gain Positive Output Saturation
vs Supply Voltage Open-Loop Gain, VS = 5V Voltage vs Temperature
Output Short-Circuit Current
Channel Separation vs Frequency vs Temperature Output Impedance vs Frequency
Negative Output Saturation
Voltage Gain vs Load Resistance Open-Loop Gain, VS = ±15V Voltage vs Temperature
TEMPERATURE (°C)
–50
SATURATION VOLTAGE, V+ – VOUT (V)
1.4
1.2
1.0
0.8
0.6
0.4
0.2 25 75
–25 0 50 100 125
ISOURCE = 20mA
VS = 5V
ISOURCE = 10mA
ISOURCE = 1mA
ISOURCE = 10µA
1211/12 G18
01234
OUTPUT (V)
1211/12 G17
–10 0 10
OUTPUT (V)
1211/12 G20
CASE TEMPERATURE (°C)
–50
OUTPUT SHORT-CIRCUIT CURRENT (mA)
60
50
40
30
20 25 75
–25 0 50 100 125
1211/12 G23
VS = ±15V
SOURCING
OR SINKING
VS = 5V
SOURCING
TEMPERATURE (°C)
–50
SATURATION VOLTAGE, VOUT – V– (mV)
1000
100
10
1–25 125
1211/12 G21
ISINK = 20mA
VS = 5V
0 25 50 10075
ISINK = 10mA
ISINK = 1mA
ISINK = 10µA
FREQUENCY (Hz)
10k
OUTPUT IMPEDANCE (Ω)
1000
100
10
1
0.1
0.01 100k 1M 10M
1211/12 G24
AV = 100
VS = ±15V
AV = 10
AV = 1
LOAD RESISTANCE (Ω)
10
OPEN-LOOP VOLTAGE GAIN (V/mV)
10k
1k
100
10 100 1k 10k
1211/12 G19
TA = 25°C
VS = 5V
VS = ±15V
R
L
= 2k
R
L
=
500Ω
R
L
= 2k
R
L =
500Ω
TOTAL SUPPLY VOLTAGE (V)
0
OPEN-LOOP VOLTAGE GAIN (V/mV)
816 20 36
412 24 28 32
6k
5k
4k
3k
2k
1k
0
1211/12 G16
TA = 25°C
TA = –55°C
RL = 2k
TA = 125°C
FREQUENCY (Hz)
CHANNEL SEPARATION (dB)
140
130
120
110
100
90
80
70
60
50
40
30
10k 100k 10M
1211/12 G22
1M
V
S
= ±15V
T
A
= 25°C
INPUT, 5µV/DIV INPUT, 5µV/DIV
11
LT1211/LT1212
250µV/DIV
200ns/DIV
V
S
= 5V
A
V
= 1 1211/12 G31
500mV/DIV
5V Settling
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
±15V Small-Signal Response
100ns/DIV
V
S
= ±15V
A
V
= 1 1211/12 G28
5V Small-Signal Response
100ns/DIV
V
S
= 5V
A
V
= 1 1211/12 G25
Settling Time to 0.01%
vs Output Step
2µs/DIV
V
S
= ±15V
A
V
= –1
R
F
= R
G
= 1k 1211/12 G30
10V
0V
–10V
±15V Large-Signal Response
3V
0V
500ns/DIV
V
S
= 5V
A
V
= –1
R
F
= R
G
= 1k
C
F
= 20pF 1211/12 G27
5V Large-Signal Response
10V
0V
–10V
2µs/DIV
V
S
= ±15V
A
V
= 1 1211/12 G29
±15V Large-Signal Response
3V
0V
500ns/DIV
V
S
= 5V
A
V
= 1 1211/12 G26
5V Large-Signal Response
1mV/DIV
2V/DIV
500ns/DIV
V
S
= ±15V
A
V
= –1 1211/12 G32
±15V Settling
20mV/DIV
20mV/DIV
SETTLING TIME (µs)
0.5
OUTPUT STEP (V)
1.0 2.0
1211/12 G33
10
8
6
4
2
0
–2
–4
–6
–8
–10 2.5
INVERTING
V
S
= ±15V
1.5
NONINVERTING
NONINVERTING
INVERTING
12
LT1211/LT1212
CCHARA TERISTICS
UW
ATYPICALPER
FORCE
Input Noise Current, Noise Common Mode Rejection Ratio Input Referred Power Supply
Voltage Density vs Frequency vs Frequency Rejection Ratio vs Frequency
Input Bias Current vs Common Mode Range
Input Bias Current vs Temperature Common Mode Voltage vs Temperature
Supply Current vs Supply Voltage Supply Current vs Temperature Warm-Up Drift vs Time
SUPPLY VOLTAGE (V)
0
SUPPLY CURRENT PER AMPLIFIER (mA)
2
1
0245
1211/12 G34
13
T
A
= 125°C
T
A
= 25°C
T
A
= –55°C
FREQUENCY (Hz)
130
120
110
100
90
80
70
60
50
40
301k 100k 1M 10M
1211/12 G42
10k
NEGATIVE SUPPLY
POWER SUPPLY REJECTION RATIO (dB)
VS = ±15V
AV = 100
POSITIVE SUPPLY
TEMPERATURE (°C)
COMMON MODE RANGE (V)
V
+
V
+
–1
V
+
–2
1211/12 G39
V
–
+1
V
–
V
–
–1–50 25 75
–25 0 50 100 125
TEMPERATURE (°C)
–50
SUPPLY CURRENT PER AMPLIFIER (mA)
2.6
2.2
1.8
1.4
1.0
0.6 –25 05075
1211/12 G35
100 125
25
VS = ±15V
VS = 5V
TIME AFTER POWER-UP (SEC)
0
CHANGE IN OFFSET VOLTAGE (µV)
2
1
0
–1
–2 40
1211/12 G36
10 20 30 50
V
S
= 5V
R
L
=
∞
2 TYPICAL AMPLIFIERS
TEMPERATURE (°C)
–50
INPUT BIAS CURRENT (nA)
100
90
80
70
60
50
40
30 25 75
–25 0 50 100 125
1211/12 G37
IOS
+IB
–IB
VS = 5V
COMMON MODE VOLTAGE (V)
–1
INPUT BIAS CURRENT (nA)
0
–20
–40
–60
–80
–100 3
1211/12 G38
0124
T
A
= –55°C
V
S
= 5V
T
A
= 125°C
T
A
= 25°C
FREQUENCY (Hz)
10k
COMMON MODE REJECTION RATIO (dB)
110
100
90
80
70
60
50
40
30
20
10 100k 1M 10M
1211/12 G41
V
S
= 5V
FREQUENCY (Hz)
20
18
16
14
12
10
8
6
4
2
010 1k 10k 100k
1211/12 G40
100
CURRENT NOISE
INPUT NOISE VOLTAGE DENSITY (nV/√Hz)
V
S
= ±15V
T
A
= 25°C
R
S
= 0Ω
VOLTAGE NOISE
INPUT NOISE CURRENT DENSITY (pA/√Hz)
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
13
LT1211/LT1212
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
Supply Voltage
The LT1211/LT1212 op amps are fully functional and all
internal bias circuits are in regulation with 2.2V of supply.
The amplifiers will continue to function with as little as
1.5V, although the input common-mode range and the
phase margin are about gone. The minimum operating
supply voltage is guaranteed by the PSRR tests which are
done with the input common mode equal to 500mV and a
minimum supply voltage of 2.5V. The LT1211/LT1212 are
guaranteed over the full –55°C to 125°C range with a
minimum supply voltage of 2.5V.
The positive supply pin of the LT1211/LT1212 should be
bypassed with a small capacitor (about 0.01µF) within an
inch of the pin. When driving heavy loads and for good
settling time, an additional 4.7µF capacitor should be
used. When using split supplies, the same is true for the
negative supply pin.
Power Dissipation
The LT1211/LT1212 amplifiers combine high speed and
large output current drive into very small packages. Be-
cause these amplifiers work over a very wide supply range,
it is possible to exceed the maximum junction temperature
under certain conditions. To insure that the LT1211/
LT1212 are used properly, calculate the worst case power
dissipation, define the maximum ambient temperature,
select the appropriate package and then calculate the
maximum junction temperature.
The worst case amplifier power dissipation is the total of
the quiescent current times the total power supply voltage
plus the power in the IC due to the load. The quiescent
supply current of the LT1211/LT1212 has a positive tem-
perature coefficient. The maximum supply current of each
amplifier at 125°C is given by the following formula:
I
SMAX
= 2.5 + 0.036 • (V
S
– 5) in mA
V
S
is the total supply voltage.
The power in the IC due to the load is a function of the
output voltage, the supply voltage and load resistance. The
worst case occurs when the output voltage is at half
supply, if it can go that far, or its maximum value if it
cannot reach half supply.
For example, calculate the worst case power dissipation
while operating on ±15V supplies and driving a 500Ω load.
I
SMAX
= 2.5 + 0.036 • (30 – 5) = 3.4mA
P
DMAX
= 2 • V
S
• I
SMAX
+ (V
S
– V
OMAX
) • V
OMAX
/R
L
P
DMAX
= 2 • 15V
× 3.4mA + (15V – 7.5V) • 7.5V/500
= 0.102 + 0.113 = 0.215W per Amp
If this is the quad LT1212, the total power in the package
is four times that, or 0.860W. Now calculate how much the
die temperature will rise above the ambient. The total
power dissipation times the thermal resistance of the
package gives the amount of temperature rise. For this
example, in the SO surface mount package, the thermal
resistance is 100°C/W junction-to-ambient in still air.
Temperature Rise = P
DMAX
• θ
JA
= 0.860W • 100°C/W
= 86°C
The maximum junction temperature allowed in the plastic
package is 150°C. Therefore the maximum ambient al-
lowed is the maximum junction temperature less the
temperature rise.
Maximum Ambient = 150°C – 86°C = 64°C
That means the SO quad can only be operated at or below
64°C on ±15V supplies with a 500Ω load.
As a guideline to help in the selection of the LT1211/
LT1212, the following table describes the maximum sup-
ply voltage that can be used with each part based on the
following assumptions:
1. The maximum ambient is 70°C or 125°C depending
on the part rating.
2. The load is 500Ω, includes the feedback resistors.
3. The output can be anywhere between the supplies.
PART MAX SUPPLIES MAX POWER AT MAX T
A
LT1211MJ8 19.5V or ±16.4V 500mW
LT1211CN8 25.2V or ±18.0V 800mW
LT1211CS8 20.3V or ±17.1V 533mW
LT1212CN 21.0V or ±17.8V 1143mW
LT1212CS 17.3V or ±14.4V 800mW
14
LT1211/LT1212
U
S
A
O
PPLICATI
WU
U
I FOR ATIO
positive rail, is about 100Ω as the output starts to source
current; this resistance drops to about 25Ω as the current
increases. Therefore when the output sources 1mA, the
output will swing to within 0.7V of the positive supply.
While sourcing 20mA, it is within 1.1V of the positive
supply.
The output of the LT1211/LT1212 will swing to within 3mV
of the negative supply while sinking zero current. Thus, in
a typical single supply application with the load going to
ground, the output will go to within 3mV of ground. The
open-loop output resistance when the output is driven
hard into the negative rail is about 44Ω at low currents and
reduces to about 24Ω at high currents. Therefore, when
the output sinks 1mA, the output is about 42mV above the
negative supply and while sinking 20mA, it is about
480mV above it.
The output of the LT1211/LT1212 has reverse-biased
diodes to each supply. If the output is forced beyond either
supply, unlimited currents will flow. If the current is
transient and limited to several hundred mA, no damage
will occur.
Feedback Components
Because the input currents of the LT1211/LT1212 are less
than 125nA, it is possible to use high value feedback
resistors to set the gain. However, care must be taken to
insure that the pole that is formed by the feedback resis-
tors and the input capacitance does not degrade the
stability of the amplifier. For example, if a single supply,
noninverting gain of two is set with two 20k resistors, the
LT1211/LT1212 will probably oscillate. This is because
the amplifier goes open-loop at 3MHz (6dB of gain) and
has 50° of phase margin. The feedback resistors and the
10pF input capacitance generate a pole at 1.6MHz that
introduces 63° of phase shift at 3MHz! The solution is
simple; use lower value resistors or add a feedback
capacitor of 10pF or more.
Inputs
Typically, at room temperature, the inputs of the LT1211/
LT1212 can common mode 400mV below ground (V
–
)
and to within 1.2V of the positive supply with the amplifier
still functional. However the input bias current and offset
voltage will shift as shown in the characteristic curves. For
full precision performance, the common-mode range
should be limited between ground (V
–
) and 1.5V below the
positive supply.
When either of the inputs is taken below ground (V
–
) by
more than about 700mV, that input bias current will
increase dramatically. The current is limited by internal
100Ω resistors between the input pins and diodes to each
supply. The output will remain low (no phase reversal) for
inputs 1.3V below ground (V
–
). If the output does not have
to sink current, such as in a single supply system with a 1k
load to ground, there is no phase reversal for inputs up to
8V below ground.
There are no clamps across the inputs of the LT1211/
LT1212 and therefore each input can be forced to any
voltage between the supplies. The input current will re-
main constant at about 60nA over most of this range.
When an input gets closer than 1.5V to the positive supply,
that input current will gradually decrease to zero until the
input goes above the supply, then it will increase due to the
previously mentioned diodes. If the inverting input is held
more positive than the noninverting input by 200mV or
more, while at the same time the noninverting input is
within 300mV of ground (V
–
), then the supply current will
increase by 1mA and the noninverting input current will
increase to about 10µA. This should be kept in mind in
comparator applications where the inverting input stays
above ground (V
–
) and the noninverting input is at or near
ground (V
–
).
Output
The output of the LT1211/LT1212 will swing to within
0.60V of the positive supply with no load. The open-loop
output resistance, when the output is driven hard into the
15
LT1211/LT1212
U
S
A
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PPLICATI
WU
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Comparator Applications
Sometimes it is desirable to use an op amp as a compara-
tor. When operating the LT1211/LT1212 on a single 3.3V
or 5V supply, the output interfaces directly with most TTL
and CMOS logic.
The response time of the LT1211/LT1212 is a strong
function of the amount of input overdrive as shown in the
4
2
0
100
0
V
S
= 5V 1211/12 AI01
R
L
= ∞
4
2
0
100
0
5µs/DIV
V
S
= 5V 1211/12 AI02
R
L
= ∞
LT1211 Comparator Response (+)
20mV, 10mV, 5mV, 2mV Overdrives LT1211 Comparator Response (–)
20mV, 10mV, 5mV, 2mV Overdrives
W
I
SPL
II
FED S
W
A
CHETIC
following photos. These amplifiers are unity-gain stable
op amps and not fast comparators, therefore, the logic
being driven may oscillate due to the long transition time.
The output can be speeded up by adding 20mV or more of
hysteresis (positive feedback), but the offset is then a
function of the input direction.
INPUT (mV) OUTPUT (V)
OUTPUT (V)
INPUT (mV)
C
I
Q5
Q10
C
F
R
F
I
7
I
8
C
O
V
–
C
M
BIAS
OUT
V
+
I
6
I
5
I
4
I
3
I
2
I
1
–IN +IN
1211/12 SS
Q7
Q9
Q8
Q11
Q12
Q14 Q15
Q13
Q16
Q6
Q3 Q4
Q1 Q2
5µs/DIV
16
LT1211/LT1212
U
SA
O
PPLICATITYPICAL
1A Voltage-Controlled Current Source
V
IN
V
+
R
L
I
OUT
1211/12 TA04
1k
1k
1k
1k
100Ω
500pF
I
OUT
= V
IN
1Ω
t
r
< 1µs
Si9430DY
P-CHANNEL
1Ω
–
+
1/2
LT1211
–
+
V
IN
V
+
1/2
LT1211
R
L
I
OUT
1211/12 TA05
1k
100Ω
500pF
Si9410DY
N-CHANNEL
1Ω
V
+
I
OUT
= V
IN
1Ω
t
r
< 1µs
1A Voltage-Controlled Current Sink
17
LT1211/LT1212
PACKAGE DESCRIPTIO
U
J8 1298
0.014 – 0.026
(0.360 – 0.660)
0.200
(5.080)
MAX
0.015 – 0.060
(0.381 – 1.524)
0.125
3.175
MIN
0.100
(2.54)
BSC
0.300 BSC
(0.762 BSC)
0.008 – 0.018
(0.203 – 0.457) 0° – 15°
0.005
(0.127)
MIN
0.405
(10.287)
MAX
0.220 – 0.310
(5.588 – 7.874)
1234
8765
0.025
(0.635)
RAD TYP
0.045 – 0.068
(1.143 – 1.727)
FULL LEAD
OPTION
0.023 – 0.045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
0.045 – 0.065
(1.143 – 1.651)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
OBSOLETE PACKAGE
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
18
LT1211/LT1212
PACKAGE DESCRIPTIO
U
N8 Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
N8 1098
0.100
(2.54)
BSC
0.065
(1.651)
TYP
0.045 – 0.065
(1.143 – 1.651)
0.130 ± 0.005
(3.302 ± 0.127)
0.020
(0.508)
MIN
0.018 ± 0.003
(0.457 ± 0.076)
0.125
(3.175)
MIN
12 34
8765
0.255 ± 0.015*
(6.477 ± 0.381)
0.400*
(10.160)
MAX
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
–0.015
+0.889
–0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
N14 1098
0.020
(0.508)
MIN
0.125
(3.175)
MIN
0.130 ± 0.005
(3.302 ± 0.127)
0.045 – 0.065
(1.143 – 1.651)
0.065
(1.651)
TYP
0.018 ± 0.003
(0.457 ± 0.076)
0.100
(2.54)
BSC
0.005
(0.125)
MIN
0.255 ± 0.015*
(6.477 ± 0.381)
0.770*
(19.558)
MAX
31 24567
8910
11
1213
14
0.009 – 0.015
(0.229 – 0.381)
0.300 – 0.325
(7.620 – 8.255)
0.325 +0.035
–0.015
+0.889
–0.381
8.255
()
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm)
N Package
14-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510)
19
LT1211/LT1212
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
PACKAGE DESCRIPTIO
U
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
S Package
16-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610)
0.016 – 0.050
(0.406 – 1.270)
0.010 – 0.020
(0.254 – 0.508)× 45°
0°– 8° TYP
0.008 – 0.010
(0.203 – 0.254)
SO8 1298
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
1234
0.150 – 0.157**
(3.810 – 3.988)
8765
0.189 – 0.197*
(4.801 – 5.004)
0.228 – 0.244
(5.791 – 6.197)
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
0.016 – 0.050
(0.406 – 1.270)
0.010 – 0.020
(0.254 – 0.508)× 45°
0° – 8° TYP
0.008 – 0.010
(0.203 – 0.254)
12345678
0.150 – 0.157**
(3.810 – 3.988)
16 15 14 13
0.386 – 0.394*
(9.804 – 10.008)
0.228 – 0.244
(5.791 – 6.197)
12 11 10 9
S16 1098
0.053 – 0.069
(1.346 – 1.752)
0.014 – 0.019
(0.355 – 0.483)
TYP
0.004 – 0.010
(0.101 – 0.254)
0.050
(1.270)
BSC
DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
*
**
20
LT1211/LT1212
12112fb LT/CP 0801 1.5K REV B • PRINTED IN USA
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
●
FAX: (408) 434-0507
●
www.linear.com
LINEAR TECHNOLOGY CORPORATION 1993
PART NUMBER DESCRIPTION COMMENTS
LT1213/LT1214 28MHz, 12V/µs, Single Supply Dual and Quad Precision Op Amps Twice as Fast as LT1211
LT1215/LT1216 23MHz, 50V/µs, Single Supply Dual and Quad Precision Op Amps Seven Times LT1211 Slew Rate
LT1498/LT1499 10MHz, 6V/µs, Dual/Quad Rail-to-Rail Input and Output Precision C-Load Op Amps Rail-to-Rail LT1211
LT1630/LT1631 30MHz, 10V/µs, Dual/Quad Rail-to-Rail Input and Output Precision Op Amps Rail-to-Rail LT1213
LT1632/LT1633 45MHz, 45V/µs, Dual/Quad Rail-to-Rail Input and Output Precision Op Amps Rail-to-Rail LT1215
FREQUENCY (Hz)
10k
GAIN (dB)
10
0
–10
–20
–30
–40
–50
–60
–70
–80
–90 100k 1M 10M
1211/12 TA03b
R1
2.94k
20k
C1
1000pF
1211/12 TA03a
V
OUT
1µF
R2
866Ω
V
IN
13k
2.94k
1.21k
C2
1000pF
1000pF
2.10k
1000pF
3.3V
1. 21k
12-BIT ACCURATE SIGNAL RANGE FROM 6mV TO 1.8V ON 3.3V SINGLE SUPPLY.
MAXIMUM OUTPUT OFFSET ERROR IS 676µV.
FOR EACH 2ND ORDER SECTION:
W
O2
= 1
C1C2R1R2
R1
= 1
W
O
QC1
R2
= Q
W
O
C2
–
+
1/4
LT1211
–
+
1/4
LT1211
–
+
1/4
LT1211
–
+
1/4
LT1211
+
Single Supply, 100kHz, 4th Order Butterworth Lowpass Filter
RELATED PARTS
TYPICAL APPLICATIO
U
