2N6784 Data Sheet April 1998 2.25A, 200V, 1.500 Ohm, N-Channel Power MOSFET Features The 2N6784 is an N-Channel enhancement mode silicon gate power MOS field effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. This type can be operated directly from integrated circuits. * rDS(ON) = 1.500 Ordering Information * Majority Carrier Device PART NUMBER 2N6784 PACKAGE TO-205AF File Number 1906.2 * 2.25A, 200V * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" BRAND 2N6784 NOTE: When ordering, use the entire part number. Symbol D G S Packaging JEDEC TO-205AF DRAIN (CASE) SOURCE GATE (c)2001 Fairchild Semiconductor Corporation 2N6784 Rev. A 2N6784 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IS Pulse Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ISM Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg 2N6784 200 200 2.25 1.5 9 20 2.25 9 15 0.12 -55 to 150 UNITS V V A A A V A A W W/oC oC 300 260 oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications TC = 25oC, Unless Otherwise Specified PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS - V Drain to Source Breakdown Voltage BVDSS ID = 0.25mA, VGS = 0V 200 - Gate to Threshold Voltage VGS(TH) VGS = VDS, ID = 0.5mA 2 - 4 V IDSS VDS = 200V, VGS = 0V - - 250 A VDS = 160V, VGS = 0V, TC = 125oC - - 1000 A ID = 2.25A, VGS = 10V - - 3.37 V VGS = 20V - - 100 nA ID = 1.5A, VGS = 10V, TA = 25oC - 1.0 1.500 Zero Gate Voltage Drain Current On-State Drain Current (Note 2) VDS(ON) Gate to Source Leakage Current IGSS Drain to Source On Resistance (Note 2) rDS(ON) ID = 1.5A, VGS = 10V, TA = 125oC - - 2.81 Diode Forward Voltage VSD IS = 2.25A, VGS = 0V 0.7 - 1.5 V Forward Transconductance (Note 2) gfs VDS = 5V, ID = 1.5A 0.9 1.3 2.7 S - - 15 ns - - 20 ns - - 30 ns Turn-On Delay Time td(ON) Rise Time tr Turn-Off Delay Time td(OFF) VDD 75V, ID = 1.5A, RG = 50 (Figure 17) MOSFET Switching Times are Essentially Independent of Operating Temperature - - 20 ns 60 135 200 pF 20 60 80 pF CRSS 5 16 25 pF RJC - - 8.33 oC/W - - 175 oC/W Fall Time tf Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RJA VDS = 25V, VGS = 0V, f = 1MHz (Figure 14) Free Air Operation Source to Drain Diode Specifications PARAMETER Reverse Recovery Time Reverse Recovered Charge SYMBOL MIN TYP MAX UNITS trr TJ = 150oC, ISD = 2.25A, dISD/dt = 100A/s TEST CONDITIONS - 290 - ns QRR TJ = 150oC, ISD = 2.25A, dISD/dt = 100A/s - 2.0 - C NOTES: 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal impedance curve (Figure 3). (c)2001 Fairchild Semiconductor Corporation 2N6784 Rev. A 2N6784 Typical Performance Curves Unless Otherwise Specified 2.5 1.0 ID, DRAIN CURRENT (A) POWER DISSIPATION MULTIPLIER 1.2 0.8 0.6 0.4 0.2 2.0 1.5 1.0 0.5 0 0 0 25 125 50 75 100 TC , CASE TEMPERATURE (oC) 25 150 50 75 125 100 150 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE THERMAL IMPEDANCE ZJC, NORMALIZED 1 0.5 0.2 0.1 0.1 PDM 0.05 t1 t2 0.02 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC x RJC + TC 0.01 SINGLE PULSE 0.01 10-5 10-4 10-3 10-2 10-1 t, RECTANGULAR PULSE DURATION (s) 1 10 FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE 10 50 OPERATION IN THIS AREA IS LIMITED BY rDS(ON) 9V 8 10 10s 100s 1 1ms TC = 25oC TJ = MAX RATED SINGLE PULSE 0.1 10ms 4 7V 2 6V 0 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA 4V 5V DC 10 100 VDS, DRAIN TO SOURCE VOLTAGE (V) (c)2001 Fairchild Semiconductor Corporation VGS = 8V 6 100ms 0.05 1 PULSE TEST = 80s 10V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 20 1000 0 10 20 30 40 50 VDS, DRAIN TO SOURCE VOLTAGE (V) FIGURE 5. OUTPUT CHARACTERISTICS 2N6784 Rev. A 2N6784 Typical Performance Curves Unless Otherwise Specified (Continued) 10 8 10V 9V ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 80s PULSE TEST 10 PULSE TEST = 80s 6 8V 4 7V 2 VGS = 6V 4.0V 5 TJ = -55oC 2 TJ = 125oC TJ = 25oC 1.0 0.5 0.2 5V 0 0.1 0 4 6 8 2 VDS, DRAIN TO SOURCE VOLTAGE (V) 10 8 12 14 FIGURE 7. TRANSFER CHARACTERISTICS 4 2.2 VGS = 10V, ID = 1.25A 80s PULSE TEST NORMALIZED ON RESISTANCE rDS(ON), ON-STATE RESISTANCE () 6 VSD, GATE TO SOURCE VOLTAGE (V) FIGURE 6. SATURATION CHARACTERISTICS 3 VGS = 10V 2 VGS = 20V 1 0 4 2 0 10 1.8 1.4 1.0 0.6 0.2 0 2 4 6 ID, DRAIN CURRENT (A) 8 -40 10 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) NOTE: Heating effect of 2s pulse is minimal. FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 500 1.15 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS = CDS + CGD 400 C, CAPACITANCE (pF) NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 1.25 1.05 0.95 0.85 300 200 CISS COSS 100 CRSS 0.75 -40 0 40 80 120 160 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE (c)2001 Fairchild Semiconductor Corporation 0 0 10 30 40 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 50 FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 2N6784 Rev. A 2N6784 Typical Performance Curves 10 80s PULSE TEST IDR, REVERSE DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) 2.5 Unless Otherwise Specified (Continued) TJ = -55oC 2.0 TJ = 25oC 1.5 TJ = 125oC 1.0 0.5 0 TJ = 150oC 2 4 6 ID, DRAIN CURRENT (A) 8 10 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT TJ = 25oC 1.0 0.1 0 80s PULSE TEST 0 1.0 2.0 3.0 VSD, SOURCE TO DRAIN VOLTAGE (V) 4.0 FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE VGS, GATE TO SOURCE VOLTAGE (V) 15 ID = 4A VDS = 40V VDS = 100V VDS = 160V 10 5 0 0 2 6 4 Qg, TOTAL GATE CHARGE (nC) 8 10 FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE (c)2001 Fairchild Semiconductor Corporation 2N6784 Rev. A 2N6784 Test Circuits and Waveforms VDS BVDSS tP L VDS IAS VARY tP TO OBTAIN VDD + RG REQUIRED PEAK IAS VDD - VGS DUT tP 0V 0 IAS 0.01 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON tOFF td(ON) td(OFF) tr VDS RL 90% + RG - 90% 10% 10% 0 VDD tf 90% DUT VGS 0 50% 50% PULSE WIDTH 10% VGS FIGURE 18. RESISTIVE SWITCHING WAVEFORMS FIGURE 17. SWITCHING TIME TEST CIRCUIT VDS (ISOLATED SUPPLY) CURRENT REGULATOR VDD Qg(TOT) 12V BATTERY 0.2F SAME TYPE AS DUT 50k Qgd Qgs 0.3F D IG(REF) VDS DUT G 0 S 0 IG CURRENT SAMPLING RESISTOR VDS ID CURRENT SAMPLING RESISTOR FIGURE 19. GATE CHARGE TEST CIRCUIT (c)2001 Fairchild Semiconductor Corporation VGS IG(REF) 0 FIGURE 20. GATE CHARGE WAVEFORMS 2N6784 Rev. A TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. 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PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Product Status Definition Advance Information Formative or In Design This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Preliminary First Production This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1