Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
5/03/2012 Rev#A7 ECN# SD5000/5001/5400/5401
Product Summary
Part Number
V(BR)DS Min (V)
VGS(th) Max (V)
rDS(on) Max (Ω)
Crss Max (pF)
tON Max (ns)
SD5000I
20
1.5
70 @ VGS = 5 V
0.5
2
SD5000N
20
1.5
70 @ VGS = 5 V
0.5
2
SD5001N
10
1.5
70 @ VGS = 5 V
0.5
2
SD5400CY
20
1.5
75 @ VGS = 5 V
0.5
2
SD5401CY
10
1.5
75 @ VGS = 5 V
0.5
2
Features
Benefits
Applications
Quad SPST Switch with Zener Input Protection
Low Interelectrode Capacitance and Leakage
Ultra-High Speed Switching―tON: 1 ns
Ultra-Low Reverse Capacitance: 0.2 pF
Low Guaranteed rDS @5 V
Low Turn-On Threshold Voltage
High-Speed System Performance
Low Insertion Loss at High Frequencies
Low Transfer Signal Loss
Simple Driver Requirement
Single Supply Operation
Fast Analog Switch
Fast Sample-and-Holds
Pixel-Rate Switching
Video Switch
Multiplexer
DAC Deglitchers
High-Speed Driver
Description
The SD5000/5400 series of monolithic switches features four
individual double-diffused enhancement-mode MOSFETs built
on a common substrate. These bidirectional devices provide low
on-resistance and low interelectrode capacitances to minimize
insertion loss and crosstalk.
Built on Siliconix’ proprietary DMOS process, the SD5000/5400
series utilizes lateral construction to achieve low capacitance and
ultra-fast switching speeds. For manufacturing reliability, these
devices feature poly-silicon gates protected by Zener diodes
The SD 5000/5400 are rated to handle ±10-V analog signals,
while the SD5001/5401 are rated for ±5-V signals.
For similar products packaged in TO-206AF (TO-72) and TO-
253 (SOT-143) see the SD211DE/SST211 series.
SD5000/5001/5400/5401
QUAD N-CHANNEL LATERAL
DMOS SWITCH
ZENER PROTECTED
Dual-In-Line
D4
NC
G4
S4
S3
G3
NC
D3
D1
G1
S1
S2
G2
NC
D2
SUBSTRATE
Plastic: SD5000N
SD5001N
Sidebraze: SD5000I
Top View
Narrow Body SOIC
SUBSTRATE
SD5400CY
SD5401CY
Top View
S1
NC
G1
D1
D4
G4
S4
S2
G2
D2
D3
G3
S3
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
5/03/2012 Rev#A7 ECN# SD5000/5001/5400/5401
Absolute Maximum Ratings (TA = 25ºC Unless Otherwise Noted)
Gate-Drain, Gate-Source Voltage
(SD5000, SD5400)……………………………….……………+30V/-25V
(SD5001, SD5401)……………………………………….……+25V/-15V
Gate-Substrate Voltage (SD5000, SD5400)………+30V/-0.3V
(SD5001I, SD5401)...….…+25V/-0.3V
Drain-Source Voltage (SD5000, SD5400)……………….20V
(SD5001I, SD5401)……………….10V
Drain-Source-Substrate Voltage (SD5000, SD5400)……………….25V
(SD5001I, SD5401)……………….15V
Drain Current…………………………………………………….…...........50 mA
Lead Temperature (1/16” from case for 10 seconds)……………………….300ºC
Storage Temperature…………………………………………….…..-65 to 150ºC
Operating Junction Temperature…..…………………………….…..-55 to 150ºC
Power Dissipation”: (Package)…………………………….………500 mW
(each Device)…..…………………….………300 mW
Notes:
a. SD5000/SD5001I derate 5 mW/C above 25ºC
b. SD5400/SD5401 derate 4 mW/C above 25ºC
a.
Specificationsa
Parameter
Symbolb
Test Conditionsb
Typc
Limits
Unit
SD5000
SD5400
SD5001
SD5401
Min
Max
Min
Max
Static
Drain-Source Breakdown Voltage
V(BR)DS
VGS=VBS=-5V, ID=10nA
30
20
10
V
Source-Drain Breakdown Voltage
V(BR)SD
VGD=VBD=-5V, IS=10nA
22
20
10
Drain-Substrate Breakdown Voltage
V(BR)DBO
VGB=0 V, ID=10µA, Source Open
35
25
15
Source-Substrate
Breakdown Voltage
V(BR)SBO
VGB=0 V, IS=10µA, Drain Open
35
25
15
Drain-Source Leakage
IDS(off)
VGS= VBS=-5 V
VDS= 10 V
0.4
10
nA
VDS= 15 V
0.7
VDS= 20 V
0.9
10
Source-Drain Leakage
ISD(off)
VGD= VBD=-5 V
VSD= 10 V
0.5
10
VSD= 15 V
0.8
VSD= 20 V
1
10
Gate Leakage
IGBS
VDB = VSB = 0 V, VGB =30V
0.01
100
100
Threshold Voltage
VGS(th)
VDS = VGS, ID = I µA, VSB =0V
0.8
0.1
1.5
0.1
1.5
V
Drain-Source On-Resistance
rDS(on)
VSB = 0 V
ID = 1 mA
SD5000 Series
VGS = 5 V
58
70
70
Ω
SD5400 Series
VGS = 5 V
60
75
75
VGS = 10 V
38
VGS = 15 V
30
VGS = 20 V
26
Resistance Match
∆rDS(on)
VGS = 5 V
1
5
5
Dynamic
Forward Transconductance
gfs
VDS = 10 V
VSB = 0 V
lD = 20 mA
f = 1 kHz
SD5000 Series
12
10
10
mS
SD5400 Series
11
9
9
Gate Node Capacitance
C(GS+GD+GB)
VDS = 10 V
f = 1 MHz
VGS = VBS = -15V
SD5000 Series
2.5
3.5
3.5
pF
Drain Node Capacitance
C(GD+DB)
2.0
3
3
Source Node Capacitance
C(GS+SB)
3.7
5
5
Reverse Transfer Capacitance
Crss
0.2
0.5
0.5
Crosstalk
f = 3 kHz
-107
dB
Linear Integrated Systems
• 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261
5/03/2012 Rev#A7 ECN# SD5000/5001/5400/5401
Specificationsa
Parameter
Symbolb
Test Conditionsb
Typc
Limits
Unit
SD5000
SD5400
SD5001
SD5401
Min
Max
Min
Max
Switching
Turn-On Time
td(on)
VSB= 1-5 Vin, VGN 0 to 5 V, RG = 25 Ω
VDD = 5 V, RL = 680 Ω
0.5
1
1
ns
tr
0.6
1
1
Turn-Off Time
td(off)
2
tf
6
Notes:
a. TA = 25ºC unless otherwise noted.
b. B is the body (substrate) and V(BR) is breakdown.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
DMCA
Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing
high-quality discrete components. Expertise brought to LIS is based on processes and products developed
at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall,
a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide,
co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems.
Switching Time Test Circuit
