DESIGN NOTES (continued) Marking consists of manufacturer's name, logo (EC), part number, terminal identification and date code of manufacture. All marking is applied by silk screen process using white epoxy paint in accordance with MIL-STD-130, to meet the permanency of identification required by MIL-STD-202, Method 215. BLOCK DIAGRAM IS SHOWN BELOW Ny IN2 Veco Vee IMS Me 16 14 13 ghee 11 q | i i i i | | BUFFERED] |BUFFERED) | BUFFERED] [BUFFERED | | DELAY DELAY DELAY DELAY | | py Pa 1 a 4 5 6 8 OuTy OUT? GND GND OUT3 OUT4 MECHANICAL DETAIL IS SHOWN BELOW } 200 | oi 400 @ M4DL-ACT-_ _ O7 C C O95 O04 | [x_we t 200 &? 8927 | MADE IN SLO USA aie 060 Il | | | | Phe +,020 TYP.+] | } .O50 TyP.+| |_ 020 DIA. TYP. 100 TYP. 450 TYP. lg V Vig la 00 TEST CONDITIONS 1. All measurements are made at 25C. 2. Veco supply voltage is maintained at 5.0 DC, 3. All units are tested using an ACT toggle-type positive input pulse and one ACT load at the output. @ 4. Input pulse width used is GOOns. Pulse period is 5,000ns. OPERATING SPECIFICATIONS "Wee supply Voltage: . ven nee ee as 4.75 to 5.25V BC Vee Supply current: Constant "1" or O" in . 2. se ee Detypical Constant 1 Mhz square wave . 25ma typical Logic 1 input: Woltagee ie wii we fe eet eee 2 min.; Vee max. Logic 0 input: Wot Gs cited er rey tee eae eo OE ITE. Logic 1 Voltage out:...... eee es 43V min. @ 24me Logie O Voltage Outi. 2 i ee os O.44V max, @ + 241 Operating temperature range: . . . 1. -40 to +85C. Storage tainperaturo: 1. 1 ee ee 6 8 tO+ 126 9C, *Delays increase or decrease approximately 4% for an increase o decrease of 5% in supply voltage. PART NUMBER TABLE @ DELAYS AND TOLERANCES {in ns) PART NO. |OQUTPUT PART NO. | OUTPUT MA4DL-ACT-6 6 +1 M4DL-ACT-30 3041.5 MA4DL-ACT-7 f +1 M4DL-ACT-35 85 +1.5 M4DL-ACT-8 8 +1 M4DL-ACT-40 40 +1.5 MA4DL-ACT-9 9 +1 M4DL-ACT-45 45 +2.0 MA4DL-ACT-10 | 10 +1 M4DL-ACT-50 50 +2.0 M4DL-ACT-11 | 17 1 M4DL-ACT-55 55 +2,0 MA4DL-ACT-12 | 12 +1 M4DL-ACT-60 60 +2.0 M4DL-ACT-13 | 13 +1 M4DL-ACT-65 B65 +2.5 M4DL-ACT-14 | 14 +1 M4DL-ACT-70 70 +2.5 MA4DL-ACT-15 | 15 +1 M4DL-ACT-75 75 +26 MA4DL-ACT-16 | 16 +1 M4DL-ACT-80 80 22.5 M4DL-ACT-17 | 17 +1 M4DL-ACT-85 85 +3.0 MA4DL-ACT-18 | 18 +1 M4DL-ACT-90 90 +3.0 M4DL-ACT-19 | 19 +1 M4DL-ACT-95 95 +3.0 M4DL-ACT-20 | 20 +1 M4BL-ACT-100 | 100 +3.0 M4DL-ACT-21 | 21 +1 MA4DL-ACT-125 |125 +4.0 MADL-ACT-22 | 22 +1 M4DL-ACT-150 | 150 +4.5 MA4DL-ACT-23 | 23 +1 M4DL-ACT-175 | 175 +5.0 M4DL-ACT-24 | 24 +1 M4BL-ACT-200 | 200 +6.0 M4DL-ACT-25 | 26 +1 4 All modules can be operated with a minimum input pulse width of 100% of full delay and pulse period approaching square wave; since delay accuracies may be somewhat degraded, it is sug- gested that the module be evaluated under the intended specific operating conditions. Special modules can be readily manufac- tured to improve accuracies and/or provide customer specified random delay times for specific applications. Catalog No, C/071589