CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper I.C. Handling Procedures.
Copyright © Harris Corporation 1992 7-640
SEMICONDUCTOR
CD14538BMS
CMOS Dual Precision
Monostable Multivibrator
Description
CD14538BMS dual precision monostable multivibrator provides stable retrigger-
able/resettable one-shot operation for any fixed-voltage timing application.
An external resistor (RX) and an external capacitor (CX) control the timing and
accuracy for the circuit. Adjustment of RX and CX provides a wide range of out-
put pulse widths from the Q andQ terminals. The time delay from trigger input to
output transition (trigger propagation delay) and the time delay from reset input
to output transition (reset propagation delay) are independent of RX and CX. Pre-
cision control of output pulse widths is achieved through linear CMOS tech-
niques.
Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) inputs are pro-
vided for triggering from either edge of an input pulse. An unused +TR input
should be tied to VSS. An unused -TR input should be tied to VDD. A RESET
(on low level) is provided for immediate termination of the output pulse or to pre-
vent output pulses when power is turned on. An unused RESET input should be
tied to VDD. However, if an entire section of the CD14538BMS is not used, its
inputs must be tied to either VDD or VSS. See Table 1.
In normal operation the circuit retriggers (extends the output pulse one period)
on the application of each new trigger pulse. For operation in the non-retrigger-
able mode, Q is connected to -TR when leading-edge triggering (+TR) is used
or Q is connected to +TR when trailing-edge triggering (-TR) is used. The time
period (T) for this multivibrator can be calculated by: T = RXCX.
The minimum value of external resistance, RX is 4KΩ. The minimum and maxi-
mum values of external capacitance, C X, are 0pF and 100 µF, respectively .
The CD14538BMS is interchangeable with type MC14538 and is similar to and
pin-compatible with the CD4098B* and CD4538B**.
* T = 0.5 RXCX for CX≥ 1000pF.
* T = RXCX; CX min = 5000pF.
The CD14538BMS is supplied in these 16-lead outline packages:
Braze Seal DIP H4X
Frit Seal DIP H1L
Ceramic Flatpack H6W
Features
• High-Voltage Type (20V Rating)
• Retriggerable/Resettable Capability
• Trigger and Reset Propagation Delays Inde-
pendent of RX, CX
• Triggering From Leading or Trailing Edge
• Q and Q Buffered Outputs Available
• Separate Resets
• Wide Range of Output-Pulse Widths
• Schmitt-Trigger Input Allows Unlimited Rise
and Fall Times On +TR and -TR Inputs
• 100% Tested For Maximum Quiescent Cur-
rent at 20V
• Maximum Input Current of 1µA at 18V Over
Full Package-Temperature Range:
- 100nA at 18V and +25oC
• Noise Margin (Full Package-Temperature
Range):
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• 5V, 10V and 15V Parametric Ratings
• Standardized Symmetrical Output Charac-
teristics
• Meets All Requirements of JEDEC Tentative
Standards No. 13B, “Standard Specifica-
tions for Description of “B” Series CMOS
Device’s
Applications
• Pulse Delay and Timing
• Pulse Shaping
November 1994
File Number 3192
Pinout
CD14538BMS
TOP VIEW
14
15
16
9
13
12
11
10
1
2
3
4
5
7
6
8
CX1
RXCX (1)
RESET (1)
+TR (1)
-TR (1)
Q1
VSS
Q1
VDD
RXCX (2)
RESET (2)
+TR (2)
-TR (2)
Q2
Q2
CX2
Functional Diagram
MONO1
MONO2
CX1 RX1 VDD
21 RXCX(1)
6
7
10
9
4
5
3
12
11
13
15 14 RXCX(2)
VDD
CX2 RX2
Q1
Q1
Q2
Q2
+TR
-TR
RESET
+TR
-TR
RESET
VDD = 16
VSS = 8
7-641
Specifications CD14538BMS
Absolute Maximum Ratings Reliability Information
DC Supply Voltage Range, (VDD) . . . . . . . . . . . . . . . -0.5V to +20V
(Voltage Referenced to VSS Terminals)
Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VDD +0.5V
DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .±10mA
Operating Temperature Range. . . . . . . . . . . . . . . . -55oC to +125oC
Package Types D, F, K, H
Storage Temperature Range (TSTG). . . . . . . . . . . -65oC to +150oC
Lead Temperature (During Soldering) . . . . . . . . . . . . . . . . . +265oC
At Distance 1/16 ± 1/32 Inch (1.59mm ± 0.79mm) from case for
10s Maximum
Thermal Resistance . . . . . . . . . . . . . . . . θja θjc
Ceramic DIP and FRIT Package. . . . . 80oC/W 20oC/W
Flatpack Package . . . . . . . . . . . . . . . . 70oC/W 20oC/W
Maximum Package Power Dissipation (PD) at +125oC
For TA = -55oC to +100oC (Package Type D, F, K). . . . . . 500mW
For TA = +100oC to +125oC (Package Type D, F, K) . . . . .Derate
Linearity at 12mW/oC to 200mW
Device Dissipation per Output Transistor . . . . . . . . . . . . . . . 100mW
For TA = Full Package Temperature Range (All Package Types)
Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (NOTE 1) GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1 +25oC-10µA
2 +125oC - 1000 µA
VDD = 18V, VIN = VDD or GND 3 -55oC-10µA
Input Leakage Current IIL VIN = VDD or GND VDD = 20 1 +25oC -100 - nA
2 +125oC -1000 - nA
VDD = 18V 3 -55oC -100 - nA
Input Leakage Current IIH VIN = VDD or GND VDD = 20 1 +25oC - 100 nA
2 +125oC - 1000 nA
VDD = 18V 3 -55oC - 100 nA
Output Voltage VOL15 VDD = 15V, No Load 1, 2, 3 +25oC, +125oC, -55oC - 50 mV
Output Voltage VOH15 VDD = 15V, No Load (Note 3) 1, 2, 3 +25oC, +125oC, -55oC 14.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1 +25oC 0.53 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1 +25oC 1.4 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1 +25oC 3.5 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1 +25oC - -0.53 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1 +25oC - -1.8 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1 +25oC - -1.4 mA
Output Current (Source) IOH15 VDD = 15V, VOUT = 13.5V 1 +25oC - -3.5 mA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1 +25oC -2.8 -0.7 V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1 +25oC 0.7 2.8 V
Functional F VDD = 2.8V, VIN = VDD or GND 7 +25oC VOH >
VDD/2 VOL <
VDD/2 V
VDD = 20V, VIN = VDD or GND 7 +25oC
VDD = 18V, VIN = VDD or GND 8A +125oC
VDD = 3V, VIN = VDD or GND 8B -55oC
Input Voltage Low
(Note 2) VIL VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25 oC, +125oC, -55oC - 1.5 V
Input Voltage High
(Note 2) VIH VDD = 5V, VOH > 4.5V, VOL < 0.5V 1, 2, 3 +25 oC, +125oC, -55oC 3.5 - V
Input Voltage Low
(Note 2) VIL VDD = 15V, VOH > 13.5V,
VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC- 4 V
Input Voltage High
(Note 2) VIH VDD = 15V, VOH > 13.5V,
VOL < 1.5V 1, 2, 3 +25oC, +125oC, -55oC11 - V
NOTES: 1. All voltages referenced to device GND, 100% testing being
implemented.
2. Go/No Go test with limits applied to inputs
3. For accuracy, voltage is measured differentially to VDD. Limit
is 0.050V max.
7-642
Specifications CD14538BMS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS (Note 1, 2) GROUP A
SUBGROUPS TEMPERATURE
LIMITS
UNITSMIN MAX
Propagation Delay
+TR or -TR to Q or Q TPHL1
TPLH1 VDD = 5V, VIN = VDD or GND 9 +25oC - 600 ns
10, 11 +125oC, -55oC - 810 ns
Propagation Delay
Reset to Q or Q TPHL2
TPLH2 VDD = 5V, VIN = VDD or GND 9 +25oC - 500 ns
10, 11 +125oC, -55oC - 675 ns
Transition Time TTHL
TTLH VDD = 5V, VIN = VDD or GND 9 +25oC - 200 ns
10, 11 +125oC, -55oC - 270 ns
NOTES:
1. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
2. -55oC and +125oC limits guaranteed, 100% testing being implemented.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 5V, VIN = VDD or GND 1, 2 -55oC, +25oC- 5 µA
+125oC - 150 µA
VDD = 10V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
+125oC - 300 µA
VDD = 15V, VIN = VDD or GND 1, 2 -55oC, +25oC- 10µA
+125oC - 600 µA
Output Voltage VOL VDD = 5V, No Load 1, 2 +25oC, +125oC,
-55oC-50mV
Output Voltage VOL VDD = 10V, No Load 1, 2 +25oC, +125oC,
-55oC-50mV
Output Voltage VOH VDD = 5V, No Load 1, 2 +25oC, +125oC,
-55oC4.95 - V
Output Voltage VOH VDD = 10V, No Load 1, 2 +25oC, +125oC,
-55oC9.95 - V
Output Current (Sink) IOL5 VDD = 5V, VOUT = 0.4V 1, 2 +125oC 0.36 - mA
-55oC 0.64 - mA
Output Current (Sink) IOL10 VDD = 10V, VOUT = 0.5V 1, 2 +125oC 0.9 - mA
-55oC 1.6 - mA
Output Current (Sink) IOL15 VDD = 15V, VOUT = 1.5V 1, 2 +125oC 2.4 - mA
-55oC 4.2 - mA
Output Current (Source) IOH5A VDD = 5V, VOUT = 4.6V 1, 2 +125oC - -0.36 mA
-55oC - -0.64 mA
Output Current (Source) IOH5B VDD = 5V, VOUT = 2.5V 1, 2 +125oC - -1.15 mA
-55oC - -2.0 mA
Output Current (Source) IOH10 VDD = 10V, VOUT = 9.5V 1, 2 +125oC - -0.9 mA
-55oC - -1.6 mA
Output Current (Source) IOH15 VDD =15V, VOUT = 13.5V 1, 2 +125oC - -2.4 mA
-55oC - -4.2 mA
Input Voltage Low VIL1 VDD = 10V, VOH > 9V, VOL < 1V 1, 2 +25 oC, +125oC,
-55oC-3V
Input Voltage High VIH VDD = 10V, VOH > 9V, VOL <
1V 1, 2 +25oC, +125oC,
-55oC+7 - V
7-643
Specifications CD14538BMS
Propagation Delay +TR
OR -TR to Q or Q TPHL1
TPLH1 VDD = 10V 1, 2, 3 +25oC - 300 ns
VDD = 15V 1, 2, 3 +25oC - 220 ns
Propagation Delay Reset
to Q or Q TPHL2
TPLH2 VDD = 10V 1, 2, 3 +25oC - 250 ns
VDD = 15V 1, 2, 3 +25oC - 190 ns
Transition Time TTHL
TTLH VDD = 10V 1, 2, 3 +25oC - 100 ns
VDD = 15V 1, 2, 3 +25oC - 80 ns
Output Pulse Width
Q or Q
CX =.002µF, RX = 100K
TW VDD = 5V 1, 2, 3 +25oC - 230 µs
VDD = 10V 1, 2, 3 +25oC - 232 µs
VDD = 15V 1, 2, 3 +25oC - 234 µs
Output Pulse Width
CX = 0.1µF
RX = 100K
TW 1, 2, 3 +25oC - 10.5 ms
VDD = 10V 1, 2, 3 +25oC - 10.6 ms
VDD = 15V 1, 2, 3 +25oC - 10.6 ms
Output Pulse Width
CX = 10µF
RX = 100K
TW VDD = 5V 1, 2, 3 +25oC - 1.06 s
VDD = 10V 1, 2, 3 +25oC - 1.06 s
VDD = 15V 1, 2, 3 +25oC - 1.07 s
Minimum Retrigger Time TRR VDD = 5V 1, 2, 3 +25oC0-ns
VDD = 10V 1, 2, 3 +25oC0-ns
VDD = 15V 1, 2, 3 +25oC0-ns
Minimum Input Pulse
Width
+TR, -TR, or Reset
TW VDD = 5V 1, 2, 3 +25oC - 140 ns
VDD = 10V 1, 2, 3 +25oC - 80 ns
VDD = 15V 1, 2, 3 +25oC - 60 ns
Input Capacitance CIN Any Input 1, 2 +25oC - 7.5 pF
NOTES:
1. All voltages referenced to device GND.
2. The parameters listed on Table 3 are controlled via design or process and are not directly tested. These parameters are characterized
on initial design release and upon design changes which would affect these characteristics.
3. CL = 50pF, RL = 200K, Input TR, TF < 20ns.
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
Supply Current IDD VDD = 20V, VIN = VDD or GND 1, 4 +25oC-25µA
N Threshold Voltage VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC -2.8 -0.2 V
N Threshold Voltage
Delta ∆VNTH VDD = 10V, ISS = -10µA 1, 4 +25oC-±1V
P Threshold Voltage VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC 0.2 2.8 V
P Threshold Voltage
Delta ∆VPTH VSS = 0V, IDD = 10µA 1, 4 +25oC-±1V
Functional F VDD = 18V, VIN = VDD or GND 1 +25oC VOH >
VDD/2 VOL <
VDD/2 V
VDD = 3V, VIN = VDD or GND
Propagation Delay Time TPHL
TPLH VDD = 5V 1, 2, 3, 4 +25oC - 1.35 x
+25oC
Limit
ns
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
7-644
Specifications CD14538BMS
NOTES: 1. All voltages referenced to device GND.
2. CL = 50pF, RL = 200K, Input TR, TF < 20ns. 3. See Table 2 for +25oC limit.
4. Read and Record
TABLE 5. BURN-IN AND LIFE TEST DELTA PARAMETERS +25OC
PARAMETER SYMBOL DELTA LIMIT
Supply Current - MSI-2 IDD ± 1.0µA
Output Current (Sink) IOL5 ± 20% x Pre-Test Reading
Output Current (Source) IOH5A ± 20% x Pre-Test Reading
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP MIL-STD-883
METHOD GROUP A SUBGROUPS READ AND RECORD
Initial Test (Pre Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 1 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
Interim Test 2 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Interim Test 3 (Post Burn-In) 100% 5004 1, 7, 9 IDD, IOL5, IOH5A, RONDEL10
PDA (Note 1) 100% 5004 1, 7, 9, Deltas
Final Test 100% 5004 2, 3, 8A, 8B, 10, 11
Group A Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B Subgroup B-5 Sample 5005 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11
Subgroup B-6 Sample 5005 1, 7, 9
Group D Sample 5005 1, 2, 3, 8A, 8B, 9 Subgroups 1, 2 3
NOTE: 1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
TABLE 7. TOTAL DOSE IRRADIATION
CONFORMANCE GROUPS MIL-STD-883
METHOD
TEST READ AND RECORD
PRE-IRRAD POST-IRRAD PRE-IRRAD POST-IRRAD
Group E Subgroup 2 5005 1, 7, 9 Table 4 1, 9 Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
FUNCTION OPEN GROUND VDD 9V ± -0.5V
OSCILLATOR
50kHz 25kHz
Static Burn-In 1
(Note 1) 6, 7, 9, 10 1, 3 - 5, 8, 11 - 13,
15 2, 14, 16
Static Burn-In 2
(Note 1) 6, 7, 9, 10 1, 8, 15 2 - 5, 11 - 13, 14,
16
Dynamic Burn-
In (Note 1) - 1, 4, 8, 12, 15 2, 14, 16 6, 7, 9, 10 5, 11 3, 13
Irradiation
(Note 2) 2, 6, 7, 9, 10, 14 1, 8, 15 3 - 5, 11 - 13, 16
TABLE 4. POST IRRADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued)
PARAMETER SYMBOL CONDITIONS NOTES TEMPERATURE
LIMITS
UNITSMIN MAX
7-645
Specifications CD14538BMS
NOTE:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K±5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures, VDD
= 10V ± 0.5V
TABLE 9. FUNCTIONAL TERMINAL CONNECTIONS
FUNCTION
VDD TO TERM # VSS TO TERM # INPUT PULSE TO TERM # OTHER CONNECTIONS
MONO1 MONO2 MONO1 MONO2 MONO1 MONO2 MONO1 MONO2
Leading-Edge Trigger/
Retriggerable 3, 5 11, 13 4 12
Leading-Edge Trigger/
Non-Retriggerable 3 13 4 12 5 - 7 11 - 9
Trailing-Edge Trigger/
Retriggerable 3 13 4 12 5 11
Trailing-Edge Trigger/
Non-Retriggerable 3 13 5 11 4 - 6 12 - 10
NOTE:
1. A triggerable one-shot multivibrator has an output pulse width
which is extended one full time period (T) after application of
the last trigger pulse.
2. A non-triggerable one-shot multivibrator has a time period (T)
referenced from the application of the first trigger pulse.
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS (Continued)
FUNCTION OPEN GROUND VDD 9V ± -0.5V
OSCILLATOR
50kHz 25kHz
T
T
INPUT PULSE TRAIN
RETRIGGERABLE MODE PULSE
WIDTH (+TR MODE)
NON-RETRIGGERABLE MODE
PULSE WIDTH (+TR MODE)
Power-Down Mode
During a rapid power-down condition, as would occur with a
power-supply short circuit or with a poorly filtered power sup-
ply, the energy stored in CX could discharge into Pin 2 or 14.
To avoid possible device damage in this mode, when CX is ≥
0.5 microfarad, a protection diode with a 1-ampere or higher
rating (1N5395 or equivalent) and a separate ground return
for CX should be provided as shown in Figure 1.
An alternate protection method is shown in Figure 2, where
a 51-ohm current-limiting resistor is inserted in series with
CX. Note that a small pulse width decrease will occur how-
ever, and RX must be appropriately increases to obtain the
originally desired pulse width.
FIGURE 1. RAPID POWER-DOWN PROTECTION CIRCUIT
FIGURE 2. ALTERNATE RAPID POWER-DOWN PROTECTION
CIRCUIT
VDD
VSS
16
8
RX2(14)
1(15)
VSS
CX
≥ 0.5µfd
+
IN5395
OR
EQUIVALENT
VDD
VSS
16
8
RX2(14)
1(15)
CX
≥ 0.5µfd
+
51 OHMS
7-646
CD14538BMS
Logic Diagram
FIGURE 3. 1/2 OF DEVICE SHOWN
+
-+
-
=
D
CL CL
FF
R1 R2 Q
Q
p
n
p
n
p
n
VDD
R1
R2
VDD
VSS
COMP
ICOMP
II 7 (9)
Q
6 (10)
VDD
VSS
Q
R2
R1
Q
CL
CL
CL
CL
CL
CL
R1
R2
VCC
CL
VDD
16
VSS
VDD
R4
R3
HIGH Z
VSS
VDD
VSSVSS
VDD
8 VSS
VDD
RX
CX
VDD
VDD
2(14)
1(15)
*
TR 5(11)
4(12)
3(13)
*
TR
*
R
*ALL INPUTS ARE
PROTECTED BY CMOS
PROTECTION NETWORK
FF DETAIL
Q
Typical Performance Characteristics
FIGURE 4. TYPICAL OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS FIGURE 5. MINIMUM OUTPUT LOW (SINK) CURRENT
CHARACTERISTICS
10V
5V
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOL TAGE (VGS) = 15V
0 5 10 15
15
10
5
20
25
30
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
10V
5V
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOL TAGE (VGS) = 15V
0 5 10 15
7.5
5.0
2.5
10.0
12.5
15.0
DRAIN-TO-SOURCE VOLT AGE (VDS) (V)
OUTPUT LOW (SINK) CURRENT (IOL) (mA)
7-647
CD14538BMS
FIGURE 6. TYPICAL OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS FIGURE 7. MINIMUM OUTPUT HIGH (SOURCE) CURRENT
CHARACTERISTICS
FIGURE 8. TYPICAL PROP AGATION DELA Y TIME AS A FUNCTION
OF LOAD CAP ACITANCE (+TR OR -TR TO Q ORQ) FIGURE 9. TYPICAL PROPAGATION DELAY TIME AS A FUNC-
TION OF LOAD CAPACIT ANCE (RESET T O Q ORQ)
FIGURE 10. TYPICAL TRANSITION TIME AS A FUNCTION OF
LOAD CAPACITANCE FIGURE 11. TYPICAL PULSE-WIDTH VARIATION AS A
FUNCTION OF SUPPLY VOLTAGE
Typical Performance Characteristics
(Continued)
-10V
-15V
AMBIENT TEMPERATURE (TA) = +25oC
GATE-TO-SOURCE VOL TAGE (VGS) = -5V
0
-5
-10
-15
DRAIN-TO-SOURCE VOLT AGE (VDS) (V)
-20
-25
-30
0-5-10-15
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
-10V
-15V
AMBIENT TEMPERATURE (TA) = +25oC0
-5
-10
-15
DRAIN-TO-SOURCE VOLT AGE (VDS) (V) 0-5-10-15
OUTPUT HIGH (SOURCE) CURRENT (IOH) (mA)
GATE-TO-SOURCE VOL TAGE (VGS) = -5V
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 5V
10V
15V
020406080100
LOAD CAPACITANCE (CL) pF
100
200
300
400
+TR, -TR PROPAGATION DELAY TIME (tPHL, tPLH)
-ns
AMBIENT TEMPERATURE (TA) = +25oC
SUPPLY VOLTAGE (VDD) = 5V
10V
15V
020406080100
LOAD CAPACITANCE (CL) pF
100
200
300
400
RESETPROPAGATION DELAY TIME (tPHL, tPLH) -ns
AMBIENT TEMPERATURE (TA) = +25oC
LOAD CAPACITANCE (CL) (pF)
0 40 60 80 10020
0
50
100
150
200
SUPPLY VOL TAGE (VDD) = 5V
10V
15V
TRANSITION TIME (tTHL, tTLH) (ns)
AMBIENT TEMPERATURE (TA) = +25oC
PULSE WIDTH VARIATION - PERCENT NORMALIZED
TO VDD = 10V
-3
-2
-1
0
1
2
3
468101214161820
VDD SUPPLY VOLTAGE (VOLTS)
7-648
CD14538BMS
Chip Dimension and Pad Layout
FIGURE 12. TYPICAL PULSE-WIDTH V ARIATION AS A FUNCTION
OF TEMPERA TURE (RX = 100 K Ω, CX = 0.1µF) FIGURE 13. TYPICAL PULSE-WIDTH VARIA TION AS A FUNCTION
OF TEMPERA TURE (RX = 100 K Ω, CX = 2000pF)
FIGURE 14. TYPICAL TOTAL SUPPLY CURRENT AS A FUNC-
TION OF OUTPUT DUTY CYCLE FIGURE 15. TYPICAL TOTAL SUPPLY CURRENT AS A FUNC-
TION OF LOAD CAPACITANCE
Typical Performance Characteristics
(Continued)
SUPPLY VOL TAGE (VDD) = 15V
10V
5V
-3
-2
-1
0
1
2
3
-60 -40 -20 0 20 40 60 80 100 120 140
AMBIENT TEMPERATURE (oC)
TYPICAL PULSE WIDTH VARIATION - PERCENT
NORMALIZED TO VDD = 10V, TA = 25oC
SUPPLY VOL TAGE (VDD) = 5V
10V
5V
-60 -40 -20 0 20 40 60 80 100 120 140
AMBIENT TEMPERATURE (oC)
TYPICAL PULSE WIDTH VARIATION - PERCENT
NORMALIZED TO VDD = 10V, TA = 25oC
-3
-2
-1
0
1
2
3
CL = 50pF, RL = 200KΩ
RX = 100KΩ
AMBIENT TEMPERATURE (TA) =25oC
ONE MONOSTABLE OPERATING
SUPPLY VOLTAGE
(VDD) = 5V
15V
18V
10V
1000
100
10
1
0.1
0.01
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
6
4
2
8642 8642 8642864286428642
0.0001 0.001 0.01 0.1 1 10 100
OUTPUT DUTY CYCLE (%)
TOTAL SUPPLY CURRENT (µA)
8
6
4
2
8
6
4
2
8
6
4
2
8
6
4
2
86428642864286428642
1000
100
10
0
IDD CURRENT (µA) 50% DC
CX CAPACITANCE (pfs)
10 100 1000 10K 100K
RX = 100KΩ
TA = +25oC
SUPPLY VOL TAGE (VDD) = 15V
5V
10V
Dimensions in parentheses are in millimeters
and are derived from the basic inch dimensions
as indicated. Grid graduations are in mils (10-3 inch)
METALLIZATION: Thickness: 11kÅ−14kÅ, AL.
PASSIVATION: 10.4kÅ - 15.6kÅ, Silane
BOND PADS: 0.004 inches X 0.004 inches MIN
DIE THICKNESS: 0.0198 inches - 0.0218 inches
