User's Guide SLVU329A - September 2009 - Revised March 2010 TPS23756EVM This user's guide describes the TPS23756 evaluation module (TPS23756EVM). The TPS23756EVM contains evaluation and reference circuitry for the TPS23756. The TPS23756 integrates a powered-device (PD) controller and power-supply controller targeted at high-power, wide input range, isolated converter topologies. The TPS23756 is compliant with the IEEE 802.3at Power over Ethernet (PoE) standard. 1 2 3 4 5 6 7 8 Contents Description ................................................................................................................... 2 1.1 Features ............................................................................................................. 2 1.2 Applications ......................................................................................................... 2 Electrical Specifications .................................................................................................... 3 Schematic .................................................................................................................... 4 General Configuration and Description .................................................................................. 5 4.1 Physical Access .................................................................................................... 5 Test Setup ................................................................................................................... 7 TPS23756EVM Typical Performance Data .............................................................................. 7 6.1 5-V DC/DC Efficiency .............................................................................................. 7 6.2 TPS23756EVM Conducted Emissions .......................................................................... 9 EVM Assembly Drawings and Layout Guidelines ...................................................................... 9 7.1 PCB Drawings ...................................................................................................... 9 7.2 Layout Guidelines ................................................................................................ 11 7.3 EMI Containment ................................................................................................. 12 Bill of Materials ............................................................................................................. 13 List of Figures 1 TPS23756EVM Schematic (DC-DC Converter)......................................................................... 4 2 TPS23756EVM Schematic (PoE and Adapter Input Terminals) ...................................................... 5 3 Typical TPS23756EVM Test Setup ....................................................................................... 7 4 TPS23756EVM Efficiency With 12-V Input .............................................................................. 8 5 TPS23756EVM Efficiency With 24-V Input .............................................................................. 8 6 TPS23756EVM Efficiency With 48-V Input .............................................................................. 9 7 TPS23756EVM Conducted Emissions ................................................................................... 9 8 Top-Side Layout/Routing ................................................................................................. 10 9 Layer-Two Routing ........................................................................................................ 10 10 Layer-Three Routing ...................................................................................................... 11 11 Bottom-Side Placement/Routing......................................................................................... 11 1 TPS23756EVM Electrical and Performance Specifications ........................................................... 3 2 Connector Functionality .................................................................................................... 6 3 Test Points ................................................................................................................... 6 4 TPS23756EVM Bill of Materials ......................................................................................... 13 List of Tables SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated TPS23756EVM 1 Description 1 www.ti.com Description The TPS23756EVM allows reference circuitry evaluation of the TPS23756. It contains input and output power connectors and an array of onboard test points for circuit evaluation. 1.1 Features * * * 1.2 Applications * * * 2 High-power PD and DC-DC converter controllers - IEEE 802.3at-compliant PD controller with adapter preference support - Converter controller supports high-efficiency, isolated converter topologies Wide-input voltage range DC-DC converter - Active clamp forward converter design using self-driven synchronous rectifiers - End-to-end efficiency at full load: 89% (12 V), 91% (24 V), 88% (48 V), 85% (PoE) - Converter efficiency at full load: 91% (12 V), 91% (24 V), 88% (PoE or 48 V) - 5-V, 5-A output (25 W) over a 10- to 57-V input voltage range Operates from PoE or external adapters - Integrated 1000base-T RJ-45 jack including transformer and cable terminations - Operates from 12-V, 24-V, and 48-V wall adapters - Onboard, "efficient diode" (replaces standard adapter diode) circuit when operating from 12-V adapters - Selection of option 1 (PD input using PPD pin) or option 2 (converter input using APD pin) adapter input power using jumpers - Selection of PPD1 or PPD2 mode using jumpers - Supports option 2 adapter input with either PoE or adapter preference - Onboard "smooth handoff" circuit for 48-V adapter using PoE as a hot backup Voice over Internet Protocol - IP telephones Wireless LAN - Wireless Access Points Security - Wired IP cameras TPS23756EVM SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated Electrical Specifications www.ti.com 2 Electrical Specifications Table 1. TPS23756EVM Electrical and Performance Specifications PARAMETER CONDITION MIN TYP MAX UNITS POWER INTERFACE Input voltage Applied to the power pins of connectors J4 or J7 Operating voltage After start-up Input UVLO Rising input voltage 0 - 57 V 30 - 57 V - - 36 V Falling input voltage 30 - - V Detection voltage At device terminals 1.6 - 10 V Classification voltage At device terminals 100 - 23 V Classification current Rclass = 63.4 38 - 42 mA Inrush current-limit 100 - 180 mA Operating current-limit 850 - 1100 mA V DC/DC CONVERTER Output voltage 10.5 V Vin 57 V, ILOAD ILOAD (max) 5-V output 4.75 5.00 5.25 Output current 10.5 V Vin 57 V 5-V output - - 5 A Output ripple voltage, peak-to-peak Vin = 44 V, ILOAD = 5 A 5-V output - 50 - mV Efficiency, end-to-end Vin = 44 V, ILOAD = 5 A 5-V output - 85% - 225 - 275 Switching frequency SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated TPS23756EVM kHz 3 Schematic Schematic 3 2 1 1 3 www.ti.com Figure 1. TPS23756EVM Schematic (DC-DC Converter) 4 TPS23756EVM SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated General Configuration and Description www.ti.com 3 1 2 1 1 3 Figure 2. TPS23756EVM Schematic (PoE and Adapter Input Terminals) 4 General Configuration and Description 4.1 Physical Access Table 2 lists the TPS23756EVM connector functionality and Table 3 describes the test point availability. SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated TPS23756EVM 5 General Configuration and Description www.ti.com Table 2. Connector Functionality Connector Label Description J7 ADAPTER External adapter input. J10 (low side) and J11 (high side) can select whether the adapter is at the PD controller input (VDD to VSS) or at the converter input (VDD1 to RTN). J8 is used to select PPD or APD function. J9 along with J8 set to PPD can select the PPD1 or PPD2 function. J1 VOUT Output voltage connector. J4 DATA + PoE POWER Ethernet power input connector. Contains Ethernet transformer and cable terminations J5 DATA PORT Ethernet data port connector J6 EGND Earth GND connection Table 3. Test Points Test Point TP2, TP16, TP17 6 Color Label Description BLK GND Secondary-side (output) grounds (GND) TP4 RED VC TP5 ORG DRAIN DC/DC converter bias supply TP9 BLK VSS POE input, low side DC/DC converter return Drain terminal of the primary-side switching MOSFET TP10, TP14 BLK RTN TP12 ORG LOOP Can be used with TP11 for overall feedback loop measurements. TP11 RED VOUT DC/DC converter output voltage. TP13 WHT CTL Control loop input to the pulse width modulator TP8 WHT RCS DC/DC converter primary-side switching MOSFET current sense (before external slope comp resistor). TP3 RED VB TP7 WHT GATE Gate drive for the primary-side switching MOSFET TP6 WHT GAT2 Gate drive for the primary-side active clamp MOSFET TP1 RED PVDD1 TP15 WHT T2P Type 2 PSE output from TPS23756 TP19 RED P78 Pair 7, 8 TP20 ORG P12 Pair 1, 2 TP18 ORG P45 Pair 4, 5 Bias voltage regulator Transformer primary high side. TP21 RED P36 Pair 3, 6 D11 GRN T2P Type 2 PSE indicator. Remove the shunt on J3 to inhibit the T2P indicator. D12 RED POWER ON Output power indicator. Remove the shunt on J2 to inhibit the output power indicator. CL1 NA CL1 TPS23756EVM CL1 provides a connection between VDD and VDD1, shorting out D25. Removing the short at CL1 allows certain power source priority schemes to be evaluated. SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated Test Setup www.ti.com 5 Test Setup Figure 3 shows a typical test setup for TPS23756EVM. Input voltage can be applied as described in Table 2. AUX Power Source J7 PSE Or Power Supply - (Ethernet Cable) + J4 DUT TPS23756EVM J5 VOUT J1 GND Data to PHY (Ethernet Cable) RLOAD Figure 3. Typical TPS23756EVM Test Setup 6 TPS23756EVM Typical Performance Data 6.1 5-V DC/DC Efficiency Figure 4, Figure 5, and Figure 6 highlight the TPS23756EVM efficiency over input voltage. Nsupply is measured from TP1/TP10 to J1-1/2; Nadapter is measured from J7-1/2 to J1-1/2; and PoE is measured from J4 input to J1-1/2. SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated TPS23756EVM 7 TPS23756EVM Typical Performance Data www.ti.com 95 90 Nadapter 85 Nsupply Efficiency - % 80 75 70 65 60 55 50 0 1 2 3 4 IO - Output Current - A 5 6 Figure 4. TPS23756EVM Efficiency With 12-V Input 95 90 Nadapter Nsupply 85 Efficiency - % 80 75 70 65 60 55 50 0 1 2 3 4 IO - Output Current - A 5 6 Figure 5. TPS23756EVM Efficiency With 24-V Input 8 TPS23756EVM SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated EVM Assembly Drawings and Layout Guidelines www.ti.com 95 90 Nsupply 85 Nadapter Efficiency - % 80 PoE 75 70 65 60 55 50 0 1 2 3 4 IO - Output Current - A 5 6 Figure 6. TPS23756EVM Efficiency With 48-V Input 6.2 TPS23756EVM Conducted Emissions HPA479 (TPS23756EVM) 48V PoE Input 5V / 4A Output Class B Quasi-Peak Limit Class B Average Limit Figure 7. TPS23756EVM Conducted Emissions 7 EVM Assembly Drawings and Layout Guidelines 7.1 PCB Drawings The following figures shows component placement and layout. SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated TPS23756EVM 9 EVM Assembly Drawings and Layout Guidelines www.ti.com Figure 8. Top-Side Layout/Routing Figure 9. Layer-Two Routing 10 TPS23756EVM SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated EVM Assembly Drawings and Layout Guidelines www.ti.com Figure 10. Layer-Three Routing Figure 11. Bottom-Side Placement/Routing 7.2 Layout Guidelines The layout of the PoE front end must follow power and EMI/ESD best practice guidelines. A basic set of recommendations include: * Parts placement must be driven by power flow in a point-to-point manner; RJ-45, Ethernet transformer, diode bridges, TVS and 0.1-mF capacitor, and TPS23756 converter input bulk capacitor. * All leads must be as short as possible with wide power traces and paired signal and return. * There must not be any crossovers of signals from one part of the flow to another. * Spacing consistent with safety standards like IEC60950 must be observed between the 48-V input voltage rails and between the input and an isolated converter output. * The TPS23756 must be located over split, local ground planes referenced to VSS for the PoE input and to RTN for the converter. Whereas the PoE side may operate without a ground plane, the converter side must have one. Logic ground and power layers must not be present under the Ethernet input or the converter primary side. * Large copper fills and traces must be used on SMT power-dissipating devices, and wide traces or overlay copper fills must be used in the power path. SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated TPS23756EVM 11 EVM Assembly Drawings and Layout Guidelines www.ti.com The DC/DC converter layout can benefit from basic rules such as: * Pair signals to reduce emissions and noise, especially the paths that carry high-current pulses which include the power semiconductors and magnetics. * Minimize trace length of high-current, power semiconductors and magnetic components. * Where possible, use vertical pairing. * Use the ground plane for the switching currents carefully. * Keep the high-current and high-voltage switching away from low-level sensing circuits including those outside the power supply. * Pay special attention to spacing around the high-voltage sections of the converter. 7.3 EMI Containment * * * * * * * * * * * * * * * * * * * * * 12 Use compact loops for dv/dt and di/dt circuit paths (power loops and gate drives). Use minimal, yet thermally adequate, copper areas for heat sinking of components tied to switching nodes (minimize exposed radiating surface). Use copper ground planes (possible stitching) and top layer copper floods (surround circuitry with ground floods). Use four-layer PCB if economically feasible (for better grounding). Minimize the amount of copper area associated with input traces (to minimize radiated pickup). Hide copper associated with switching nodes under shielded magnetics where possible. Heat sink the "quiet side" of components instead of the "switching side" where possible (like the output side of inductor). Use Bob Smith terminations, Bob Smith EFT capacitor, and Bob Smith plane. Use Bob Smith plane as ground shield on input side of PCB (creating a phantom or literal earth ground). Use LC filter at DC/DC input. Dampen high-frequency ringing on all switching nodes if present (allow for possible snubbers). Control rise times with gate drive resistors and possibly snubbers. Switching frequency considerations Use of EMI bridge capacitor across isolation boundary (isolated topologies) Observe the polarity dot on inductors (embed noisy end). Use of ferrite beads on input (allow for possible use of beads or 0- resistors) Maintain physical separation between input-related circuitry and power circuitry (use ferrite beads as boundary line). Balance efficiency vs acceptable noise margin Possible use of common-mode inductors Possible use of integrated RJ-45 jacks (shielded with internal transformer and Bob Smith terminations) End-product enclosure considerations (shielding) TPS23756EVM SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated Bill of Materials www.ti.com 8 Bill of Materials Table 4. TPS23756EVM Bill of Materials Count RefDes Value Description Size Part Number MFR 1 C1 0.047uF Capacitor, Ceramic, 250V, X7R, 10% 1206 Std Std 1 C11 2200pF Capacitor, Ceramic, 100V, X7R, 10% 0805 Std Std 2 C13, C17 220uF Capacitor, Aluminum, 10V, 20% 0.328 x 0.354 inch EEV-FK1A221P Panasonic 1 C14 1.0uF Capacitor, Ceramic, 25V, X7R, 10% 0805 Std Std 1 C15 22uF Capacitor, Aluminum, 25V, 20% 5x5.8mm EEVFK1E220R Panasonic 1 C16 47pF Capacitor, Ceramic, 50V, C0G, 5% 0603 Std Std 1 C18 10pF Capacitor, Ceramic, 50V, X7R, 10% 0603 Std Std 1 C19 1.0uF Capacitor, Ceramic, 16V, X7R, 10% 0603 Std Std 1 C2 1uF Capacitor, Ceramic, 16V, X7R, 20% 0603 C1608X7R1C105M TDK 1 C20 2200pF Capacitor, Ceramic, 2KV, X7R, 10% 1812 C4532X7R3D222K TDK 1 C21 10pF Capacitor, Ceramic, 50V, C0G, 5% 0603 Std Std 1 C22 22nF Capacitor, Ceramic, 50V, X7R, 10% 0603 Std Std 1 C23 10nF Capacitor, Ceramic, 50V, X7R, 10% 0603 Std Std 1 C24 2.2uF Capacitor, Ceramic, 16V, X7R, 10% 0805 Std Std 2 C25, C28 1nF Capacitor, Ceramic, 100V, X7R, 10% 0805 Std Std 1 C26 1000pF Capacitor, Ceramic, 2kV, X7R, 10% 1210 Std TDK 2 C27, C30 10nF Capacitor, Ceramic, 100V, X7R, 10% 0603 Std Std 2 C3, C8 2.2uF Capacitor, Ceramic, 100V, X7R, 10% 1210 Std Std 3 C4, C10, C29 0.1uF Capacitor, Ceramic, 100V, X7R, 10% 0805 Std Std 1 C5 1uF Capacitor, Ceramic, 100V, X7R, 10% 1210 Std Std 2 C6, C7 22uF Capacitor, Aluminum, 100V, 20% 8x10.2mm EEVFK2A220P Panasonic 2 C9, C12 22uF Capacitor, Ceramic, 10-V, X7R, 10% 1210 GRM32ER71A226KE20L Murata 1 CL1 AWG 24 Wire, 24AWG, Solid, non-insulated, 0.30 inches 0.300 X AWG 24 NA NA 5 D1, D2, D4, D5, D9 BAS16 Diode, Switching, 75V, 200mA SOT23 BAS16LT1 Vishay-Liteon 1 D10 BAT54S Diode, Dual Schottky, 200-mA, 30-V SOT23 BAT54S Zetex 1 D11 GREEN Diode, LED, GRN, 2.0-V, 650-mcd, SM 1210 LTST-C930KGKT LITE-ON INC 1 D12 RED Diode, LED, RED, 2.0-V, 850-mcd, SM 1210 LTST-C930KRKT LITE-ON INC 8 D13, D14, D15, D16, D17, D18, D19, D20 B1100 Diode, Schottky, 1A, 100V SMA B1100 Diodes, Inc 0 D21 V8P10 Diode, High Current, Trench MOS Barrier Schottky, 100V, 8A TO-277A[SMPC] V8P10 Vishay 1 D25 V8P10 Diode, High Current, Trench MOS Barrier Schottky, 100V, 8A TO-277A[SMPC] V8P10 Vishay 1 D22 30V Diode, Zener, 200mW, 30V SOD-323 BZT52C30S Diodes Inc. 1 D23 12V Diode, Zener, 12V, 5-mA SOD-123 BZT52C12 Diodes Inc 1 D24 5.1V Diode, Zener, 200mW, 5.1V SOD-323 BZT52C5V1S Diodes Inc. SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback TPS23756EVM Copyright (c) 2009-2010, Texas Instruments Incorporated 13 Bill of Materials www.ti.com Table 4. TPS23756EVM Bill of Materials (continued) Count RefDes 14 Value Description Size Part Number MFR 1 D26 SMAJ24A Diode, TVS, 24-V, 1W SMA SMAJ24A Diodes Inc. 3 D3, D27, D28 SMAJ58A Diode, TVS, 58-V, 1W SMA SMAJ58A Diodes Inc. 1 D6 BAS20 Diode, Switching, 200-mA, 200-V, 330-mW SOT23 BAS20 Zetex 2 D7, D8 12V Diode, Zener, 12-V SOT23 BZX84C12LT1 ON Semiconductor 2 FB1, FB2 500 Bead, Ferrite, 2000mA, 60 m 1206 MI1206L501R-10 Steward 2 FB3, FB4 91-Ohm Bead, SMD 3A, Low DC Resistance 1806 EXCML45A910H Panasonic 3 J1, J6, J7 ED555/2DS Terminal Block, 2-pin, 6-A, 3,5mm 0.27 x 0.25 ED555/2DS OST 2 J2, J3 PEC02SAAN Header, Male 2-pin, 100mil spacing, 0.100 inch x 2 PEC02SAAN Sullins 1 J4 7499511001 Connector, RJ45 PoE+Enabled, 1000 Base-T 0.670 x 1.300 inch 7499511001 Wuerth Electronics 1 J5 5556416-1 Connector, Jack Modular, Vertical, Pos. 0.655 x 0.615 inch 5556416-1 AMP 4 J8, J9, J10, J11 PEC03SAAN Header, Male 3-pin, 100mil spacing, 0.100 inch x 3 PEC03SAAN Sullins 1 L1 3.3uH Inductor, SM Toroid, 3.3A, 20-m 0.287 x 0.287 inch MSS7341-332 Coilcraft 1 L2 10uH Inductor, SMT, 7-A, 9-m 0.508 x 0.516 inch SER1360-103KL Coilcraft 1 L3 1mH Inductor, SMT, 100mA, 16.3 0.169 x 0.169 inch LPS4414-105MLC Coilcraft 1 Q1 Si7119DN MOSFET, Fast Switching, PChan, -200V, 3.8A, 1.05 PWRPAK 1212 Si7119DN Vishay 1 Q2 SI7852DP MOSFET, NChan, 80V, 12A, 16-m PWRPAK S0-8 SI7852DP Vishay 1 Q3 MMBTA06 Bipolar, NPN, 80V, 500mA SOT23 MMBTA06LT1 ON Semiconductor 1 Q4 SI4894BDY MOSFET, Nch, 30V, 12A, 11m SO8 SI4894BDY Vishay 1 Q5 Si7456DP MOSFET, NChan, 100V, 9.3A, 25-m PWRPAK S0-8 Si7456DP Vishay 1 Q6 BSS119 MOSFET, Nch, 100V, 0.17A, 6 SOT23 BSS119 Infineon 1 Q7 Si7489DP MOSFET, PChan, -100V, -28A, 41m PWRPAK S0-8 Si7489DP Vishay 2 R1, R15 10K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R10 2.2 Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R11 1K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R12 11 Resistor, Chip, 1/10W, 1% 0603 Std Std 1 R13 49.9 Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R14 499 Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R16 2K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R17 681 Resistor, Chip, 1/16W, 1% 0603 Std Std 2 R18, R31 41.2K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R19 6.49K Resistor, Chip, 1/10-W, 1% 0805 Std Std 2 R2, R29 0 Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R20 1K Resistor, Chip, 1/10-W, 1% 0805 Std Std 1 R22 13.7K Resistor, Chip, 1/16W, 1% 0603 Std Std 4 R23, R24, R25, R26 75 Resistor, Chip, 1/16W, 1% 0603 Std Std 2 R27, R30 54.9K Resistor, Chip, 1/16W, 1% 0603 Std Std TPS23756EVM SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback Copyright (c) 2009-2010, Texas Instruments Incorporated Bill of Materials www.ti.com Table 4. TPS23756EVM Bill of Materials (continued) Count RefDes Value Description Size Part Number MFR 2 R28, R34 20K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R3 10 Resistor, Chip, 1/2W, 5% 1210 Std Std 1 R32 105K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R33 5.49K Resistor, Chip, 1/16W, 1% 0603 Std Std 0 R35 1.8K Resistor, Chip, 1/2W, 1% 2010 Std Std 0 R36 3.30 Meg Resistor, Chip, 1/10W, 1% 0603 Std Std 2 R4, R21 24.9K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R5 2K Resistor, Chip, 1/4W, 5% 1210 Std Std 1 R6 69.8K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R7 80.6K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R8 100K Resistor, Chip, 1/16W, 1% 0603 Std Std 1 R9 63.4 Resistor, Chip, 1/10W, 1% 0805 Std Std 1 T1 or T2 83501095FC/JA4249CL or PA2887NL Transformer, forward, 5V, 5A, 1.25:1 0.860 x 1.150 inch 835-01095FC/JA4249-CL or PA2887NL E&E Magnetics/Coilcraft or Pulse 1 T3 P8208NLT Transformer, 100:1, 10A, 6 m DCR 0.330 x 0.360 inch P8208NLT Pulse 6 TP1, TP3, TP4, TP11, TP19, TP21 5010 Test Point, Red, Thru Hole 0.125 x 0.125 inch 5010 Keystone 6 TP2, TP9, TP10, TP14, TP16, TP17 5011 Test Point, Black, Thru Hole 0.125 x 0.125 inch 5011 Keystone 4 TP5, TP12, TP18, 5013 TP20 Test Point, Orange, Thru Hole 0.125 x 0.125 inch 5013 Keystone 5 TP6, TP7, TP8, TP13, TP15 5012 Test Point, White, Thru Hole 0.125 x 0.125 inch 5012 Keystone 1 U1 TPS23756PWP IC, IEEE 802.3at PoE Interface and Isolated Converter Controller PWP20 TPS23756PWP TI 1 U2 TCMT1107 IC, Photocoupler, 3750VRMS, 80-160% CTR MF4 TCMT1107 Vishay 1 U3 TLV431A IC, Shunt Regulator, 6V, 10mA, 1% SOT23-5 TLV431ACDBVR TI 2566 SPC 929950-00 3M HPA479 Any 4 Bumpons 6 -- Shunt, Black 100-mil 1 -- PCB, 5.75 In x 2.25 In x 0.062 In SLVU329A - September 2009 - Revised March 2010 Submit Documentation Feedback TPS23756EVM Copyright (c) 2009-2010, Texas Instruments Incorporated 15 Evaluation Board/Kit Important Notice Texas Instruments (TI) provides the enclosed product(s) under the following conditions: This evaluation board/kit is intended for use for ENGINEERING DEVELOPMENT, DEMONSTRATION, OR EVALUATION PURPOSES ONLY and is not considered by TI to be a finished end-product fit for general consumer use. Persons handling the product(s) must have electronics training and observe good engineering practice standards. As such, the goods being provided are not intended to be complete in terms of required design-, marketing-, and/or manufacturing-related protective considerations, including product safety and environmental measures typically found in end products that incorporate such semiconductor components or circuit boards. This evaluation board/kit does not fall within the scope of the European Union directives regarding electromagnetic compatibility, restricted substances (RoHS), recycling (WEEE), FCC, CE or UL, and therefore may not meet the technical requirements of these directives or other related directives. Should this evaluation board/kit not meet the specifications indicated in the User's Guide, the board/kit may be returned within 30 days from the date of delivery for a full refund. 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It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference. EVM Warnings and Restrictions It is important to operate this EVM within the input voltage range of 0 V to 57 V and the output voltage range of 4 V to 6 V . Exceeding the specified input range may cause unexpected operation and/or irreversible damage to the EVM. If there are questions concerning the input range, please contact a TI field representative prior to connecting the input power. Applying loads outside of the specified output range may result in unintended operation and/or possible permanent damage to the EVM. Please consult the EVM User's Guide prior to connecting any load to the EVM output. If there is uncertainty as to the load specification, please contact a TI field representative. During normal operation, some circuit components may have case temperatures greater than 85C. The EVM is designed to operate properly with certain components above 85C as long as the input and output ranges are maintained. These components include but are not limited to linear regulators, switching transistors, pass transistors, and current sense resistors. These types of devices can be identified using the EVM schematic located in the EVM User's Guide. When placing measurement probes near these devices during operation, please be aware that these devices may be very warm to the touch. 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