2004 Microchip Technology Inc. DS21915A-page 1
MCP73853/55
Features
Linear Charge Management Controllers
- Integrated Pass Transistor
- Integrated Current Sense
- Reverse Blocki ng Protection
High-Accu racy Preset V olt age Regulation : + 0.5%
Two Selectable Voltage Regulation Options:
- 4.1V, 4.2V
Programmable Charge Current
USB Compatible Charge Current Settings
Programmable Safety Charge Timers
Preconditioning of Deeply Depleted Cells
Automatic End-of-Charge Control
Optiona l Continuous Ce ll Temperature
Monitoring:
- MCP73853
Charge Status Output for Direct LED Drive
Fault Output for Direct LED Drive
- MCP73853
Automatic Power-Down
Thermal Regulation
Temperature Range: -40°C to +85°C
Packaging:
- 16-Lead, 4x4 mm QFN (MCP73853)
- 10-Lead, 3x3 mm DFN (MCP73855)
Applications
Lithium-Ion/Lithium-Polymer Battery Chargers
Personal Data Assistants (PDAs)
Cellu lar Telep hon es
Hand-Held Instruments
Cradle Chargers
•Digital Cameras
MP3 Players
Bluetooth Headsets
USB Chargers
Description
The MCP7385X devices are highly advanced linear
charge management controllers for use in space-
limited, cost-sensitive applications. The MCP73853
combines high-accuracy constant-voltage, constant-
current regulation, cell preconditioning, cell temperature
monitoring, advanced safety timers, automatic charge
termination, internal current sensing, reverse blocking
protection and charge status and fault indication in a
space-saving 16-lead, 4 x 4 QFN package.
The MCP73855 employs all the features of the
MCP73853, with the exception of the cell temperature
monitor and one status output. The MCP73855 is
of fe red i n a s p a ce-s a vi ng 1 0-le ad, 3 x 3 DFN pa ck ag e.
The MCP73853 and MCP73855 are designed
specifically for USB applications, adhering to all the
specifications governing the USB power bus.
The MCP7385X dev ices provide two selectable voltage
regulation options (4.1V or 4.2V) for use with either
coke or graphite anodes.
The MCP7385X devices provide complete, fully-
functional, charge management solutions, operating
with an input voltage range of 4.5V to 5.5V.
The MCP7385X devices are fully specified over the
ambient temperature range of -40°C to +85°C.
Package Types
VDD1
VBAT1
THERM EN
TIMER
STAT1
1
2
3
4
MCP73853
141516
PROG
VDD2
VSET
THREF
VSS3
VBAT3
VBAT2
5678
9
10
11
12
VSS2
13
1
2
3
4
56
7
8
9
10
VSS1
STAT2STAT2
16-Pin QFN
10-Pin DFN
EN
STAT1
VDD1
VSET
VSS1
PROG
VBAT1
VBAT2
VSS2
TIMER
MCP73855
USB Compatible Li-Ion/Li-Polymer
Charge Management Controllers
MCP73853/55
DS21915A-page 2 2004 Microchip Technology Inc.
Typical Application
Functional Block Diagram
EN
STAT1
VSET
VDD1
VSS
TIMER
PROG
VBAT1
VBAT2
+
Single
Lithium-Ion
Cell
3
2
MCP73855
56
4, 7
9
8
10
1
5V
4.7 µF
400 mA Lithium-Ion Battery Charger
4.7 µF
0.1 µF
+
Charge
Term ination
Comparator
Voltage Control
Amplifier
+
UVLO
COMPARATOR
VUVLO
+
-
Temperature
Comparators
+
-
Bias and
Reference
Generator
VUVLO
VREF(1.2V)
Power-On
Delay
+
+
VREF
VREF
Oscillator
IREG/12
Constant-voltage/
Recharge Comp.
Precondition
Control Charge_OK
Precon
VDD
Charge Current
Control Amplifier
+
VREF
VREF
+
Precondition
Comp.
Charge Control,
Charge Ti m ers,
and
Status Logic Drv Stat 2
Drv Stat 1
Charge_OK
IREG/12
VDD1
THERM
EN
TIMER
STAT1
STAT2
VBAT3
VSS1
PROG
VSET
THREF
VBAT1
90
110 k
10 k
10 k
100 k
50 k
50 k
G = 0.001
11 k
3k
600 k
149 k
1.58 k
VDD2 VBAT2
300 k
10.3 k
4k
Direction
Control
k
VSS2
VSS3
MCP73853 ONLY MCP73853 ONLY
2004 Microchip Technology Inc. DS21915A-page 3
MCP73853/55
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings*
VDD1,2...............................................................................6.5V
All Inputs and Outputs w.r.t. VSS..............-0.3 to (VDD + 0.3)V
Maximum Junction Temperature, TJ............In ternally Limited
Storage temperature ................... .. .. ..... .. .. .... .-65°C to +150°C
ESD protection on all pins:
Human Body Model (1.5kW in Series with 100pF) ....4 kV
Machine Model (200pF, No Series Resistance) ..........400V
*Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to m aximum rating conditions for ext ended periods
may affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG(Typ) + 0.3V] to 5.5V,
TA = -40°C to 85°C. Typical values are at +25°C, VDD = [VREG (Typ) + 1.0V]
Parameters Sym Min Typ Max Units Conditions
Supply Input
Supply Voltage VDD 4.5 5.5 V
Supply Current ISS 0.28 4 µA Disabled
0.83 4 mA Operating
UVLO Start Thre shold VSTART 4.25 4.45 4.65 V VDD Low-to-High
UVLO Stop Threshold VSTOP 4.20 4.40 4.55 V VDD High-to-Low
Volta ge Regula tion (Constant-Voltage Mod e)
Regulated Output Voltage VREG 4.079 4.1 4.121 V VSET = VSS
4.179 4.2 4.221 V VSET = VDD
VDD = [VREG(Typ) + 1V],
IOUT =10mA, T
A = -5°C to +55°C
Line Regulation |(∆VBAT/
VBAT)| /VDD
0.020 0.25 %/V VDD = [VREG(Typ) + 1V] to 5.5V
IOUT = 10 mA
Load Regulation |∆VBAT/VBAT|— 0.0220.25 %I
OUT = 10 mA to 150 mA
VDD = [VREG(Typ) + 1V]
Supply Ripple Attenuation PSRR —50dBI
OUT = 10 mA, 10 Hz to 1 kHz
—26dBI
OUT = 10 mA, 10 Hz to 10 kHz
—24dBI
OUT = 10 mA, 10 Hz to 1 MHz
Output Re ve rse -Leakage
Current IDISCHARGE —0.24 1µA
VDD < VBAT = VREG(Typ)
Current Regulation (Fast Charge Const a nt-Curren t Mode)
Fast Charge Current
Regulation IREG 70 85 100 mA PROG = OPEN
325 400 475 mA PROG = VSS
TA = -5°C to +55°C
Preconditioning Current Regulation (Trickle Charge Constant-Current Mode)
Precondition Current
Regulation IPREG 5 9 15 mA PROG = OPEN
25 40 75 mA PROG = VSS
TA = -5°C to +55°C
Precondition Threshold
Voltage VPTH 2.70 2.80 2.90 V VSET = VSS
2.75 2.85 2.95 V VSET = VDD
VBAT Low- to-High
MCP73853/55
DS21915A-page 4 2004 Microchip Technology Inc.
Charge Termination
Charge Termination Current ITERM 3.7 6.5 9.3 mA PROG = OPEN
18 32 46 mA PROG = VSS
TA = -5°C to +55°C
Automatic Recharge
Recharge Threshold Voltage VRTH VREG
300mV VREG
200mV VREG
100mV VV
BAT High-to-Low
Thermistor Reference - MCP73853
Thermistor Re fere nce
Output Voltage VTHREF 2.4752.552.625VT
A = 25°C, VDD = VREG(Typ) + 1V,
ITHREF = 0 mA
Thermis tor Refere nc e
Source Current ITHREF 200 µA
Thermis tor Refere nc e Line
Regulation |(∆VTHREF/
VTHREF)|/VDD
0.05 0.25 %/V VDD = [VREG (Typ) + 1V] to 5.5V
Thermis tor Refere nc e Load
Regulation |∆VTHREF/
VTHREF|
0.02 0.10 % ITHREF = 0 mA to 0.20 mA
Thermistor Comparator - MCP73853
Upper Trip Threshold VT1 1.18 1.25 1.32 V
Upper Trip Point Hysteresis VT1HYS —-50mV
Lower Trip Threshol d VT2 0.59 0.62 0.66 V
Lower Trip Point Hysteresis VT2HYS —80mV
Input Bias Current IBIAS —— 2µA
Status Indicator – STAT1, STAT2
Sink Current ISINK 4812mA
Low Ou tput Voltage VOL 200 400 mV ISINK = 1 mA
Input Leakage Current ILK —0.01 1µAI
SINK = 0 mA, VSTAT1,2 = 5.5V
Enable Input
Input High Voltage Level VIH 1.4 V
Input Low Voltage Level VIL ——0.8V
Input Leakage Current ILK —0.01 1µAV
ENABLE = 5.5V
Thermal Shutdown
Die Temperature TSD —155°C
Die Temperature Hysteresis TSDHYS —10—°C
DC CHARACTERISTICS (Continued)
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG(Typ) + 0.3V] to 5.5V,
TA = -40°C to 85°C. Typical values are at +25°C, VDD = [VREG (Typ) + 1.0V]
Parameters Sym Min Typ Max Units Conditions
2004 Microchip Technology Inc. DS21915A-page 5
MCP73853/55
TEMPERATURE SPECIFICATIONS
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG (Typ) + 0.3V] to 5.5V,
TA = -40°C to 85°C. Typical values are at +25°C, VDD = [VREG (Typ) + 1.0V]
Parameters Sym Min Typ Max Units Conditions
UVLO Start Delay tSTART —— 5 msV
DD Low-to-High
Current Regulation
Transition Time Out of
Preconditioning tDELAY —— 1 msV
BAT < VPTH to VBAT > VPTH
Current Rise Time Out of
Preconditioning tRISE —— 1 msI
OUT Rising to 90% of IREG
Fast Charge Safety Timer
Period tFAST 1.1 1.5 1.9 Hours CTIMER = 0.1 µF
Preconditioning Current Regulation
Preconditioning Charge
Safety Timer Period tPRECON 45 60 75 Minutes CTIMER = 0.1 µF
Charge Termination
Elapse d Time Termination
Period tTERM 2.2 3 3.8 Hours CTIMER = 0.1 µF
Status Indicators
Status Output turn-off tOFF 200 µs ISINK = 1 mA to 0 mA
Status Output turn-on tON 200 µs ISINK = 0 mA to 1 mA
Electrical Specifications: Unless otherwise indicated, all limits apply for VDD = [VREG (Typ) + 0.3V] to 5.5.
Typical values are at +25°C, VDD = [VREG (Typ) + 1.0V]
Parameters Sym Min Typ Max Units Conditions
Temperature Ranges
Sp ecified Temperature Range TA-40 +85 °C
Operati ng Tempe rature Range TJ-40 +125 °C
Storage Temperature Range TA-65 +150 °C
Thermal Package Resistances
Therm al Re si st a n c e, 16 -L, 4mm x 4mm QF N θJA —37°C/W
4-Layer JC51-7
Standard Board,
Natural Convection
Thermal Resistance, 10-L, 3mm x 3mm DFN θJA —51°C/W
4-Layer JC51-7
Standard Board,
Natural Convection
MCP73853/55
DS21915A-page 6 2004 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES
NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C.
FIGURE 2-1: Battery Regulation Voltage
(VBAT) vs. Charge Current (IOUT).
FIGURE 2-2: Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
FIGURE 2-3: Battery Regulation Voltage
(VBAT) vs. Supply Voltage (VDD).
FIGURE 2-4: Supply Current (ISS) vs.
Charge Current (IOUT).
FIGURE 2-5: Supply Current (ISS) vs.
Supply Voltage (VDD).
FIGURE 2-6: Supply Current (ISS) vs.
Supply Voltage (VDD).
Note: The g r ap hs and t ables provided following thi s n ote are a statis tic al s umm ar y based on a l im ite d n um ber of
samples and are provided for informational purposes only. The performance charac teristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
4.150
4.170
4.190
4.210
4.230
4.250
0 50 100 150 200 250 300 350 400
IOUT (mA)
VBAT (V)
VSET = V
DD
VDD = 5.2 V
4.150
4.170
4.190
4.210
4.230
4.250
4.5 4.7 4.9 5.1 5.3 5.5
VDD (V)
VBAT (V)
VSET = VDD
IOUT = 375 mA
4.150
4.170
4.190
4.210
4.230
4.250
4.5 4.7 4.9 5.1 5.3 5.5
VDD (V)
VBAT (V)
VSET = VDD
IOUT
= 10 mA
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
0 50 100 150 200 250 300 350 400
IOUT (mA)
ISS (mA)
VSET = VDD
VDD = 5.2 V
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
4.5 4.7 4.9 5.1 5.3 5.5
VDD (V)
ISS (mA)
VSET = V
DD
IOUT
= 375 mA
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
4.5 4.7 4.9 5.1 5.3 5.5
VDD (V)
ISS (mA)
VSET = VDD
IOUT = 10 mA
2004 Microchip Technology Inc. DS21915A-page 7
MCP73853/55
2.0 TYPICAL PERFORMANCE CURVES (CONT)
NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C.
FIGURE 2-7: Output Leakage Current
(IDISCHARGE) vs. Battery Voltage (VBAT).
FIGURE 2-8: Thermistor Reference
Voltage (VTHREF) vs. Supply Voltage (VDD).
FIGURE 2-9: Thermistor Reference
Voltage (VTHREF) vs. Thermistor Bias Current
(ITHREF).
FIGURE 2-10: Supply Current (ISS) vs .
Ambient Temp eratu re (TA).
FIGURE 2-11: Bat tery Re gulation Voltage
(VBAT) vs . Ambient Temperature (TA).
FIGURE 2-12: Thermistor Reference
Voltage (VTHREF) vs. Ambient Temperature (TA).
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
2.0 2.4 2.8 3.2 3.6 4.0 4.4
VBAT (V)
IDISCHARGE (mA)
VSET = V
DD
VDD = V
SS
+25°C
-40°C
+85°C
2.525
2.535
2.545
2.555
2.565
2.575
4.5 4.7 4.9 5.1 5.3 5.5
VDD (V)
VTHREF (V)
MCP73853
VSET = VDD
ITHREF = 100 µA
2.525
2.535
2.545
2.555
2.565
2.575
0 25 50 75 100 125 150 175 200
ITHREFA)
VTHREF (V)
MCP73853
VSET = V
DD
0.20
0.30
0.40
0.50
0.60
0.70
0.80
0.90
1.00
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
TA C)
ISS (mA)
VSET = VDD
IOUT
= 10 mA
4.150
4.170
4.190
4.210
4.230
4.250
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
TA C)
VBAT (V)
VSET = VDD
IOUT
= 10 mA
2.525
2.535
2.545
2.555
2.565
2.575
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
TA C)
VTHREF (V)
MCP73853
VSET = VDD
ITHREF
= 100 µA
MCP73853/55
DS21915A-page 8 2004 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES (CONT)
NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA and TA= +25°C.
FIGURE 2-13: Line Transient Response.
FIGURE 2-14: Load Transient Response.
FIGURE 2-15: Power Supply Ripple
Rejection.
FIGURE 2-16: Line Transient Response.
FIGURE 2-17: Load Transient Response.
FIGURE 2-18: Power Supply Ripple
Rejection.
-70
-60
-50
-40
-30
-20
-10
0
0.01 0.1 1 10 100 1000
Frequency (kHz)
Attenuation (dB)
MCP73853
VDD = 5.2 V
VAC = 100 mVp-p
IOUT = 10 mA
COUT = 10 µF, Ceramic
-80
-70
-60
-50
-40
-30
-20
-10
0
0.01 0.1 1 10 100 1000
Frequency (kHz)
Attenuation (dB)
MCP73853
VDD = 5.2 V
VAC = 100 mVp-p
IOUT = 100 mA
COUT = 10 µF, X7R, Ceramic
2004 Microchip Technology Inc. DS21915A-page 9
MCP73853/55
2.0 TYPICAL PERFORMANCE CURVES (CONT)
NOTE: Unless otherwise indicated, VDD = [VREG(Typ) + 1V], IOUT = 10 mA, and TA= +25°C.
FIGURE 2-19: Charge Current (IOUT) vs.
Programming Resistor (RPROG). FIGURE 2-20: Charge Current (IOUT) vs.
Ambient Temp eratu re (TA).
0
100
200
300
400
500
OPEN 4.8K 1.6K 536 0
RPROG ()
IOUT (mA)
VSET = VDD
250
255
260
265
270
275
280
285
290
295
300
-40
-30
-20
-10
0
10
20
30
40
50
60
70
80
TA (°C)
IOUT (mA)
VSET = VDD
RPROG = 1.6 k
MCP73853/55
DS21915A-page 10 2004 Microchip Technology Inc.
3.0 PIN DESCRIPTION
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
3.1 Voltage Regulation Selection
(VSET)
Conne ct to VSS for 4.1V regulation vo lt age. Connect to
VDD for 4.2V regulation voltage.
3.2 Battery Management Input Supp ly
(VDD1, VDD2)
A supply voltage of [VREG(Typ) + 0.3V] to 5.5V is
recommended. Bypass to VSS with a minimum of
4.7 µF.
3.3 Battery Management 0V Reference
(VSS1, VSS2, VSS3)
Connect to negative termin al of battery.
3.4 Current Regulation Set (PROG)
Preconditioning, fast and termination currents are
scaled by placing a resistor from PROG to VSS.
3.5 Cell Temperature Sensor Bias
(THREF)
THREF is a voltage reference to bias external
thermistor for continuous cell temperature monitoring
and pre-qualification.
3.6 Cell Temperat ure Sensor Input
(THERM)
Input for an external thermistor for continuous cell-
temperature monitoring and prequalification. Connect
to THREF/3 to disable temperature sensing.
3.7 Timer Set (TIMER)
All safety timers are scaled by CTIMER/0.1 µF.
3.8 Battery Charge Control Output
(VBAT1, VBAT2)
Connect to positive terminal of battery. Drain terminal
of inte rnal P-c ha nne l MOSFET p ass tran si sto r. Byp as s
to VSS wit h a minimum of 4.7 µF to ensure loop st abilit y
when the battery is disconnected.
3.9 Battery Voltage Sense (VBAT3)
Voltage sense input. Connect to positive terminal of
battery. A precision internal resistor divider regulates
the final voltage on this pin to VREG.
3.10 Logic Enable (EN)
Input to force charge termination, initiate charge, clear
faults or disable automatic recharge.
3.11 Fault Status Output (STAT2)
Current-limited, open-drain drive for direct connection
to a LED for charge status indication. Alternatively, a
pull-up resistor can be applied for interfacing to a host
microcontroller.
3.12 Charge Status Output (STAT1)
Current-limited, open-drain drive for direct connection
to a LED for charge status indication. Alternatively, a
pull-up resistor can be applied for interfacing to a host
microcontroller.
MCP73853 MCP73855 Sym Description
12V
SET Voltage Regulation Selection
23V
DD1 Battery Management Input Supply
3—V
DD2 Battery Management Input Supply
44V
SS1 Battery Management 0V Reference
5 5 PROG Current Regulation Set
6 THREF Cell Temperature Sensor Bias
7 THERM Cell Temperature Sensor Input
86TIMERTimer Set
9—V
SS3 Battery Management 0V Reference
10 8 VBAT1 Battery Charge Control Output
11 9 VBAT2 Battery Charge Control Output
12 VBAT3 Battery Voltage Sense
13 7 VSS2 Battery Management 0V Reference
14 10 EN Logic Enable
15 STAT2 Fault Status Output
16 1 STAT1 Charge Status Output
2004 Microchip Technology Inc. DS21915A-page 11
MCP73853/55
4.0 DEVICE OVERVIEW
The MCP7385X devices are highly advanced linear
charge management controllers. Refer to the functional
block diagram. Figure 4-2 depicts the operational flow
algorithm from charge initiation to completion and
automatic recharge.
4.1 Charge Qualification and
Preconditioning
Upon insertion of a battery, or application of an external
supply, the MCP7385X devices automatically perform a
series of safety checks to qualify the charge. The input
source voltage must be above the Undervoltage Lock-
out (UVLO) threshold, the enable pin must be above the
logic high level, and the cell temperature monitor must
be within the upper and lower thresholds (MCP73853
only). The qualification parameters are continuously
monitored, with any deviation beyond the limits automat-
ically suspending, or terminating, the charge cycle. The
input voltage must deviate below the UVLO stop
threshold for at least one clock period to be considered
valid.
Once the qualification parameters have been met, the
MCP73 85X device s initiate a charge cy cle. The c harge
status output is pulled low throughout the charge cycle
(see Tables 5-1 and 5-2 for charge status outputs). If
the batte ry vol tag e is b elow the preco nditio ning th resh-
old (VPTH), the MCP7385X devices precondition the
battery with a trickle charge. The preconditioning
current is set to approximately 10% of the fast charge
regulation current. The preconditioning trickle charge
safely replenis hes deep ly deple ted cell s and minimi zes
heat dissipation during the initial charge cycle. If the
battery voltage has not exceeded the preconditioning
threshol d before the prec ondit ioning timer has expire d,
a fault is indicated and the charge cycle is terminated.
4.2 Const ant Current Regulation –
Fast Charge
Preconditioning ends and fast charging begins when
the batter y voltage exceeds the p reconditioni ng thresh-
old. Fast ch arge regul ates to a co nst ant current (IREG),
which is set via an external resistor connected to the
PROG pin. Fast charge continues until either the
battery voltage reaches the regulation voltage (VREG)
or the fast charge timer expires; in which case, a fault
is indicated and the charge cycle is terminated.
4.3 Const ant Voltage Regulation
When the battery voltage reaches the regulation volt-
age (VREG), constant voltage regulation begins. The
MCP7385X devices monitor the battery voltage at the
VBAT pin. This in put is tie d direc tly to t he pos itive termi-
nal of the battery. The MCP7385X devices select the
voltage regulation value based on the state of VSET.
With VSET tied to VSS, the MCP7385X devi ces regulate
to 4.1V. With VSET tied to VDD, th e MC P7385X de vice s
regulate to 4.2V.
4.4 Charge Cycle Completion and
Automatic Recharge
The MCP7385X devices monitor the charging current
during the Constant-voltage Regulation mode. The
charge cycle is considered complete when either the
charge current has diminished below approximately
7% of the regu lation current (I REG), or the elapsed timer
has expired.
The MCP7385X devices automatically begin a new
charge cycle when the battery voltage falls below the
recharge threshold (VRTH), a ssuming all th e qualif ica-
tion parameters are met.
4.5 Thermal Regulation
The MC P7385X devices limit the charge curren t base d
on the die temperature. Thermal regulation optimizes
the charge cycle time while maintaining device reliabil-
ity . I f thermal regulation is entered , the timer is automat-
ically slowed down to ensure that a charge cycle will
not terminate prematurely. Figure 4-1 depicts the
thermal regu lat ion .
FIGURE 4-1: Typica l Maximum Charge
Current vs. Junction Temperature.
4.6 Thermal Shutdown
The MCP7385X devices suspend charge if the die
temperature exceeds 155°C. Charging will resume
when th e die tempe rature has c ooled by a pproximat ely
10°C. The thermal shutdown is a secondary safety
feature in the event that there is a failure within the
thermal regu lat ion circu itry.
0
50
100
150
200
250
300
350
400
450
0 20 40 60 80 100 120 140
Junction Temperature (C)
Maximum Charge Current (mA)
Minimum Maximum
2004 Microchip Technology Inc. DS21915A-page 13
MCP73853/55
5.0 DETAILED DESCRIPTION
5.1 Analog Circuitry
5.1.1 BATTERY MANAGEMENT INPUT
SUPP LY (VDD1, VDD2)
The VDD input is the input supply to the MCP7385X
devi ces. The MCP 7385X dev ices automat icall y enter a
power-down mode if the voltage on the VDD input falls
below the UVLO vol tage (VSTOP). This feature prevent s
draining the battery pack when the VDD supply is not
present.
5.1.2 PROG INPUT
Fast charge current regulation can be scaled by placing
a pro gr amm in g r es is tor (R PROG) fr om th e P ROG i n pu t
to VSS. Connec ting the PROG inp ut to VSS allows for a
maximum fas t ch arge current of 400 mA, ty pical ly. The
minimum fast charge current is 85 mA (Typ) and is set
by letting the PROG input float. Equation 5-1 calculate s
the value for RPROG.
EQUATIO N 5-1:
The preconditioning trickle charge current and the
charge te rmina tion current are scale d to appro xima tely
10% and 7% of IREG, respectively.
5.1.3 CELL TEMPERATURE SENSOR
BIAS (THREF)
A 2.55V voltage reference is provided to bias an exter-
nal thermistor for continuous cell temperature monitor-
ing and prequalification. A ratio-metric window
comparison is performed at threshold levels of
VTHREF/2 and VTHREF/4.
5.1.4 CELL TEMPERATURE SENSOR
INPUT (THERM)
The MCP73853 continuously monitors temperature by
comparing the voltage between the THERM input and
VSS with the upper and lower temperature thresholds.
A negative or positive temperature coeffi cient, NTC or
P TC thermistor a nd an extern al volta ge divider t ypically
dev elops t his vo ltag e. The temp erat ure-se nsi ng cir cui t
has it s own reference to which it performs a ratio-metric
comparison. Therefore, it is immune to fluctuations in
the suppl y input (VDD). The tempe rature-sensing circu it
is removed from the system when VDD is not applied,
eliminating additional discharge of the battery pack.
Figure 6-1 depicts a typical application circuit with
connection of the THERM input. The resistor va lues of
RT1 and RT2 are calculated with the following
equations.
For NTC thermistors:
For PTC thermistors:
Applying a voltage equal to VTHREF/3 to the THERM
input disables temperature monitoring.
5.1.5 TIMER SET INPUT (TIMER)
The TIMER input pro grams the period of the s afety tim-
ers by placi ng a timing ca pac itor (CTIMER) betw ee n th e
TIMER input pin and VSS. Three safety timers are
programmed via the timing capacitor.
The preconditioning safety timer period:
The fast charge safety timer period:
And, the elapsed time termination period:
The preconditioning timer starts after qualification and
resets when the charge cycle transitions to the
constant-current, fast charge phase. The fast charge
timer and the elapsed timer start after the MCP7385X
devices transition from preconditioning. The fast
charge timer resets when the charge cycle transitions
to the Constant-voltage mode. The elapsed timer will
expire and terminate the charge if the sensed current
does not diminish below the termination threshold.
During thermal regulation, the timer is slowed down
propo rtio nal to the charge curren t.
RPROG 13.32 33.3 IREG
×
14.1 IREG
×1.2
------------------------------------------------
=
Where:
IREG is the desired fast charge current in
amps
RPROG is in kilo-ohms.
RT1 2R
COLD RHOT
××
RCOLD RHOT
----------------------------------------------
=
RT2 2R
COLD RHOT
××
RCOLD 3R×HOT
----------------------------------------------
=
RT1 2R
COLD RHOT
××
RHOT RCOLD
----------------------------------------------
=
RT2 2R
COLD RHOT
××
RHOT 3R×COLD
----------------------------------------------
=
Where:
RCOLD and RHOT are the thermistor
resistance values at the temperature window
of interest.
tPRECON CTIMER
0.1
µ
F
-------------------1.0Hour×s=
tFAST CTIMER
0.1
µ
F
-------------------1.5Hours×=
tTERM CTIMER
0.1
µ
F
-------------------3.0Hours×=
MCP73853/55
DS21915A-page 14 2004 Microchip Technology Inc.
5.1.6 BATTERY VOLTAGE SENSE (VBAT3)
The MCP73853 monitors the battery voltage at the
VBAT3 pin. This input is tied directly to the positive
terminal of the battery pack.
5.1.7 BATTERY CHARGE CONTROL
OUTPUT (VBAT1, VBAT2)
The battery charge control output is the drain terminal of
an internal P-channel MOSFET. The MCP7385X
devices provide constant-current and constant-voltage
regulation to the battery pack by controlling this
MOSFET in the linear region. The battery charge
control output should be connected to the positive
terminal of the battery pack.
5.2 Digital Circuitry
5.2.1 CHARGE STATUS OUTPUTS
(STAT1,STAT2)
Two status outputs provide information on the state of
charge for the MCP73853. One status output provides
information on the state of charge for the MCP73855.
The cur rent-limited, open-d rain outpu ts can be used to
illuminate external LEDs. Optionally, a pull-up resistor
can be used on the output for communication with a
host microcontroller. Table 5-1 and Table 5-2 summa-
rize the state of the status outputs during a charge
cycle for the MCP73853 and MCP73855, respectively.
The f lashin g rate ( 1 Hz) is ba sed off a timer c apacitor
(CTIMER) of 0.1 µF. The rate will vary based on the
value of the tim er capacitor.
5.2.1.1 MCP 73 853 On ly
STAT2 is on whenever the input voltage is above the
under voltage lockout, the device is enabled, and all
conditions are normal.
During a fault condition, the ST AT1 status output will be
off and the STAT2 status output will flash. To recover
from a fault condition, the input voltage must be
removed and then reapplied, or the enable input, EN,
must be de-asserted to a logic-low, then asserted to a
logic-high.
When the voltage on the THERM input is outside the
preset window, the charge cycle will either not start or
be suspended. However, the charge cycle is not termi-
nated, with re cove ry beng a uto matic . The c harge cycl e
will resume (or start) once the THERM input is valid and
all other qualification parameters are met.
5.2.2 VSET INPUT
The VSET input selects the regulated output voltage of
the MCP7385X devices. With VSET tied to VSS, the
MCP7385X devices regulate to 4.1 V. With VSET tied to
VDD, the MCP7385X devices regulate to 4.2V.
5.2.3 LOGIC ENABLE (EN)
The logic enable input pin (EN) can be used to termi-
nate a charge anytime during the charge cycle, initiate
a charge cycle or initiate a recharge cycle.
Applyin g a logic -high in put signa l to t he EN pin, o r tying
it to the input source, enables the device. Applying a
logic-low input signal disables the device and termi-
nates a charge cycle. When disabled, the device’s
supply current is reduced to 0.28 µA, typically.
TABLE 5-1: STATUS OUTPUTS – MCP73853
CHARGE
CYCLE STAT E STAT1 STAT2
Qualification OFF OFF
Preconditioning ON OFF
Constant-
current Fast
Charge
ON OFF
Constant-
voltage ON OFF
Charge
Complete Flashing (1 Hz,
50% duty cycle) OFF
Fault OFF ON
THERM Invalid OFF Flashing (1 Hz,
50% duty cycle)
Disabled -
Sleep mode OFF OFF
Input Voltage
Disconnected OFF OFF
Note: OFF state: open-drain is high-impedance;
ON state: open-drain can sink current,
typically 7 mA; FLASHING: toggles
between OFF and ON states.
TABLE 5-2: S TATUS OUTPUT – MCP73855
CHARGE CYCLE STATE STAT1
Qualification OFF
Preconditioning ON
Const ant C urren t Fast Charg e ON
Constant Voltage ON
Charge Complete OFF
Fault Flashi ng (1H z ,
50% duty cy cle)
THERM Invalid Flashing (1Hz,
50% duty cy cle)
Disabled - Sleep mode OFF
Input Voltage Disconnected OFF
Note: OFF state: open-drain is high impedance;
ON st ate: open-dra in can sin k current, ty p-
ically 7 mA; FLASHING: toggles between
OFF sta t e and ON st ate.
2004 Microchip Technology Inc. DS21915A-page 15
MCP73853/55
6.0 APPLICATIONS
The MCP7385X devices are designed to operate in
conjunction with a host microcontroller or in stand-
alone applications. The MCP7385X devices provide
the preferred charge algorithm for Li-Ion/Li-Polymer
cells, constant current followed by constant voltage.
Figure 6-1 depicts a typical stand-alone application
circuit, while Figures 6-2 and 6-3 depict the
accompany ing cha rge pro file.
FIGURE 6-1: Typic al App li ca tio n Circui t.
FIGURE 6-2: Typi cal Char ge Prof il e.
ENSTAT1
STAT2
VSET
VSS3
VDD1
VDD2
VSS2
TIMERPROG
THERM
THREF
VBAT3
VBAT2
VBAT1
CTIMER
RPROG
RT1
RT2
+
-Single
Lithium-Ion
Cell
VSS1
1
2
3
4
MCP73853
141516
5678
9
10
11
12
13
Regulated Wall Cube
or
USB Power Bus
Regulation
Voltage
(VREG)
Regulation
Current
(IREG)
Transition
Threshold
(VPTH)
Precondition
Current
(IPREG)
Precondition
Safety Timer Fast Charge
Safety Timer Elapsed Time
Term ination Timer
Charge
Voltage
Preconditioning
Mode Constant-current
Mode Constant-voltage
Mode
Charge
Current
Termination
Current
(ITERM)
MCP73853/55
DS21915A-page 16 2004 Microchip Technology Inc.
FIGURE 6-3: Typical Charge Profile in Thermal Regulation.
Regulation
Voltage
(VREG)
Regulation
Current
(IREG)
Transition
Threshold
(VPTH)
Precondition
Safety Timer Fast Charge
Safety Timer Elapsed Time
Termination Timer
Charge
Voltage
Preconditioning
Mode Constant-current
Mode Constant-voltage
Mode
Charge
Current
Precondition
Current
(IPREG)
Termination
Current
(ITERM)
2004 Microchip Technology Inc. DS21915A-page 17
MCP73853/55
6.1 Application Circuit Design
Due to the low efficiency of linear charging, the most
important factors are thermal design and cost. These
are a direct func tion of th e input v olt age, out put curre nt
and thermal impedance between the battery charger
and the ambient cooling air. The worst-case situation
exists when the device has transitioned from the
Precondi tioning mode to the C onstant-curren t mode. In
this situation, the battery charger has to dissipate the
maximum power. A trade-off must be made between
the charge current, cost and thermal requirements of
the charger.
6.1.1 COMPONENT SELECTION
Selection of the external components in Figure 6-1 is
crucial to the integ rity and re liability o f the charg ing sys-
tem. The follo wing dis cuss ion is intend ed to be a guide
for the component selection process.
6.1.1.1 CURRENT PROGRAMMING RESISTOR
(RPROG)
The preferred fast charge current for Lithium-Ion cells
is at the 1C rate, with an absolute maximum current at
the 2C rate . For exampl e, a 500 mAH batt ery p ack has
a preferr ed fast charge current of 500 mA. Charging at
this rate provides the shortest charge cycle times
withou t degradatio n to the battery p ack perfo rmance or
life.
400 mA is the typical maximum charge current
obta inable from th e MCP73 85X dev ices. For thi s situ a-
tion, the PROG input should be connected directly to
VSS.
6.1.1.2 THERMAL CONSIDERATIONS
The worst-case power dissipation in the battery
charger occurs when the input voltage is at the
maximum and the device has transitioned from the
Precondi tioning mode to the C onstant-curren t mode. In
this case, the power diss ipation is:
Where VDDMAX is the maximum input voltage
(IREGMAX) is the maximum fast charge current, and
VPTHMIN is the minimum transition threshold voltage.
Power dissipation with a 5V, +/-10% input voltage
sour ce is :
With the battery charger mounted on a 1 in2 pad of
1 oz. copper, the junction temperature rise is approxi-
mately 50°C. This would allow for a maximum operat-
ing ambient temperature of 35°C before thermal
regulati on is entered.
6.1.1.3 EXTERNAL CAPACITORS
The MCP7385X devices are stable with or without a
battery load. In order to maintain good AC stability in
the Constant-volt age mode, a m in im um capacit anc e of
4.7 µF is recommended to by p a ss th e VBAT pin to VSS.
This ca pacit ance pr ovide s compensa tion when there is
no battery load. In addition, the battery and intercon-
nections appear inductive at high frequencies. These
elements are in the control feedback loop during
Constant-voltage mode. Therefore, the bypass
capacitance may be necessary to compensate for the
inductive nature of the battery pack.
Virtually any good quality output filter capacitor can be
used, independent of the capacitor’s minimum
Effective Series Resistance (ESR) value. The actual
value of the capacitor (and its associated ESR)
depends on the output load current. A 4.7 µF ceramic,
tantalum or aluminum electrolytic capacitor at the
output is usually sufficient to ensure stability for up to
the maximum output current.
6.1.1.4 REVERSE BLOCKING PROTECTION
The MCP7385X devices provide protection from a
faulted or shorted input or from a reversed-polarity
input source. Without the protection, a faulted or
shorted input w ould disch arge the b attery p ack throug h
the body diode of the internal pass transistor.
6.1.1.5 ENABLE INTERFACE
In the st and-alone configuration, the enabl e pi n is ge n-
erall y tied to the input volt age. Th e MCP7385X de vices
automatically enter a low power mode when voltage on
the VDD input falls below the UVLO voltage (VSTOP),
reducing the battery drain current to 0.28 µA, typically.
6.1.1.6 CHARGE STATUS INTERFACE
Two status outputs provide information on the state of
charge. T he current-limited, open -drain outputs c an b e
used to illuminate external LEDs. Refer to Table 5-1
and Table 5-2 for a summary of the state of the status
output during a charge cycle.
6.2 PCB Layout Issues
For optimum voltage regu lation, place the batte ry pack
as clos e as possi ble to the de vice’ s VBAT and VSS pins.
It is recommended that the designer minimize voltage
drops along the high-current-carrying PCB traces.
If the PCB layout is used as a heatsink, adding many
vias in the hea tsink pad c an h elp conduct more h eat to
the backp lane of the PCB, thus reduc ing the ma ximum
junction temperature.
PowerDissipation VDDMAX VPTHMIN
()IREGMAX
×=
PowerDissipation 5.5V 2.7V()475mA×1.33W==
MCP73853/55
DS21915A-page 18 2004 Microchip Technology Inc.
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
Legend: XX...X Customer spec ific information*
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Note: In the eve nt the full Micro chip p art num ber can not be ma rked on on e line, it will
be carried ov er to the ne xt li ne thus lim iti ng th e nu mb er of av ai lab le c hara ct ers
for customer specific information.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
XXXXXXX
16-Lead QFN (MCP73853)
XXXXXXX
YYWWNNN
73853
Example
I/ML
0429256
XXXX
10-Lead DFN (MCP73855)
XYWW
NNN
3855
Example
I429
256
2004 Microchip Technology Inc. DS21915A-page 19
MCP73853/55
16-Lead Plastic Quad Flat No Lead Package (ML) 4x4x0.9 mm Body (QFN) – Saw Singulated
2
1
n
D
EE1
D1
e
b
L
A
A1
A3
EXPOSED
METAL
PAD
OPTIONAL
INDEX
AREA
Contact Width
*Controlling Parameter
Drawing No. C04-127
Notes:
JEDEC equivalent: MO-220
b .010 .012 .014 0.25 0.30 0.35
Pitch
Number of Pins
Overall Width
Standoff
Overall Length
Overall Height
MAX
Units
Dimension Limits
A1
D
E
n
e
A
.000
INCHES
.026 BSC
MIN
16
NOM MAX
.002 0.00
4.00
MILLIMETERS*
.039
MIN
16
0.65 BSC
NOM
0.05
1.000.90.035
.001 0.02
Contact Length L .012 .016 .020 0.30 0.40 0.50
E2
D2
Exposed Pad Width
Exposed Pad Length
.100 .106 .110 2.55 2.70 2.80
.031 0.80
3.85 4.15.163.157.152
.152 .157 4.00.163 3.85 4.15
.100 .106 2.70.110 2.55 2.80
Revised 04-24-05
Contact Thickness A3 .008 REF 0.20 REF
TOP VIEW BOTTOM VIEW
MCP73853/55
DS21915A-page 20 2004 Microchip Technology Inc.
10-Lead Plasti c Dual Flat No Lead Package (MF) 3x3x0. 9 mm Body (DFN) – Saw Singulated
Exposed Pad Width
Exposed Pad Length
Lead Length
*Controlling Parameter
Lead Width
Drawing No. C04-063
Notes:
Exposed pad dimensions vary with paddle size.
Overall Width
D2
E2
L
b
D
.016
.012
.008
.047
.055
.010
Number of Pins
Standoff
Lead Thickness
Overall Length
Overall Height
Pitch e
n
Units
A
A1
E
A3
Dimension Limits
10
.000 .001
.008 REF.
.031
.020 BSC
MIN
INCHES
NOM
0.40
0.25
0.30.020
.069
.015
.096
0.18
1.20
1.39
0.50
0.30
1.75
2.45
0.02
0.80
0.20 REF.
0.50 BSC
MILLIMETERS*
.002
.039
0.00
MINMAX NOM
10
0.05
1.00
MAX
3.
Package may have one or more exposed tie bars at ends.1.
Pin 1 visual index feature may vary, but must be located within the hatched area.2.
0.90.035
(Note 3)
(Note 3)
4. JEDEC equivalent: Not registered
Revised 05/24/04
.112 .118 .124 2.85 3.00 3.15
3.00.112 .118 2.85.124 3.15
-- --
-- --
E2
D
A1
A
A3
TOP VIEW
EXPOSED
METAL
PAD
BOTTOM VIEW
21
ID INDEX
PIN 1
E
L
D2
p
b
n
AREA
(NOTE 2)
TIE BAR
(NOTE 1)
EXPOSED
2004 Microchip Technology Inc. DS21915A-page 21
MCP73853/55
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Sales and Support
Device MCP73853: USB compatible charge controller with tem-
perature monitor
MCP73853T: USB compatible charge controller with tem-
perature monitor, Tape and Reel
MCP73855: USB compatible charge controller
MCP73855T: USB compatible charge controller,
Tape and Reel
Temp er ature Range I = -40°C to +85°C (Industrial)
Package ML = Plastic Quad Flat No Lead, 4x4 mm Body (QFN),
16-Lead
MF = Plastic Dual Flat No Lead, 3x3 mm Body (DFN),
10-Lead
PART NO. XXX
PackageTemperature
Range
Device
Examples:
a) MCP73853T-I/ML: Tape and Reel,
USB compatible charge
controller with tempera-
ture monitor
b) MCP73853-I/ML: USB compatible charge
controller with tempera-
ture monitor
a) MCP73855T-I/MF: Tape and Reel,
USB compatible charge
controller
b) MCP73855-I/MF: USB compatible charge
controller
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. Th e Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Dat a Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com) to receive the most current information on our products.
MCP73853/55
DS21915A-page 22 2004 Microchip Technology Inc.
NOTES:
2004 Microchip Technology Inc. DS21915A-page 23
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIN D WHETHER EXPRESS OR IMPLIED ,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical co mponents in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
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The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, micro ID, MPLAB, PIC, PICmicro,
PICSTART, PRO MATE, PowerSm a rt, rfPIC, and
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are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM .n e t, dsPICwor ks , ECA N , ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB , In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM ,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
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SQTP is a service mark of Microchip T echnology Incorporated
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All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Incorporat ed, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Note the following details of the code protection feature on Microchip devices:
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip product s in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
Microc hip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is con stantly evolving. We at M icroc hip are committed to continuously improving the code protection featur es of our
products. Attempts to break Microchip’ s code protection f eature may be a violation of t he Digit al Millennium Copyright Act. I f suc h a c t s
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain Vie w, California in
October 2003. The Company’s quality system processes and
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devices, Serial EEPROMs, micrope ripheral s, nonvolatile memory and
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and manufacture of development systems is ISO 9001:2000 certified.
DS21915A-page 24 2004 Microchip Technology Inc.
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Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Taiwan - Hsinchu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
EUROPE
Austria - Weis
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark - Ballerup
Tel: 45-4450-2828
Fax: 45-4485-2829
France - Massy
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - Ismaning
Tel: 49-89-627-144-0
Fax: 49-89-627-14 4-44
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
England - Berkshire
Tel: 44-118-921- 5869
Fax: 44-118-921-5820
WORLDWIDE SALES AND SERVICE
10/20/04