NJU26208
-1-
Ver.2008-12-01
SRS CS A uto & CSII
IIII
II 5.1 & TruSurround XT Decoder
General Description
The NJU26208 is a digital signal processor that provides the function of Circle
Surround Automotive / Circle SurroundII5.1 / TruSurroundXT and Mono-to-Stereo.
The NJU26208 processes the stereo matrix-encoded signal into spacious sound
of 5.1channels by Circle SurroundII5.1. Also non matrix-encoded audio signal
can be processed into effective spacious sound.
The decoded 2-channel signal can be converted into spacious 2-channel virtual
surround output by the TruSurroundXT technology.
The applications of NJU26208 are suitable for multi-channel products such as
DVD Receivers, AV Amplifiers, TV, Car Audio or ordinary audio products such as
small speakers system.
FEATURES
- Sof tware
• SRS Circle Surround Automotive for Car Audio
• 5.1-Channel signal outputs by Circle Surround II 5.1
• 2-Channel outputs by SRS TruSurround XT
• Speaker sound elevation by Focus
• Rich low frequency reproduction by TruBass
• Generating 5.1-channel outputs from mono signal by Mono-To-Stereo function
- Hardware
• 24bit Fixed-point Digital Signal Processing
• Maximum Clock Frequency : 12.288MHz(Standard), built-in PLL Circuit
• Digital Audio Interface : 4 Input ports / 3 Output ports
• Digital Audio Format : I2S, Left- justified, Right-justified, 16/18/20/24 bit, BCK : 32/64fs
• Master / Slave Mode : In Master mode, MCK = 256fs, MCK2 = 512fs
• Serial Host Interface : I2C-Bus (Standard-mode/100kbps, Fast-mode/400kbps)
: 4-Wire Serial Bus (Clock, Enable, Input data, Output data)
• Power Supply : VDD = VDDPLL = 1.8V
: VDDIO = 3.3V
• Input terminal : 5.0V Input tolerant
• Package : SSOP44 (Pb-Free)
* The detail hardware specification of the NJU26208 is described in the “ NJU26200 Series Hardware Data Sheet”.
■ Package
NJU26208V
NJU26208
- 2 - Ver.2008-12-01
Block Diagram
TIMING
GENERATOR
/ PLL
PROGRAM
CONTROL
ALU
24-BIT x 24-BIT
MULTIPLIER
ADDRESS GENERATION UNIT
FIRMWARE
ROM
DATA
RAM
SERIAL
HOST
INTERFACE
General I/O
INTERFACE
SDO2
SDO3
SCL/SCK
SDA/SDOUT
AD1/SDIN AD2/SSb
CLK
CLKOUT
RESETb
24bit Fixed-point DSP Core
SDI*
LRI
BCKI
MCK
BCKO
LRO
C/SW
SL/SR
SERIAL AUD IO
INTERFACE
NJU26208
SDO1
L/R
WDC
SEL
MUTEb
PROC
Fig.1 NJU26208 Hardware Block Diagram
NJU26208
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Ver.2008-12-01
Function Block Diagram
NJU26208 Block Diagram
(Stereo input mode)
Input
Trimmer
Pink Noise
Generator
TruSurround
TruBass
(L/R)
TruBass
(SL/SR)
Dial og C l a ri ty
(Center)
Mono To
Stereo
SDI0
SDI1
Circle Su rroun d II
Decoder
2ch Stereo / 4ch Stereo /
Passive Matrix 5ch
LPF for
(L+R) Trim
WatchDog
Output
WDC
Outpu t Trim mer
(Master & Each Chann els )
L/R SL/SRC/SW
Smooth
Control
SDO1
SDO2
SDO3
TruBass
(SW)
SW
Focus
(L/R, SL/SR)
Automotive Proc.
(CSII only)
Delay
(SL/SR)
Fig.2 Function Block Diagram (Stereo Input Mode)
NJU26208 Block Diagram
(Multi Input Mode)
Input
Trimmer
Pink No is e
Generator
Focus
(L/R, S L/SR )
TruSurround
TruBass
(L/R)
TruBass
(SL/SR)
Mono To
Stereo
SDI0
SDI1 LPF for
(L+R) Trim
WatchDog
Output
WDC
Outpu t Trimmer
(Master & Each Channels)
L/R SL/SRC/SW
Smooth
Control
SDO1
SDO2
SDO3
TruBass
(SW)
SDI3
SDI2
Mix to
SW
L/R
C/SW
SL/SR
Dialog Clari ty
(Center)
Delay
L/R or SL/SR
SL/ SR output
source select
L/R/SW
Fig. 3 Fu nction Bl ock Diagr am (Mul ti Inpu t Mode)
NJU26208
- 4 - Ver.2008-12-01
Pin Configuration (SSOP44)
Fig. 4 Pin Configuration
NJU26208
SSOP44
44
43
42
41
40
39
38
37
1
2
3
4
5
6
7
8
9
10
11
12
VDD
VSS
VSSIO
VDDIO
TEST
SDO1
SDO2
SDO3
SDI3
SDI2
SDI1
SDI0
LRI
VDDIO
BCKI
VSS
VDD
TEST
MUTEb
WDC
13
14
15
16
PROC
VSSIO
VDDIO
SEL
36
35
34
33
LRO
BCKO
MCK
VDDIO
17
18
19
20
VDDPLL
VSSPLL
VSS
VDD
21
22
CLKOUT
CLK
32
31
30
29
SDA/SDOUT
SCL/SCK
AD2/SSb
A
D1/SDIN
28
27
26
25
TEST
TEST
TEST
RESETb
24
23
VDDIO
VSSIO
NJU26208
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Ver.2008-12-01
Pin Description
Table 1 Pin Descripti on
Pin No.
SSOP44 Symbol I/O Description
6, 15, 24, 33, 41 VDDIO - I/O Power Supply +3.3V
7 BCKI I Bit Clock Input
14, 23, 42 VSSIO - I/O GND
8, 19, 43 VSS - Core GND
9, 20, 44 VDD - Core Power Supply +1.8V
10 TEST I for test (connected to VSSIO through 3.3kΩ resistance.)
11 MUTEb * I Master Volume level, After Reset DSP (“1” : 0dB , “0” : Mute)
12 WDC * OD Clock for Watch Dog Timer (Open Drain Output)
13 PROC * I After Reset DSP. ( “1” : Normal , “0” : Wait from Command )
16 SEL I Select I2C or Serial bus ( ‘1’ : Serial , ‘0’ : I2C-Bus)
17 VDDPLL - PLL Analog Power Supply +1.8V
18 VSSPLL - PLL Analog GND
21 CLKOUT O OSC Output
22 CLK I X’tal Clock Input (12.288MHz)
25 RESETb I Reset (RESETb=’0’ : DSP Reset)
26 TEST I for Test (Connect to VDDIO)
27, 28 TEST I for Test (Connect to VSSIO)
29 AD1/SDIN I I2C Address / Serial Input
30 AD2/SSb I I2C Address / Serial Enable
31 SCL/SCK I I2C Clock / Serial Clock
32 SDA/SDOUT I/O
I2C I/O (Open Drain output) / Serial Output (CMOS output)
I2C Bus mode : SDA pin requires a pull-up resistance.
4-wire Serial mode : SDOUT does not require a pull-up resistance.
34 MCK O Master Clock Output (buffer output of a CLK pin)
35 BCKO O Bit Clock Output
36 LRO O LR Clock Output
37 SDO3 O Audio Data Output 3 ( Rear Lch / Rch )
38 SDO2 O
Audio Data Output 2 ( Center / Subwoofer )
39 SDO1 O Audio Data Output 1 ( Front Lch / Rch )
40 SDO0 O for Test ( Not connected : OPEN )
1 SDI3 I Audio Data Input 3 ( SL / SR )
2 SDI2 I Audio Data Input 2 ( Center / Subwoofer)
3 SDI1 I Audio Data Input 1 ( Front Lch / Rch )
4 SDI0 I Audio Data Input 0 ( Front Lch / Rch )
5 LRI I LR Clock Input
I : Input
O : Output
OD : Open Drain Output
I/O : Bi-directional
Note : Pins symbol with * : Connect with VDDIO or VSSIO through 3.3kΩ resistance
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Audio Inter face
The serial audio interface carries audio data to and from the NJU26208. Industry standard serial data formats of I2S,
MSB-first left-justified or MSB-first right-justified are supported.
The NJU26208 serial audio interface includes 4 data input lines: SDI0/SDI1/SDI2/SDI3 and 3 data output lines:
SDO1/SDO2/SDO3. (Table 2. 3.)
T a ble 2 Serial Audio I nput Pin Descri ption
Pin No. Description
SSOP44 Symbol Stereo Input Mode Multi channel Input Mode
4 SDI0
3 SDI1
Stereo L/R
(SDI0 / SDI1 Pin select)
Stereo L/R
(SDI0 / SDI1 Pin select)
2 SDI2 No use Audio Data Input 2 Center / Sub Woofer
1 SDI3 No use Audio Data Input 3 SL / SR (Surround channel)
Table 3 Seria l A udio O utpu t Pi n Desc rip tion
Pin No.
SSOP44 Symbol Description
39 SDO1 Audio Data Output 1 Front Lch / Rch
38 SDO2 Audio Data Output 2 Center / Sub Woofer
37 SDO3 Audio Data Output 3 Rear Lch / Rch
Host Interface
The NJU26208 can be controlled via Serial Host Interface (SHI) using either of two serial bus format : 4-Wire serial
bus or I2C-Bus. Data transfers are in 8 bit packets (1 byte) when using either format.
The SEL pin controls the serial bus mode. When the SEL is “Low” level during the NJU26208 initialization, I2C-Bus is
available. When the SEL is “High” level during the NJU26208 initialization, 4-Wire serial bus is available.(Table 4)
Serial Host Interface Pin Description. (Table 5)
T able 4 Serial Host Interface Pin Description
Pin No.
SSOP44 Symbol Setting Host Interface
“Low” I2C-Bus
16 SEL “High” 4-Wire serial bus
T able 5 Serial Host Interface Pin Description
Pin No.
SSOP44
Symbol
(I2C /Serial) I2C-Bus Format 4-Wire Serial bus Format
29 AD1 / SDIN I2C-Bus address Bit1 Serial Data Input
30 AD2 / SSb I2C-Bus address Bit2 SLAVE Select
31 SCL / SCK Serial Clock Serial Clock
32 SDA / SDOUT
Serial Data Input/Output
(Open Drain output)
Serial Data Output
(CMOS output)
Note: When 4-Wire Serial bus is selected, The SDA/SDOUT pin is CMOS output. The SDOUT pin does not
require a pull-up resistance.
When I2C Bus is selected, this pin is a bi-directional Open Drain output. This pin, which is assigned for
I2C-Bus, requires a pull-up resistance.
The SDA/SDOUT pin isn’t +5.0V Input tolerant. Please note the voltage level (Max voltage is VDDIO).
NJU26208
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Ver.2008-12-01
I2C-Bus
When the NJU26208 is configured for I2C bus communication in SEL=”Low”, the serial host interface transfers data
on the SDA pin and clocks data on the SCL pin. SDA is an open drain pin requiring a pull-up resistance. Pins AD1 and
AD2 are used to configure the seven-bit SLAVE address of the serial host interface. (Table 6)
Table 6 I2C-Bus Interface Slave address
* SLAVE address is 0 when AD1/2 is “Low”. SLAVE address is 1 when AD1/2 is “High”.
Note: The serial host interface supports “Standard-Mode (100kbps)” and “Fast-Mode (400kbps)” I2C bus data
transfer. Moreover, after sending S ("START" condition), Sr (repeated "START" condition) is not received
but it becomes the waiting for the P ("STOP" condition). Therefore, please be sure to send P ("STOP"
condition).
4-Wire Serial Interface
The serial host interface can be configured for 4-Wire Serial bus communication by setting SEL1=”High” during the
Reset Sequence initialization. SHI bus communication is full-duplex; a write byte is shifted into the SDIN pin at the
same time that a read byte is shifted out of the SDOUT pin.
Data transfers are MSB first and are enabled by setting SSb = “Low”. Data is clocked into SDIN on rising transitions of
SCK. Data is latched at SDOUT on falling transitions of SCK except for the first byte (MSB) that is latched on the
falling transitions of SSb. The SDOUT pin is always CMOS output. This pin does not require a pull-up resistance.
Fig. 5 4-Wi re Serial Interfac e Tim ing
Note : When the data-clock is less than 8 clocks, the input data is shifted to LSB side and is sent to the DSP core at the
transition of SSb=”High”.
When the data-clock is more than 8 clocks, the last 8 bit data becomes valid.
After sending LSB data, SDOUT transmits the MSB data which is received via SDIN until SSb becomes “High”.
bit7 bit6 bit5 bit4 bit3
AD2
bit2
AD1
bit1
R/W
bit0
0 0 1 1 1 0 0
0 0 1 1 1 0 1
0 0 1 1 1 1 0
0 0 1 1 1 1 1
R/W
Start
bit
R/W
bit ACK
Slave Address
(
7bit
)
SDIN
SDOUT
SCK
SSb
bit5 bit1
bit7 bit0
bit6
bit1bit7 bit0bit6 bit5 unstable
unstable
MSB LSB
NJU26208
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Pin setting
The NJU26208 operates default command setting after resetting the NJU26208. In addition, the NJU26208
restricts operation at power on by setting PROC pin and MUTEb pin. These pins are input pin. However, these pins
operate as bi-directional pins. Connect with VDDIO or VSSIO through 3.3kΩ resistance.
Table 7 Pin s etti ng
W atchD og Clock
The NJU26208 outputs clock pulse through WDC during normal operation. The WDC clock is useful to check the
status of the NJU26208 operation. For example, a microcomputer monitors the WDC clock and checks the status of
the NJU26208. When the WDC clock pulse is lost or not normal clock cycle, the NJU26208 does not operate
correctly. Then reset the NJU26208 and set up the NJU26208 again.
The WDC clock is able to be variable for 32ms to 640ms by command. Default setting of WDC clock is 192ms.
The WDC pin is open drain output. The WDC pin setting (Table 8)
Table 8 WDC p in s etti ng
Note: The cycle of WDC output is rough. Because WDC output inserts in the process of sound processing.
In slave mode, when there is no input of BCKI/LRI, the WDC pin can’t output.
It is required to set up a sampling rate correctly.
Pin No.
SSOP44 Symbol Setting Function
“High” The NJU26208 operates default setting after reset.
13 PROC
“Low” The NJU26208 does not operate after reset. Sending start
command is required for starting operation.
“High” Master volume is set 0dB after reset.
11 MUTEb “Low” Master volume is set mute after reset.
Pin No.
SSOP44 Symbol Setting
WDC pin is used.
Connect with VDDIO through 3.3kΩ resistance
12 WDC WDC pin is not used. Connect with VSSIO through 3.3kΩ resistance.
Do not open WDC pin.
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Host command
Table 9. NJU26208 command tabl e
Notes : In respect to detail command information, request New Japan Radio Co., Ltd. and permission of a licenser
(SRS Labs.) is required.
No. Command
1 Set Task
2 CSII mode
3 CS Automotive
4 TruBass config
5 TruBass size select
6 TruBass gain control
7 Focus config
8 Focus gain control
9 Stereo mode select
10 PNG config
11 SW LPF cutoff select
12 TruSurround Config
13 TruSurround Downmix mode select
14 TruSurround gain control
15 Gain control
16 Mono Input Select
17 Sample Rate
18 Delay
19 System Status
20 Watch Dog config
21 Smooth control config.
22 Re initialize
23 Version Number
24 Function enable/disable
25 Reset
26 NOP
NJU26208
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- Ver.2008-12-01
Package Dimensions
SSOP44, Pb Free
‑0.05
+0.10
0.15
0.1
0.1 M
0.2±0.1
0.1‑0.05 1.15±0.1 5.6±0.2
0.5±0.2
0〜10゜
122
44 23
7.6±0.3
11.0 ‑0.1
+0.3
0.5
0.75MAX
+0.10
NJU26208
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Ver.2008-12-01
License Information
1. The “Circle Surround Automotive”,“Circle SurroundII5.1”, “TruSurroundXT”, ”FOCUS”, “TruBass” technology rights
incorporated in the NJU26208 are owned by SRS Labs, a U.S. Corporation and licensed to New Japan Radio Co.,
Ltd.. Purchaser of NJU26208 must sign a license for use of the chip and display of the SRS Labs trademarks. Any
products incorporating the NJU26208 must be send to SRS Labs for review. “Circle Surround Automotive”,“Circle
SurroundII5.1”, “TruSurroundXT”, ”FOCUS”, “TruBass” are protected under US and foreign patents issued and/or
pending. “Circle Surround Automotive”,“Circle SurroundII5.1”, “TruSurroundXT”, ”FOCUS”, “TruBass”, SRS and
symbol are trademarks of SRS Labs, Inc. in the United States and selected foreign countries. Neither the purchase
of the NJU26208, nor the corresponding sale of audio enhancement equipment conveys the right to sell
commercialized recordings made with any SRS technology. SRS Labs requires all set marks to comply with all rules
and regulations as outlined in the SRS Trademark Usage Manual separately provided.
For further information, please contact::
SRS Labs, Inc.
2909 Daimler Street.
Santa Ana, CA 92705 USA
Tel: 949-442-1070 Fax: 949-852-1099 http://www.srslabs.com
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
