General Description
The MAX15009 includes a 300mA LDO regulator, a
switched output, and an overvoltage protection (OVP)
controller to protect downstream circuits from high-
|voltage load dump. The MAX15011 includes only the
300mA LDO regulator and switched output. Both devices
operate over a wide supply voltage range from 5V to 40V
and are able to withstand load-dump transients up to
45V. The MAX15009/MAX15011 feature short-circuit and
thermal-shutdown protection.
The 300mA LDO regulator consumes 67μA quiescent
current at light loads and is well suited to power
battery applications. The LDO features independent
enable and hold inputs, as well as a microprocessor (μP)
reset output with adjustable reset timeout period.
The switched output of the MAX15009/MAX15011
incorporates a low RDS(ON) (0.28Ω, typ) pass transistor
switch internally connected to the output of the LDO regu-
lator. This switch features accurate current-limit sensing
circuitry and is capable of controlling remote loads. The
MAX15009/MAX15011 feature an adjustable current limit
and a programmable delay timer to set the overcurrent
detection blanking time of the switch and autoretry timeout.
The MAX15009 OVP controller operates with an external
enhancement mode n-channel MOSFET. While the moni-
tored voltage remains below the adjustable threshold, the
MOSFET stays on. When the monitored voltage exceeds
the OVP threshold, the OVP controller quickly turns off the
external MOSFET. The OVP controller is configurable as
a load-disconnect switch or a voltage limiter.
The MAX15009/MAX15011 are available in a thermally
enhanced, 32-pin (5mm x 5mm), TQFN package and
are fully specified over the -40°C to +125°C automotive
operating temperature range.
Applications
●Multimedia Power Supply
Features
●300mA LDO Regulator, Switched Output, and OVP
Controller (MAX15009)
●300mA LDO Regulator and Switched Output
(MAX15011)
●5V to 40V Wide Operating Supply Voltage Range
●45V Load Dump Protection
● 67μA Quiescent Current LDO Regulator
●OVP Controller Disconnects or Limits Output Voltage
During Battery Overvoltage Conditions
●LDO Regulator with Enable, Hold, and Reset
Features
● Internal 0.28Ω (typ) n-Channel Switch for Switched
Output
●100mA Switched Output with Adjustable Current-Limit
Blanking/Autoretry Delay
Typical Operating Circuits and Selector Guide appear at
end of data sheet.
+Denotes a lead(Pb)-free/RoHS-compliant package.
For tape and reel, add a T after “+.”
*EP = Exposed pad.
Pin Configurations continued at end of data sheet.
19-0923; Rev 2; 11/14
PART TEMP RANGE PIN-
PACKAGE
PKG
CODE
MAX15009ATJ+ -40°C to +125°C 32 TQFN-EP* T3255-4
MAX15011ATJ+ -40°C to +125°C 32 TQFN-EP* T3255-4
MAX15009
TQFN
(5mm x 5mm)
+
TOP VIEW
29
30
28
27
12
11
13
N.C.
N.C.
SGND
PGND
RESET
14
N.C.
OC_DELAY
OUT_LDO
IN
ILIM
IN
EN_PROT
1 2
OUT_SW
4 5 6 7
2324 22 20 19 18
N.C.
N.C.
N.C.
SOURCE
GATE
N.C.
N.C. OUT_LDO
3
21
31 10
N.C. FB_PROT
32 9
N.C. CT
OUT_SW
26 15 FB_LDO
*EP
*EP = EXPOSED PAD
N.C.
25 16 EN_LDO
N.C. EN_SW
8
17
HOLD
MAX15009/MAX15011 300mA LDO Regulators with
Switched Output and Overvoltage Protector
Pin Congurations
Ordering Information
EVALUATION KIT AVAILABLE
(All pins referenced to SGND, unless otherwise noted.)
IN, GATE.................................................................-0.3V to +45V
EN_LDO, EN_SW, EN_PROT......................-0.3V to (VIN + 0.3V)
SOURCE......................................................-0.3V to (VIN + 0.3V)
OUT_LDO, FB_LDO, FB_PROT, RESET,
OC_DELAY.........................................................-0.3V to +12V
GATE to SOURCE ..................................................-0.3V to +12V
OUT_SW, ILIM, HOLD......................-0.3V to (VOUT_LDO + 0.3V)
OUT_SW to OUT_LDO...........................................-12V to +0.3V
CT to SGND............................................................-0.3V to +12V
SGND to PGND.....................................................-0.3V to +0.3V
IN, OUT_LDO Current.......................................................700mA
OUT_SW Current..............................................................350mA
Current Sink/Source (all remaining pins) ............................50mA
Continuous Power Dissipation (TA = +70°C)
32-Pin TQFN (derate 34.5mW/°C above +70°C)............2.7W*
Thermal Resistance
θJA.............................................................................29.0°C/W
θJC...............................................................................1.7°C/W
Operating Temperature Range...........................-40°C to +125°C
Junction Temperature...........................
.......................
......+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s)...................................+300°C
*As per JEDEC 51 Standard, Multilayer Board (PCB).
(VIN = +14V, VSGND = VPGND = 0V, CGATE = 6000pF, CIN = 10μF (ESR < 1.5Ω), COUT_LDO = 22μF (ceramic), COUT_SW = 1μF,
VOUT_LDO = 5V, CT = open, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Supply Voltage Range VIN VIN ≥ VOUT + 1.5V 5 40 V
Supply Current IIN
MAX15009
EN_LDO = IN, EN_SW =
EN_PROT = 0V, IOUT_LDO
= 0µA, LDO on, switch off,
protector off, measured
from SGND
67 85
µA
EN_LDO = EN_SW = IN,
EN_PROT = 0V, LDO
ON, IOUT_LDO = 100µA,
switch on, IOUT_SW = 0µA,
protector off, measured
from SGND
290 360
EN_LDO = EN_SW =
EN_PROT = IN, LDO
ON, IOUT_LDO = 100µA,
switch on, IOUT_SW = 0µA,
protector on, measured
from SGND
360 500
MAX15011
EN_LDO = EN_SW = IN,
LDO ON, IOUT_LDO =
100µA, switch on, IOUT_
SW = 0µA, measured from
SGND
268 360
Shutdown Supply Current ISHDN
EN_LDO = EN_SW =
EN_PROT = SGND,
measured from SGND
TA = -40°C to
+85°C 16 30
µA
TA = -40°C to
+125°C 40
IN Undervoltage Lockout VUVLO VIN falling, GATE disabled 4.10 4.27 4.45 V
IN Undervoltage Lockout
Hysteresis VUVLO_HYST 260 mV
MAX15009/MAX15011 300mA LDO Regulators with
Switched Output and Overvoltage Protector
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Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(VIN = +14V, VSGND = VPGND = 0V, CGATE = 6000pF, CIN = 10μF (ESR < 1.5Ω), COUT_LDO = 22μF (ceramic), COUT_SW = 1μF,
VOUT_LDO = 5V, CT = open, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
Dual Mode is a trademark of Maxim Integrated Products, Inc.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
Thermal-Shutdown
Temperature TSHDN +160 °C
Thermal Hysteresis THYST 20 °C
LDO
Output Voltage VOUT_LDO
ILOAD = 1mA, FB_LDO = SGND 4.92 5.00 5.09
V
ILOAD = 300mA, VIN = 8V,
FB_LDO = SGND 4.88 5.00 5.11
FB_LDO Set-Point Voltage VFB_LDO
With respect to SGND, ILOAD = 1mA,
VOUT_LDO = 5V, adjustable output
option
1.21 1.235 1.26 V
Dual ModeK FB_LDO
Threshold VFB_LDO_TH
FB_LDO rising 0.125 V
FB_LDO falling 0.064
FB_LDO Input Current IFB_LDO VFB_LDO = 1V -100 +100 nA
LDO Output Voltage VLDO_ADJ Adjustable output option (Note 2) 1.8 11.0 V
LDO Dropout Voltage VDO
ILOAD = 300mA (Note 3) 800 1500 mV
ILOAD = 200mA (Note 3) 520 1000
LDO Output Current IOUT_LDO (Note 4) 300 mA
LDO Output Current Limit ILIM_LDO OUT_LDO = SGND, VIN = 6V 330 500 700 mA
OUT_LDO Line Regulation DVOUT/
DVIN
6V ≤ VIN ≤ 40V, ILOAD = 1mA,
VOUT_LDO = 5V 0.03 0.2
mV/V
6V ≤ VIN ≤ 40V, ILOAD = 1mA,
FB_LDO = SGND, VOUT_LDO = 3.3V 0.03 0.1
6V ≤ VIN ≤ 40V, ILOAD = 20mA,
FB_LDO = SGND, VOUT_LDO = 5V 0.27 1
6V ≤ VIN ≤ 40V, ILOAD = 20mA,
VOUT_LDO = 3.3V 0.27 0.5
OUT_LDO Load Regulation DVOUT/
DIOUT
1mA to 300mA, VIN = 8V,
FB_LDO = SGND 0.054 0.15
mV/mA
1mA to 300mA, VIN = 6.3V,
VOUT_LDO = 3.3V 0.038 0.100
OUT_LDO Power-Supply
Rejection Ratio PSRR ILOAD = 10mA, f = 100Hz, 500mVP-P,
VOUT_LDO = 5V 60 dB
OUT_LDO Startup Delay
Time tSTARTUP_DELAY
IOUT_LDO = 0mA, from EN_LDO rising
to 10% of VOUT_LDO (nominal),
FB_LDO = SGND
30 µs
MAX15009/MAX15011 300mA LDO Regulators with
Switched Output and Overvoltage Protector
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│
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Electrical Characteristics (continued)
(VIN = +14V, VSGND = VPGND = 0V, CGATE = 6000pF, CIN = 10μF (ESR < 1.5Ω), COUT_LDO = 22μF (ceramic), COUT_SW = 1μF,
VOUT_LDO = 5V, CT = open, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
OUT_LDO Overvoltage
Protection Threshold VOV_TH 1mA sink from OUT_LDO 105 110 %VOUT_LDO
OUT_LDO Overvoltage
Protection Sink Current IOV VOUT_LDO = VOUT (nominal) x 1.15 8 19 mA
ENABLE/HOLD INPUTS
EN_LDO to EN_PROT
Input Threshold Voltage
VIH 2V
VIL 0.7
EN_LDO, EN_PROT, EN_
SW Input Pulldown Current IEN_PD EN_ is internally pulled low to SGND 1 µA
HOLD Input Threshold
Voltage
VIH 1.4 V
VIL 0.4
HOLD Input Pullup IHOLD_PU
HOLD is internally pulled high to
OUT_LDO 0.6 µA
RESET
RESET Voltage Threshold
HIGH VRESET_H
RESET goes HIGH when rising VOUT_
LDO crosses this threshold,
FB_LDO = SGND
90.0 92.5 95.0 %VOUT_LDO
RESET goes HIGH when rising VFB_
LDO crosses this threshold 90.0 92.5 95.0 %VFB_LDO
RESET Voltage Threshold
LOW VRESET_L
RESET goes LOW when falling VOUT_
LDO crosses this threshold,
FB_LDO = SGND
88 90 92 %VOUT_LDO
RESET goes LOW when falling VFB_
LDO crosses this threshold 88 90 92 %VFB_LDO
VOUT_LDO to RESET Delay tRESET_FALL VOUT_LDO falling, 0.1V/µs 19 µs
CT Ramp Current ICT VCT = 0V 1.50 2 2.35 µA
CT Ramp Threshold VCT_TH VCT rising 1.190 1.235 1.270 V
RESET Output-Voltage Low VOL ISINK = 1mA, output asserted 0.1 V
RESET Open-Drain
Leakage Current ILEAK_RESET Output not asserted 150 nA
LOAD DUMP PROTECTOR (MAX15009 only)
FB_PROT Threshold
Voltage VTH_PROT FB_PROT rising 1.20 1.235 1.27 V
FB_PROT Threshold
Hysteresis VHYST 4%VTH_PROT
FB_PROT Input Current IFB_PROT VFB_PROT = 1.4V -100 +100 nA
Startup Response Time tSTART
EN_PROT rising, EN_LDO = IN, to
VGATE = 0.5V 20 µs
GATE Rise Time tGATE GATE rising to +8V, VSOURCE = 0V 1 ms
MAX15009/MAX15011 300mA LDO Regulators with
Switched Output and Overvoltage Protector
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Electrical Characteristics (continued)
(VIN = +14V, VSGND = VPGND = 0V, CGATE = 6000pF, CIN = 10μF (ESR < 1.5Ω), COUT_LDO = 22μF (ceramic), COUT_SW = 1μF,
VOUT_LDO = 5V, CT = open, TA = TJ = -40°C to +125°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
Note 1: Specifications to -40°C are guaranteed by design and not production tested.
Note 2: 1.8V is the minimum limit for proper HOLD functionality.
Note 3: Dropout is defined as VIN - VOUT_LDO when VOUT_LDO is 98% of the value of VOUT_LDO for VIN = VOUT_LDO + 1.5V.
Note 4: Maximum output current may be limited by the power dissipation of the package.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
FB_PROT to GATE Turn-
Off Propagation Delay tOV
FB_PROT rising from VTH_PROT
-250mV to VTH_PROT + 250mV 0.6 µs
GATE Output High Voltage VGATE - VIN
VSOURCE = VIN = 5.5V,
RGATE to IN = 1MΩ
VIN +
3.2
VIN +
3.5
VIN +
3.8 V
VSOURCE = VIN; VIN ≥ 14V,
RGATE to IN = 1MΩ
VIN +
7.0
VIN +
8.1
VIN +
9.5
GATE Output Pulldown
Current IGATEPD VGATE = 5V, VEN_PROT = 0V 63 100 mA
GATE Charge-Pump
Current IGATE GATE = SGND 45 µA
GATE-to-SOURCE Clamp
Voltage VCLMP 12 16 18 V
SWITCH
Switch Dropout DVSW
DVSW = VOUT_LDO - VOUT_SW, IOUT_
SW = 100mA, VOUT_LDO = 5V,
no external MOSFET
36 70 mV
Switch Current Limit ISW_LIM
ILIM = OUT_LDO, VIN = 8V 170 200 240
mA
RLIM = 100kΩ to SGND,
VOUT_LDO = 5V, VIN = 8V 85 100 120
RLIM = 39kΩ to SGND,
VOUT_LDO = 5V, VIN = 8V 30 40 50
Current-Limit Selector ILIM
Voltage VILIM RLIM = 100kΩ 0.395 V
OC_DELAY Timeout
Threshold VOC_DELAY 1.194 1.235 1.270 V
OC_DELAY Timeout Pullup
Current IOC_DELAY_UP VOC_DELAY = 0.5V rising 12.5 16.0 21.3 µA
OC_DELAY Timeout
Pulldown Current IOC_DELAY_DOWN VOC_DELAY = 0.5V, falling 0.75 1.00 1.40 µA
Minimum OC_DELAY
Timeout tOC_DELAY_MIN COC_DELAY is unconnected 12 µs
EN_SW to OUT_SW
Turn-On Time
OUT_SW rising to +0.5V,
ROUT_SW = 1kΩ 38 µs
EN_SW to OUT_SW
Turn-Off Propagation Delay tOV_SW
EN_SW falling, VOUT_LDO - VOUT_SW
rising to +1V, ROUT_SW = 1kΩ, VOUT_
LDO = 5V
18 µs
MAX15009/MAX15011 300mA LDO Regulators with
Switched Output and Overvoltage Protector
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│
5
Electrical Characteristics (continued)
(VIN = VEN_LDO = VEN_PROT = VEN_SW = +14V, CIN = 10μF, COUT_LDO = 22μF, COUT_SW = 1μF, VOUT_LDO = +5V, FB_LDO = SGND,
TA = +25°C, unless otherwise specied.)
LDO GROUND CURRENT
vs. LOAD CURRENT
MAX15009 toc02
LOAD CURRENT (mA)
0 75 150 22525 100 17550 125 200 250 275 300
100
110
90
80
70
60
50
GROUND CURRENT (A)
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
MAX15009 toc03
TEMPERATURE (°C)
-60 0-40 1008060 120-20 20 40 140
30
25
35
20
15
10
5
0
ISHDN (A)
LDO POWER-SUPPLY
REJECTION RATIO vs. FREQUENCY
MAX15009 toc04
FREQUENCY (Hz)
10 100k10k100 1k 1M
-10
-20
0
-30
-40
-50
-60
-70
-80
-90
LDO PSRR (dB)
IOUT_LDO = 10mA
VIN UVLO HYSTERESIS
vs. TEMPERATURE
MAX15009 toc05
TEMPERATURE (°C)
-50 7525-25 125500 100 150
400
350
300
250
200
150
100
UVLO HYSTERESIS (mV)
LDO LOAD REGULATION
MAX15009 toc06
I
OUT_LDO
(mA)
0 200100 300
5.10
5.08
5.06
5.04
5.02
5.00
4.98
4.96
4.94
4.92
4.90
VOUT_LDO (V)
LDO OUTPUT VOLTAGE
vs. INPUT VOLTAGE
MAX15009 toc07
VIN (V)
0 25155 352010 30 40
6
5
4
3
2
1
0
VOUT_LDO (V)
IOUT_LDO = 10mA
IOUT_LDO = 300mA
(PULSED)
LDO GROUND CURRENT
vs. LOAD CURRENT
MAX15009 toc01
LOAD CURRENT (mA)
0 0.3 0.6 0.90.1 0.4 0.70.2 0.5 0.8 1.0
74
72
70
68
66
64
62
60
58
56
54
52
GROUND CURRENT (A)
TA = -40°C
TA = +25°C
TA = +125°C
TA = +85°C
LDO LOAD-TRANSIENT RESPONSE
MAX15009 toc08
2ms/div
VOUT_LDO
5V, AC-COUPLED
20mV/div
IOUT_LDO
100mA/div
0A
LDO LOAD-TRANSIENT RESPONSE
MAX15009 toc09
400s/div
IOUT_LDO
100mA/div
0A
VOUT_LDO
5V, AC-COUPLED
100mV/div
MAX15009/MAX15011 300mA LDO Regulators with
Switched Output and Overvoltage Protector
Maxim Integrated
│
6
www.maximintegrated.com
Typical Operating Characteristics
(VIN = VEN_LDO = VEN_PROT = VEN_SW = +14V, CIN = 10μF, COUT_LDO = 22μF, COUT_SW = 1μF, VOUT_LDO = +5V, FB_LDO = SGND,
TA = +25°C, unless otherwise specied.)
LDO OUTPUT VOLTAGE
vs. TEMPERATURE
MAX15009 toc10
TEMPERATURE (°C)
-50 7525-25 125500 100 150
5.10
5.05
5.00
4.95
4.90
4.85
4.80
VOUT_LDO (V)
IOUT_LDO = 10mA
IOUT_LDO = 100A
IOUT_LDO = 100mA
VIN = 8V
IOUT_LDO = 300mA
SWITCH LOAD-TRANSIENT RESPONSE
MAX15009 toc11
400s/div
VOUT_LDO
5V, AC-COUPLED
100mV/div
VOUT_SW
5V, AC-COUPLED
100mV/div
IOUT_SW
100mA/div 0A
IOUT_LDO = 100mA
IOUT_SW = 100mA
LINE-TRANSIENT RESPONSE
MAX15009 toc12
40ms/div
VOUT_LDO
3.3V, AC-COUPLED
50mV/div
VOUT_SW
3.3V, AC-COUPLED
50mV/div
VIN
20V/div
VOUT_PROT
20V/div
0V
0V
LINE-TRANSIENT RESPONSE
MAX15009 toc13
40ms/div
VOUT_LDO
3.3V, AC-COUPLED
20mV/div
VOUT_SW
3.3V, AC-COUPLED
20mV/div
VIN
10V/div
VOUT_PROT
10V/div
0V
0V
LDO DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX15009 toc14
IOUT_LDO (mA)
0 200100 300
1000
800
600
400
200
900
700
500
300
100
0
LDO DROPOUT VOLTAGE (mV)
SWITCH DROPOUT VOLTAGE
vs. LOAD CURRENT
MAX15009 toc15
IOUT_SW (mA)
IOUT_LDO = 10mA
0 10050
40
30
20
10
35
25
15
5
0
SWITCH DROPOUT VOLTAGE (mV)
SWITCH DROPOUT VOLTAGE
vs. TEMPERATURE
MAX15009 toc16
TEMPERATURE (°C)
-45 105 1305 30 55-20 80
60
40
50
30
20
10
0
SWITCH DROPOUT VOLTAGE (mV)
IOUT_LDO = 10mA
IOUT_SW = 100mA
IOUT_SW = 10mA
STARTUP RESPONSE THROUGH VIN
MAX15009 toc17
20ms/div
VIN
20V/div
0V
0V
0V
0V
VRESET
5V/div
VOUT_LDO
5V/div
VOUT_SW
5V/div
IOUT_LDO = 100mA
IOUT_SW = 70mA
EN_LDO = EN_SW = IN
MAX15009/MAX15011 300mA LDO Regulators with
Switched Output and Overvoltage Protector
Maxim Integrated
│
7
www.maximintegrated.com
Typical Operating Characteristics (continued)
(VIN = VEN_LDO = VEN_PROT = VEN_SW = +14V, CIN = 10μF, COUT_LDO = 22μF, COUT_SW = 1μF, VOUT_LDO = +5V, FB_LDO = SGND,
TA = +25°C, unless otherwise specied.)
STARTUP RESPONSE THROUGH EN
MAX15008 toc18
20ms/div
IOUT_LDO = 100mA
IOUT_SW = 70mA
VEN_LDO = VEN_SW
VIN
VEN_LDO
5V/div
VRESET
5V/div
V
OUT_LDO
5V/div
0V
0V
0V
0V
14V
VOUT_SW
5V/div
SHUTDOWN RESPONSE THROUGH VIN
MAX15008 toc19
2ms/div
IOUT_LDO = 100mA
IOUT_SW = 70mA
EN_LDO = VEN_SW = IN
VIN
10V/div
VRESET
5V/div
VOUT_SW
5V/div
VOUT_LDO
5V/div
0V
0V
0V
0V
SHUTDOWN RESPONSE THROUGH EN
MAX15008 toc20
IOUT_LDO = 100mA
IOUT_SW = 70mA
EN_LDO = EN_SW
VOUT_SW
5V/div
VOUT_LDO
5V/div
VRESET
5V/div
VIN
20V/div 6V
0V
0V
0V
0V
VEN_LDO
5V/div
LDO, EN_LDO, AND HOLD TIMING
MAX15009 toc21
200ms/div
VEN_LDO
5V/div
V
OUT_LDO
5V/div
HOLD
5V/div
RESET
5V/div 0V
0V
0V
0V
HOLD PULLED UP
TO OUT_LDO
GROUND CURRENT DISTRIBUTION
HISTOGRAM (TA = -40°C)
MAX15009 toc22
GROUND CURRENT (A)
79 817775
737169
67
70
50
30
10
60
40
20
0
NUMBER OF PARTS
GROUND CURRENT DISTRIBUTION
HISTOGRAM (TA = +125C)
MAX15009 toc23
GROUND CURRENT (A)
67 69 7165
6361
57 59
55
5351
90
40
30
20
10
80
70
60
50
0
NUMBER OF PARTS
PROTECTOR GATE VOLTAGE
vs. INPUT VOLTAGE (MAX15009 ONLY)
MAX15009 toc24
VIN (V)
20 2515 30 4010 3550
50
40
30
20
45
35
25
10
0
15
5
GATE VOLTAGE (V)
VGATE
VIN
PROTECTOR STARTUP RESPONSE
MAX15009 toc25
10ms/div
VIN
10V/div
VGATE
10V/div
VOUT_PROT
10V/div
IOUT_PROT = 1A
0V
0V
0V
MAX15009/MAX15011 300mA LDO Regulators with
Switched Output and Overvoltage Protector
Maxim Integrated
│
8
www.maximintegrated.com
Typical Operating Characteristics (continued)
(VIN = VEN_LDO = VEN_PROT = VEN_SW = +14V, CIN = 10μF, COUT_LDO = 22μF, COUT_SW = 1μF, VOUT_LDO = +5V, FB_LDO = SGND,
TA = +25°C, unless otherwise specied.)
OVERVOLTAGE SWITCH FAULT
MAX15009 toc26
400s/div
VIN
10V/div
VGATE
20V/div
VOUT_PROT
20V/div
IOUT_PROT = 1A
VOV = 25V
0V
0V
0V
OVERVOLTAGE LIMIT FAULT
MAX15009 toc27
40ms/div
VIN
20V/div
VGATE
20V/div
VOUT_PROT
20V/div
IOUT_PROT = 1A
OV THRESHOLD = 35V
0V
0V
0V
RESET TIMEOUT DELAY
vs. CRESET
MAX15009 toc28
CRESET (nF)
862 1040
7
5
3
6
4
2
0
1
RESET TIMEOUT DELAY (ms)
RESET TIMEOUT DELAY
vs. TEMPERATURE
MAX15009 toc29
TEMPERATURE (°C)
-25 250 100 12550 15075-50
0
0.6
1.2
1.8
0.4
1.0
1.6
0.2
0.8
1.4
2.0
RESET TIMEOUT DELAY (ms)
CRESET = 2.2nF
CRESET = 220pF
SWITCH CURRENT LIMIT
vs. ILIM RESISTANCE
MAX15009 toc30
ILIM RESISTANCE (k)
180120 140 1606040 100 2008020
20
60
120
180
40
100
160
80
140
200
SWITCH CURRENT LIMIT (mA)
TA = +125°C
TA = -40°C
TA = +25°C
TA = +85°C
INTERNAL PRESET SWITCH CURRENT LIMIT
vs. TEMPERATURE
MAX15009 toc31
TEMPERATURE (°C)
-25 25 500 125100 15075-50
150
180
210
240
170
160
200
230
190
220
250
PRESET CURRENT LIMIT (mA)
IOC_DELAY_UP AND IOC_DELAY_DOWN
vs. TEMPERATURE
MAX15009 toc32
TEMPERATURE (°C)
-25 25 500 125100 15075-50
0
6
12
4
2
10
16
8
14
18
OC_DELAY PULLUP/PULLDOWN CURRENT (A)
IOC_DELAY_DOWN
IOC_DELAY_UP
MAX15009/MAX15011 300mA LDO Regulators with
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Typical Operating Characteristics (continued)
PIN NAME FUNCTION
MAX15009 MAX15011
1–4, 8, 11, 14,
26, 29–32 N.C. —
No Connection. Not internally connected.
1–4, 8,
10–14, 18,
26, 29–32
— N.C.
5 SGND SGND Signal Ground
6 PGND PGND
Ground. PGND is also the return path for the overvoltage protector pulldown current
for the MAX15009. In this case, connect PGND to SGND at the negative terminal of
the bypass capacitor connected to the source of the external MOSFET. For the
MAX15011, connect PGND to SGND together to the local ground plane.
7RESET RESET
Active-Low Open-Drain Reset Output. RESET is low while OUT_LDO is below the
reset threshold. Once OUT_LDO has exceeded the reset threshold, RESET remains
low for the duration of the reset timeout period then goes high.
9 CT CT Reset Timeout Adjust Input. Connect a capacitor (CRESET) from CT to ground to
adjust the reset timeout period. See the Setting the RESET Timeout Period section.
10 FB_PROT —
Overvoltage-Threshold Adjustment Input. Connect FB_PROT to an external resistive
voltage-divider network to adjust the desired overvoltage threshold. Use FB_PROT to
monitor a system input or output voltage. See the Setting the Overvoltage Threshold
(MAX15009 Only) section.
12 GATE —
Protector Gate Drive Output. Connect GATE to the gate of an external n-channel
MOSFET. GATE is the output of a charge pump with a 45µA pullup current to 8.1V
(typ) above IN during normal operation. GATE is quickly turned off through a 63mA
internal pulldown during an overvoltage condition. GATE then remains low until
FB_PROT has decreased below 96% of the overvoltage threshold. GATE pulls
low when EN_PROT is low.
13 SOURCE — Output-Voltage Sense Input. Connect SOURCE to the source of the external
n-channel MOSFET.
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Pin Description
PIN NAME FUNCTION
MAX15009 MAX15011
15 FB_LDO FB_LDO
LDO Voltage Feedback Input. Connect FB_LDO to SGND to select the preset +5V
output voltage. Connect FB_LDO to an external resistive voltage-divider for adjustable
output operation. See the Setting the Output Voltage section.
16 EN_LDO EN_LDO
Active-High LDO Enable Input. Connect EN_LDO to IN or to a logic-high voltage
to
turn on the regulator. To place the LDO in shutdown, pull EN_LDO low or leave
unconnected and leave HOLD unconnected. EN_LDO is internally pulled to SGND
through a 1FA current sink. See the Control Logic section.
17 EN_SW EN_SW
Active-High Switch Enable Input. Connect EN_SW to IN or to a logic-high voltage
to turn on the switch. Pull EN_SW low or leave unconnected to place the switch in
shutdown. EN_SW is internally pulled to SGND through a 1µA current sink.
18 EN_PROT —
Protector Enable Input. Drive EN_PROT low to force GATE low and turn off the
external n-channel MOSFET. EN_PROT is internally pulled to SGND by a 1µA
sink current. Connect EN_PROT to IN for normal operation.
19, 20 IN IN Regulator Input. Bypass IN to SGND with a 10µF capacitor with an ESR < 1.5Ω.
21, 22 OUT_LDO OUT_LDO
LDO Regulator Output. Bypass OUT_LDO to SGND with a ceramic capacitor with a
minimum value of 22µF. OUT_LDO has a xed 5V output or can be adjusted from
1.8V to 11V. See the Setting the Output Voltage section.
23 OC_DELAY OC_DELAY
Switch Overcurrent Blanking Time Programming Input. Leave OC_DELAY unconnected
to select the minimum delay timeout before turning the switch off. OC_DELAY is
internally pulled to SGND through a 1µA current source. See the Programming the
Switch Overcurrent Blanking Time section.
24 ILIM ILIM
Switch Current-Limit Set Input. Connect a 10kΩ to 200kΩ resistor from ILIM to
SGND to select the current limit for the internal switch. Connect ILIM to OUT_LDO
to select the internal 170mA (min) current-limit threshold. Do not leave ILIM
unconnected. See the Setting the Switch Current Limit section.
25 HOLD HOLD
Active-Low Hold Input. If EN_LDO is high when HOLD is forced low, the regulator
latches the state of the EN_LDO input and allows the regulator to remain turned
on when EN_LDO is subsequently pulled low. To shut down the regulator, release
HOLD after EN_LDO is pulled low. If HOLD functionality is unused, connect HOLD
to OUT_LDO or leave unconnected. HOLD is internally pulled up to OUT_LDO
through a 0.6µA current source. See the Control Logic section.
27, 28 OUT_SW OUT_SW Switch Output. Bypass OUT_SW to SGND with a minimum 0.1µF ceramic capacitor.
— EP EP Exposed Pad. Connect EP to SGND plane. EP also functions as a heatsink to
maximize thermal dissipation. Do not use as the main ground connection.
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Pin Description (continued)
BIAS AND VOLTAGE
REFERENCE
CONTROL
LOGIC
VREF 1.235V
OUT_LDO
FB_LDO
CT
OUT_SW
OUT_LDO
RESET
GATE
VIN
SOURCE
M
U
X
0.124V
5V LDO
OUTPUT
PROTECTOR
OUTPUT
RESET
OUTPUT
IN LDO
IN
VIN
EN_PROT
EP SGND PGND
ENABLE
PROTECTOR
EN_LDO
ENABLE LDO
EN_SW
OC_DELAY
ENABLE SWITCH
HOLD
HOLD
2µA
0.925 x VREF
4.75V
IN
GATE UVLO
VGATE
VREF
VREF
ILIM
16µA
OUT_SW
SWITCH
1µA
VREF
S
R
Q
0.1V
OVERVOLTAGE PROTECTOR
(MAX15009 ONLY)
SWITCH
OUTPUT
FB_PROT
MAX15009/MAX15011 300mA LDO Regulators with
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Functional Diagram
Detailed Description
The MAX15009/MAX15011 integrate a 300mA LDO volt-
age regulator, a current-limited switched output, and an
OVP controller (MAX15009 only). These devices operate
over a wide supply voltage range from 5V to 40V and are
able to withstand load-dump transients up to 45V.
The MAX15009/MAX15011 feature a 300mA LDO regu-
lator that consumes 70μA of current under light-load
conditions and feature a fixed 5V or an adjustable output
voltage (1.8V to 11V). Connect FB_LDO to ground to
select a fixed 5V output voltage, or select the LDO output
voltage by connecting an external resistive voltage-divider
at FB_LDO. The regulator sources at least 300mA of
current and includes a current limit of 330mA (min).
Enable the LDO by pulling EN_LDO high.
The switch features accurate current-limit-sensing
circuitry and is capable of controlling remote loads. Once
enabled, an internal charge pump generates the overdrive
voltage for an internal MOSFET. The switch then starts to
conduct and OUT_SW is charged up to VOUT_LDO. The
switch is enabled when the output voltage of the LDO is
above the RESET threshold voltage (92.5% of the LDO
nominal output value).
An overcurrent condition exists when the current at
OUT_SW (IOUT_SW) exceeds the 200mA (typ) internal
factory-set current-limit threshold or the externally adjust-
able current-limit threshold. During a continuous over-
current event, the capacitor connected at OC_DELAY
(COC_DELAY) is charged up to a voltage of 1.235V
with a current (IOC_DELAY_UP). When this voltage is
reached, an overcurrent latch is set and the gate of the
internal MOSFET is discharged, reducing IOUT_SW.
COC_DELAY is then discharged through a pulldown
current, IOC_DELAY_DOWN (IOC_DELAY_UP/16) and the
internal MOSFET remains off until COC_DELAY has been
discharged to 0.1V. After this user-programmable turnoff
delay, the switch turns back on. This charge/discharge
is repeated if the overcurrent condition persists. The
switch returns to normal operation once the overcurrent
condition has been removed.
The OVP controller (MAX15009 only) relies on an external
MOSFET with adequate voltage rating (VDSS) to protect
downstream circuitry from overvoltage transients. The
OVP controller drives the gate of the external n-channel
MOSFET, and is configurable to operate as an overvolt-
age protection switch or as a closed-loop voltage limiter.
GATE Voltage (MAX15009 Only)
The MAX15009 uses a high-efficiency charge pump
to generate the GATE voltage for the external n-chan-
nel MOSFET. Once the input voltage (VIN) exceeds
the undervoltage-lockout (UVLO) threshold, the internal
charge pump fully enhances the external n-channel
MOSFET. An overvoltage condition occurs when the
voltage at FB_PROT goes above the threshold voltage
(VTH_PROT). After VTH_PROT is exceeded, GATE is
quickly pulled to PGND with a 63mA pulldown current.
The MAX15009 includes an internal clamp from GATE
to SOURCE that ensures that the voltage at GATE never
exceeds one diode drop below SOURCE during gate
discharge. The voltage clamp also prevents the GATE-to-
SOURCE voltage from exceeding the absolute maximum
rating for the VGS of the external MOSFET in case the
source terminal is accidentally shorted to 0V.
Overvoltage Monitoring (MAX15009 Only)
The OVP controller monitors the voltage at FB_PROT
and controls an external n-channel MOSFET, isolating, or
limiting the load during an overvoltage condition. Operation
in OVP switch mode or limiter mode depends on the
connection between FB_PROT and the external MOSFET.
Overvoltage Switch Mode
When operating in OVP switch mode, the FB_PROT
divider is connected to the drain of the external MOSFET.
The feedback path consists of the voltage-divider
tapped at FB_PROT, FB_PROT’s internal comparator,
the internal gate-charge pump/gate pulldown, and the
external n-channel MOSFET (Figure 1). When the pro-
grammed overvoltage threshold is exceeded, the internal
comparator quickly pulls GATE to ground and turns off the
Figure 1. Overvoltage-Limiter Switch Configuration (MAX15009)
IN
VIN
FB_PROT
SGND
GATE
SOURCE
PROTECTOR
OUTPUT
MAX15009
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external MOSFET, disconnecting the power source from
the load. In this configuration, the voltage at the source
of the MOSFET is not monitored. When the voltage at
FB_PROT decreases below the overvoltage threshold,
the MAX15009 raises the voltage at GATE, reconnecting
the load to the power source.
Overvoltage-Limiter Mode (MAX15009 Only)
When operating in overvoltage-limiter mode, the feed-
back path consists of SOURCE, FB_PROT’s internal
comparator, the internal gate-charge pump/gate pulldown,
and the external n-channel MOSFET (Figure 2). This
configuration results in the external MOSFET operating as a
hysteretic voltage regulator.
During normal operation, GATE is enhanced 8.1V above
VIN. The external MOSFET source voltage is monitored
through a resistive voltage-divider between SOURCE
and FB_PROT. When VSOURCE exceeds the adjustable
overvoltage threshold, an internal pulldown switch dis-
charges the gate voltage and quickly turns the MOSFET
off. Consequently, the source voltage begins to fall. The
VSOURCE fall time is dependent on the MOSFET’s gate
charge, the internal charge-pump current, the output load,
and any load capacitance at SOURCE. When the voltage
at FB_PROT is below the overvoltage threshold by an
amount equal to the hysteresis, the charge pump restarts
and turns the MOSFET back on. In this way, the OVP
controller attempts to regulate VSOURCE around the
overvoltage threshold. SOURCE remains high during
overvoltage transients and the MOSFET continues to
conduct during an overvoltage event. The hysteresis of
the FB_PROT comparator and the gate turn-on delay
force the external MOSFET to operate in a switched on/
off sequence during an overvoltage event.
Exercise caution when operating the MAX15009 in
voltage-limiting mode for long durations. Care must be
taken against prolonged or repeated exposure to over-
voltage events while delivering large amounts of load
current, as the power dissipation in the external MOSFET
may be high under these conditions. To prevent dam-
age to the MOSFET, implement proper heatsinking. The
capacitor tied between SOURCE and ground may also
be damaged if the ripple current rating for the capacitor
is exceeded.
As the transient voltage decreases, the voltage at
SOURCE falls. For fast-rising transients and very large
MOSFETs, connect an additional capacitor from GATE to
PGND. This capacitor acts as a voltage-divider working
against the MOSFET’s drain-to-gate capacitance. If using
a very low gate-charge MOSFET, additional capacitance
from GATE to ground might be required to reduce the
switching frequency.
Control Logic
The MAX15009/MAX15011 LDO features two logic inputs,
EN_LDO and HOLD. For example, when the ignition key
signal drives EN_LDO high, the regulator turns on and
remains on even if EN_LDO goes low, as long as HOLD
is forced low and stays low after initial regulator power-
up. In this state, releasing HOLD turns the regulator
output (OUT_LDO) off. This feature makes it possible to
implement a self-holding circuit without external com-
ponents. Forcing EN_LDO low and HOLD high (or
unconnected) places the regulator into shutdown mode,
reducing the supply current to less than 16μA. Table 1
shows the state of OUT_LDO with respect to EN_LDO
and HOLD. Leave HOLD unconnected or connect directly
to OUT_LDO to allow the EN_LDO input to act as a
standard on/off logic input for the regulator.
Figure 2. Overvoltage Limiter (MAX15009)
IN
VIN
FB_PROT
SGND
GATE
SOURCE
PROTECTOR
OUTPUT
MAX15009
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Applications Information
Setting the Output Voltage
The MAX15009/MAX15011 feature dual-mode operation:
these devices operate in either a preset voltage mode
or an adjustable mode. In preset-voltage mode, internal
feedback resistors set the linear regulator output voltage
(VOUT_LDO) to 5V. To select the preset 5V output voltage,
connect FB_LDO to SGND.
To select an adjustable output voltage between 1.8V and
11V, use two external resistors connected as a voltage-
divider to FB_LDO (Figure 3). Set the output voltage
using the following equation:
VOUT_LDO = VFB_LDO x (R1 + R2) / R2
where VFB_LDO = 1.235V and R2 ≤ 50kΩ.
Setting the RESET Timeout Period
The reset-timeout period is adjustable to accommodate
a variety of applications. Set the reset-timeout period
by connecting a capacitor (CRESET) between CT and
SGND. Use the following formula to select the reset-
timeout period (tRESET):
tRESET = CRESET x VCT_TH/ICT
where tRESET is in seconds and CRESET is in μF.
VCT_TH is the CT ramp threshold in volts and ICT is the
CT ramp current in μA, as described in the Electrical
Characteristics table.
Leave CT open to select a typical reset timeout of 19μs.
To maintain reset accuracy, use a low-leakage type of
capacitor.
Setting the Switch Current Limit
The switch block features accurate current-limit-sensing
circuitry. A resistor connected from ILIM to SGND can be
used to select the current-limit threshold using the follow-
ing relationship:
ISW_LIM (mA) = RILIM (kΩ) x 1mA/kΩ
where 20kΩ ≤ RILIM ≤ 200kΩ.
Connect ILIM to OUT_LDO to select the default current
limit of 200mA (typ).
Figure 3. Setting the LDO Output Voltage
Table 1. EN_LDO/HOLD Truth/State Table
OPERATION STATE EN_LDO HOLD OUT_LDO COMMENT
Initial State Low Don’t care OFF
EN_LDO is pulled to SGND through an internal pulldown. HOLD
is unconnected and is internally pulled up to OUT_LDO. The
regulator is disabled.
Turn-On State High Don’t care ON EN_LDO is externally driven high turning regulator on. HOLD is
pulled up to OUT_LDO.
Hold Setup State High Low ON HOLD is externally pulled low while EN_LDO remains high
(latches EN_LDO state).
Hold State Low Low ON EN_LDO is driven low or left unconnected. HOLD remains
externally pulled low keeping the regulator on.
Off State Low High or
unconnected OFF
HOLD is driven high or left unconnected while EN_LDO is low.
The regulator is turned off and EN_LDO/HOLD logic returns to the
initial state.
IN
R1
R2
VIN
FB_LDO
SGND
OUT_LDO
MAX15009
MAX15011
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Programming the Switch Overcurrent
Blanking Time
The switch provides an adjustable overcurrent blanking
time to allow the safe charge of large capacitive loads.
When an overcurrent event is detected, a delay period
elapses before the condition is latched and the internal
MOSFET is turned off. This period is the overcurrent
delay (tOC_DELAY). Set the overcurrent delay using the
following equation:
tOC_DELAY = COC_DELAY x VOC_DELAY/IOC_DELAY_UP
where tOC_DELAY is in seconds and COC_DELAY is in μF.
VOC_DELAY is the overcurrent-delay timeout threshold
voltage in volts and IOC_DELAY_UP is the overcurrent-
delay timeout pullup current in μA, as seen in the
Electrical Characteristics table.
Ensure that the switch is not disabled due to a large startup
inrush current by selecting a large enough value for over-
current blanking time. Assume that the current available for
charging the total switch output capacitance (C
OUT_SW
)
is the difference between the current-limit threshold value
(I
SW_LIM
), and the nominal DC load current at OUT_SW
(IOUT_SW_NOM), and select the COC_DELAY using the
following relationship:
OC_DELAY_UP OUT_LDO OUT_SW
OC_DELAY OC_DELAY SW_LIM OUT_SW_NOM
I VC
CV (I I )
××
≥
×−
COC_DELAY also affects the length of time before the
MAX15009/MAX15011 attempt to turn the switch back
on. Set the autoretry delay using the following equation:
tOC_RETRY = COC_DELAY x
VOC_DELAY/IOC_DELAY_DOWN
where tOC_RETRY is in seconds, COC_DELAY is in μF,
VOC_DELAY is in volts, and IOC_DELAY_DOWN is in μA.
COC_DELAY should be a low-leakage type of capacitor
with a minimum value of 100pF.
Setting the Overvoltage Threshold
(MAX15009 Only)
The MAX15009 provides an accurate means to set
the overvoltage threshold for the OVP controller using
FB_PROT. Use a resistive voltage-divider to set the
desired overvoltage threshold (Figure 4). FB_PROT has a
rising 1.235V threshold with a 4% falling hysteresis.
Begin by selecting the total end-to-end resistance, RTOTAL
= R3 + R4. Choose RTOTAL to yield a total current equiva-
lent to a minimum of 100 x IFB_PROT (FB_PROT’s
input maximum bias current) at the desired overvoltage
threshold. See the Electrical Characteristics table.
For example:
With an overvoltage threshold (VOV) set to 20V, RTOTAL
< 20V/(100 x IFB_PROT), where IFB_PROT is FB_PROT’s
maximum 100nA bias current:
RTOTAL < 2MΩ
Use the following formula to calculate R4:
R4 = VTH_PROT x RTOTAL / VOV
where VTH_PROT is the 1.235V FB_PROT rising
threshold and VOV is the desired overvoltage threshold.
R4 = 124kΩ:
RTOTAL = R3 + R4
where R3 = 1.88MΩ. Use a standard 1.87MΩ resistor.
A lower value for total resistance dissipates more power,
but provides better accuracy and robustness against
external disturbances.
Figure 4. Setting the Overvoltage Threshold (MAX15009)
R4
R3
R5
R6
IN
VIN
FB_PROT
SGND
GATE
SOURCE
PROTECTOR
OUTPUT
MAX15009
IN
VIN
FB_PROT
SGND
GATE
SOURCE
PROTECTOR
OUTPUT
MAX15009
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Input Transients Clamping
When the external MOSFET is turned off during an
overvoltage event, stray inductance in the power
path may cause additional input-voltage spikes that
exceed the VDSS rating of the external MOSFET, or the
absolute maximum rating for the MAX15009. Minimize stray
inductance in the power path using wide traces and
minimize the loop area included by the power traces and
the return ground path.
For further protection, add a zener diode or transient volt-
age suppressor (TVS) rated below the absolute maximum
rating limits (Figure 5).
External MOSFET Selection
Select the external MOSFET with adequate voltage
rating (VDSS) to withstand the maximum expected load-
dump input voltage. The on-resistance of the MOSFET
(RDS(ON)) should be low enough to maintain a minimal
voltage drop at full load, limiting the power dissipation of
the MOSFET.
During regular operation, the power dissipated by the
MOSFET is:
PNORMAL = ILOAD2 x RDS(ON)
Normally, this power loss is small and is safely handled
by the MOSFET; however, when operating the MAX15009
in overvoltage-limiter mode under prolonged or frequent
overvoltage events, select an external MOSFET with an
appropriate power rating.
During an overvoltage event, the power dissipation in
the external MOSFET is proportional to both load current
and to the drain-source voltage, resulting in high power
dissipated in the MOSFET (Figure 6). The power
dissipated across the MOSFET is:
POV_LIMITER = VQ1 x ILOAD
where VQ1 is the voltage across the MOSFET’s drain and
source during overvoltage-limiter operation, and ILOAD is
the load current.
Overvoltage-Limiter Mode Switching
Frequency
When the MAX15009 is configured in overvoltage-limiter
mode, the external n-channel MOSFET is subsequently
switched on and off during an overvoltage event. The
output voltage at OUT_PROT resembles a periodic
sawtooth waveform. Calculate the period of the waveform
(tOVP) by summing three time intervals (Figure 7):
tOVP = t1 + t2 + t3
where t1 is the VSOURCE output discharge time, t2 is the
GATE delay time, and t3 is the VSOURCE output charge
time.
During an overvoltage event, the power dissipated inside
the MAX15009 is due to the gate pulldown current
Figure 5. Protecting the MAX15009 Input from High-Voltage
Transients
Figure 6. Power Dissipated Across MOSFETs During an
Overvoltage Fault (Overvoltage Limiter Mode)
IN
VIN
SGND
GATE
SOURCE
TVS
MAX15009
LOAD
IN
FB_PROT
SGND
GATE
SOURCE
TVS
MAX15009
LOAD
ILOAD
+ VQ1 -
VSOURCE
VSOURCE
VOV
VMAX
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(IGATEPD) . This amount of power dissipation is worse
when ISOURCE = 0 (CSOURCE is discharged only by the
internal current sink).
The worst-case internal power dissipation contribution in
overvoltage limiter mode (POVP) in watts can be approxi-
mated using the following equation:
1
OVP OV GATEPD OVP
t
P V 0.98 I t
= ×× ×
where VOV is the overvoltage threshold voltage in volts
and IGATEPD is 100mA (max) GATE pulldown current.
Output Discharge Time (t1)
When the voltage at SOURCE exceeds the adjusted over-
voltage threshold, GATE’s internal pulldown is enabled
until V
SOURCE
drops by 4%. The internal current sink
(I
GATEPD
) and the external load current (I
LOAD
) discharge
the external capacitance from SOURCE to ground.
Calculate the discharge time (t
1
) using the following
equation:
OV
1 SOURCE LOAD GATEPD
0.04 V
tC II
×
= ×
+
where t1 is in ms, VOV is the adjusted overvoltage thresh-
old in volts, ILOAD is the external load current in mA, and
IGATEPD is the 100mA (max) internal pulldown current of
GATE. CSOURCE is the value of the capacitor connected
between the source of the MOSFET and PGND in μF.
GATE Delay Time (t2)
When SOURCE falls 4% below the overvoltage-threshold
voltage, the internal current sink is disabled and the
internal charge pump begins recharging the external
GATE voltage. Due to the external load, the SOURCE
voltage continues to drop until the gate of the MOSFET
is recharged. The time needed to recharge GATE and
reenhance the external MOSFET is approximately:
GS(TH) F
2 iss GATE
VV
tC I
+
= ×
where t2 is in μs, Ciss is the input capacitance of the
MOSFET in pF, and VGS(TH) is the GATE-to-SOURCE
threshold voltage of the MOSFET in volts. VF is the 0.7V
(typ) internal clamp-diode forward voltage of the MOSFET
in volts, and IGATE is the charge-pump current 45μA (typ).
Any external capacitance between GATE and PGND
adds up to Ciss.
During t2, the SOURCE capacitance (CSOURCE) loses
charge through the output load. The voltage across
CSOURCE, ΔV2, decreases until the MOSFET reaches its
VGS(TH) threshold. Approximate ΔV2 using the following
formula:
LOAD 2
2SOURCE
It
VC
×
∆=
SOURCE Output Charge Time (t3)
Once the GATE voltage exceeds the GATE-to-SOURCE
threshold (VGS(TH)) of the external MOSFET, the
MOSFET turns on and the charge through the internal
charge pump with respect to the drain potential (QG)
determines the slope of the output voltage rise. The time
required for the SOURCE voltage to rise again to the
overvoltage threshold is:
rss SOURCE
3GATE
CV
tI
×∆
=
where VSOURCE = (VOV x 0.04) + V2 in volts, and Crss
is the MOSFET’s reverse transfer capacitance in pF. Any
external capacitance between GATE and PGND adds up
to Crss.
Figure 7. MAX15009 Timing Diagram
t2
t1
tOVP
t3
GATE
SOURCE
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Power Dissipation/Junction Temperature
During normal operation, the MAX15009/MAX15011
have two main sources of internal power dissipation:
the
LDO and the switched output.
The internal power dissipation due to the LDO can be
calculated as:
IN OUT_LDO OUT_LDO OUT_SW
LDO
P (V V ) (I I )
=− ×+
where VIN is the LDO input supply voltage in volts,
VOUT_LDO is the output voltage of the LDO in volts,
IOUT_LDO is the LDO total load current in mA, and
IOUT_SW is the switch load current in mA.
Calculate the power dissipation due to the switch as:
PSW = ΔVSW ×IOUT_SW
where ΔVSW is the switch dropout voltage in volts for the
given IOUT_SW current in mA.
The total power dissipation (PDISS) in mW as:
PDISS = PLDO + PSW
For prolonged exposure to overvoltage events, use the
VIN voltage expected during overvoltage conditions.
Under these circumstances the corresponding internal
power dissipation contribution (POVP) calculated in the
previous section should also be included in the total
power dissipation (PDISS).
For a given ambient temperature (TA) calculate the
junction temperature (TJ) as follows:
TJ = TA + PDISS x θJA
where TJ and TA are in °C and θJA is the junction-to-
ambient thermal resistance in °C/W, as listed in the
Absolute Maximum Ratings section.
The junction temperature should never exceed +150°C
during normal operation.
Thermal Protection
When the junction temperature exceeds TJ = +160°C, the
MAX15009/MAX15011 shut down to allow the device to
cool. When the junction temperature drops to +140°C, the
thermal sensor turns all enabled blocks on again, result-
ing in a cycled output during continuous thermal-overload
conditions. Thermal protection protects the MAX15009/
MAX15011 from excessive power dissipation. For
continuous operation, do not exceed the absolute
maximum junction temperature rating of +150°C.
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CRESET COC_DELAY
MAX15009
IN PGND
OUT_SW
FB_LDO
OUT_LDO
RESET
CT OC_DELAY
COC_DELAY
OC_DELAY
GATE
CIN
5V TO 40V INPUT
EN_LDOLDO ON/OFF
EN_SW
EN_PROT
SWITCH ON/OFF
ILIM
PROTECTOR ON/OFF
RILIM
RILIM
HOLDHOLD
COUT_SW
RPU
COUT_LDO
SOURCE FB_PROT
DC-DC
MAX5073
CSOURCE
VOUT2
SWITCH OUTPUT
5V
300mA
VOUT1
VCC
RESET/EN
I/O
µC
SGND
CRESET
ILIM
MAX15011
IN
OUT_SW
FB_LDO
OUT_LDO
RESET
CT PGNDSGND
CIN
5V TO 40V INPUT
EN_LDOLDO ON/OFF
EN_SWSWITCH ON/OFF
COUT_SW
RPU
COUT_LDO
HOLDHOLD
SWITCH OUTPUT
5V
300mA VCC
RESET/EN
I/O
µC
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Typical Operating Circuits
PART LDO SWITCHED
OUTPUT
OVP
CONTROLLER
MAX15009 √ √ √
MAX15011 √ √ —
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
32 TQFN T3255+4 21-0140 90-0012
MAX15011
TQFN
(5mm x 5mm)
+
TOP VIEW
29
30
28
27
12
11
13
N.C.
N.C.
SGND
PGND
RESET
14
N.C.
OC_DELAY
OUT_LDO
IN
ILIM
IN
N.C.
1 2
OUT_SW
4 5 6 7
2324 22 20 19 18
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C. OUT_LDO
3
21
31 10
N.C. N.C.
32 9
N.C. CT
OUT_SW
26 15 FB_LDO
*EP
*EP = EXPOSED PAD
N.C.
25 16 EN_LDO
N.C. EN_SW
8
17
HOLD
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Pin Congurations (continued) Selector Guide
Chip Information
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
0 8/07 Initial release —
1 1/08 Removed future product asterisks, updated Electrical Characteristics table and
Typical Operating Characteristics section. 1, 2, 6, 8
2 11/14 No /V OPN in Ordering Information; removed automotive references and deleted
Load-Dump section 1, 14, 15
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
MAX15009/MAX15011 300mA LDO Regulators with
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© 2014 Maxim Integrated Products, Inc.
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Revision History
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
