LMH0024
LMH0024 3.3V SMPTE 259M / 344M Adaptive Cable Equalizer
Literature Number: SNLS210F
LMH0024
May 16, 2011
3.3V SMPTE 259M / 344M Adaptive Cable Equalizer
General Description
The LMH0024 SMPTE 259M / 344M adaptive cable equalizer
is a monolithic integrated circuit for equalizing data transmit-
ted over cable (or any media with similar dispersive loss
characteristics). The equalizer operates over a wide range of
data rates from 125 Mbps to 540 Mbps and supports SMPTE
259M and SMPTE 344M.
The LMH0024 implements DC restoration to correctly handle
pathological data conditions. DC restoration can be bypassed
for low data rate applications. The equalizer is flexible in al-
lowing either single-ended or differential input drive.
Additional features include a mute pin which can be used to
manually mute the output and a cable length indicator which
determines the amount of cable being equalized.
Features
SMPTE 259M and SMPTE 344M compliant
Supports DVB-ASI at 270 Mbps
Data rates: 125 Mbps to 540 Mbps
Equalizes up to 350 meters of Belden 1694A at 270 Mbps
Manual bypass, cable length indicator, and output mute
Single-ended or differential input
50Ω differential outputs
Single 3.3V supply operation
Industrial temperature range: −40°C to +85°C
198 mW typical power consumption with 3.3V supply
Footprint compatible with the LMH0034 and the GS9064
Applications
SMPTE 259M and SMPTE 344M serial digital interfaces
Serial digital data equalization and reception
Data recovery equalization
Typical Application
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© 2011 National Semiconductor Corporation 201725 www.national.com
LMH0024 3.3V SMPTE 259M / 344M Adaptive Cable Equalizer
Absolute Maximum Ratings (Note 1)
Supply Voltage −0.5V to 3.6V
Input Voltage (all inputs) −0.3V to VCC+0.3V
Storage Temperature Range −65°C to +150°C
Junction Temperature +150°C
Lead Temperature
(Soldering 4 Sec) +260°C
Package Thermal Resistance
 θJA 16-pin SOIC
 θJC 16-pin SOIC
+115°C/W
+105°C/W
ESD Rating (HBM) 8 kV
ESD Rating (MM) 250V
Recommended Operating
Conditions
Supply Voltage (VCC – VEE) 3.3V ±5%
Input Coupling Capacitance 1.0 µF
AEC Capacitor (Connected between
AEC+ and AEC-) 1.0 µF
Operating Free Air Temperature (TA) −40°C to +85°C
DC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 2, Note 3).
Symbol Parameter Conditions Reference Min Typ Max Units
VCMIN Input Common Mode Voltage SDI, SDI 1.9 V
VSDI Input Voltage Swing At LMH0024 input, (Note 4,
Note 6)720 800 950 mVP−P
VCMOUT Output Common Mode Voltage SDO, SDO VCC
VSDO/2 V
VSDO Output Voltage Swing 50Ω load, differential 750 mVP-P
CLI DC Voltage 0m cable, (Note 7) CLI 2.5 V
Max cable, (Note 7) 2.0 V
MUTE Input Voltage Min to mute outputs MUTE 3.0 V
Max to force outputs active 2.0 V
ICC Supply Current (Note 8) 60 77 mA
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LMH0024
AC Electrical Characteristics
Over Supply Voltage and Operating Temperature ranges, unless otherwise specified (Note 3).
Symbol Parameter Conditions Reference Min Typ Max Units
BRMIN Minimum Input Data Rate SDI, SDI 125 Mbps
BRMAX Maximum Input Data Rate 540 Mbps
Maximum Equalized Cable
Length (with equalizer
pathological)
270 Mbps, Belden 1694A,
0.2UI output jitter, (Note 4)
350 m
270 Mbps, Belden 8281,
0.2UI output jitter, (Note 4) 280 m
540 Mbps, Belden 1694A,
0.2UI output jitter, (Note 4) 250 m
540 Mbps, Belden 8281,
0.2UI output jitter, (Note 4) 180 m
tr,tfOutput Rise Time, Fall Time 20% – 80%, (Note 4) SDO, SDO 100 220 ps
Mismatch in Rise/Fall Time (Note 4) 2 15 ps
tOS Output Overshoot (Note 4) 1 5 %
ROUT Output Resistance single-ended, (Note 5) 50
RLIN Input Return Loss (Note 9) SDI, SDI 15 18-20 dB
RIN Input Resistance single-ended 1.3 k
CIN Input Capacitance single-ended, (Note 5) 1 pF
Note 1: "Absolute Maximum Ratings" are those parameter values beyond which the life and operation of the device cannot be guaranteed. The stating herein of
these maximums shall not be construed to imply that the device can or should be operated at or beyond these values. The table of "Electrical Characteristics"
specifies acceptable device operating conditions.
Note 2: Current flow into device pins is defined as positive. Current flow out of device pins is defined as negative. All voltages are stated referenced to VEE = 0
Volts.
Note 3: Typical values are stated for VCC = +3.3V and TA = +25°C.
Note 4: Specification is guaranteed by characterization.
Note 5: Specification is guaranteed by design.
Note 6: The maximum input voltage swing assumes a nonstressing, DC-balance signal; specifically, the SMPTE-recommended color bar test signal. Pathological
or other stressing signals may not be used. This specification is for 0m cable only.
Note 7: Input signal must be present for valid CLI. Refer to Figure 1 for typical results.
Note 8: Supply current depends on the amount of cable being equalized. The current is highest for short cable and decreases as the cable length is increased.
Refer to Figure 2.
Note 9: Input return loss is dependent on board design. The LMH0024 meets this specification on the SD024 evaluation board from 5MHz to 1.5GHz.
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LMH0024
Connection Diagram
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16-Pin SOIC
Order Number LMH0024MA
See NS Package Number M16A
Pin Descriptions
Pin # Name Description
1 CLI Cable length indicator. Provides a voltage inversely proportional to the cable length being
equalized.
2 VCC Positive power supply (+3.3V).
3 VEE Negative power supply (ground).
4 SDI Serial data true input.
5 SDI Serial data complement input.
6 VEE Negative power supply (ground).
7 AEC+ AEC loop filter external capacitor (1µF) positive connection.
8 AEC- AEC loop filter external capacitor (1µF) negative connection.
9 BYPASS Bypasses equalization and DC restoration when high. No equalization occurs in this mode.
10 NC No connect.
11 VEE Negative power supply (ground).
12 SDO Serial data complement output.
13 SDO Serial data true output.
14 VEE Negative power supply (ground).
15 VCC Positive power supply (+3.3V).
16 MUTE Output mute. To force SDO and SDO to mute, tie to VCC. To disable MUTE, tie to GND. Typical
application is MUTE tied to GND to enable the outputs. MUTE must be tied either high or low; it
may not be left unconnected.
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LMH0024
Block Diagram
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Device Operation
BLOCK DESCRIPTION
The Equalizer Filter block is a multi-stage adaptive filter. If
Bypass is high, the equalizer filter is disabled.
The DC Restoration / Level Control block receives the dif-
ferential signals from the equalizer filter block. This block
incorporates a self-biasing DC restoration circuit to fully DC
restore the signals. If Bypass is high, this function is disabled.
The signals before and after the DC Restoration / Level Con-
trol block are used to generate the Automatic Equalization
Control (AEC) signal. This control signal sets the gain and
bandwidth of the equalizer filter. The loop response in the
AEC block is controlled by an external 1µF capacitor placed
across the AEC+ and AEC- pins. Cable Length Indicator
(CLI) is derived from this block.
The Output Driver produces SDO and SDO. SDO and
SDO may be forced to mute by activating MUTE.
CABLE LENGTH INDICATOR (CLI)
The cable length indicator provides a voltage to indicate the
length of cable being equalized. The CLI voltage decreases
as the cable length increases. Figure 1 shows the typical CLI
voltage vs. Belden 1694A cable length. Note: CLI is only valid
when an input signal is present.
0 50 100 150 200 250 300 350
1.8
1.9
2.0
2.1
2.2
2.3
2.4
2.5
2.6
CLI (V)
BELDEN 1694A CABLE LENGTH (m)
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FIGURE 1. CLI vs. Belden 1694A Cable Length
MUTE
MUTE can be used to manually mute or enable the LMH0024
outputs. MUTE must be tied to a low-level input or ground for
SDO and SDO to be active. Applying a high input to MUTE
will mute the LMH0024 outputs.
INPUT INTERFACING
The LMH0024 accepts either differential or single-ended in-
put. The input must be AC coupled. Transformer coupling is
not supported.
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LMH0024
The LMH0024 correctly handles equalizer pathological sig-
nals for standard definition serial digital video, as described
in SMPTE RP 178.
OUTPUT INTERFACING
The SDO and SDO outputs are internally loaded with 50.
They produce a 750 mVP-P differential output, or a
375 mVP-P single-ended output.
Application Information
PCB LAYOUT RECOMMENDATIONS
Please refer to the following Application Note for the CLC034
on National's website: AN-1372, “LMH0034 PCB Layout
Techniques.” The PCB layout techniques in this application
note apply to the LMH0024 as well.
REPLACING THE GENNUM GS9064
The LMH0024 is footprint compatible with the Gennum
GS9064. Pin 16 (MUTE) of the LMH0024 must be connect to
ground for correct operation.
SUPPLY CURRENT VS. CABLE LENGTH
The supply current (ICC) depends on the amount of cable be-
ing equalized. The current is highest for short cable and
decreases as the cable length is increased. Figure 2 shows
supply current vs. Belden 1694A cable length for 270 Mbps
data.
20172515
FIGURE 2. Supply Current vs. Belden 1694A Cable
Length, 270 Mbps
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LMH0024
Physical Dimensions inches (millimeters) unless otherwise noted
16-Pin SOIC
Order Number LMH0024MA
NS Package Number M16A
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LMH0024
Notes
LMH0024 3.3V SMPTE 259M / 344M Adaptive Cable Equalizer
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