TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Description Features Transcend FlashCP is a CompactFlash Card with * Single Power Supply: 5V 10% or 3.3V 10% Flash Memory assembled on a printed circuit board. * Host Data Bandwidth: 16.6M byte/sec (PIO mode 4) Host Interface: 8/16-bit access Flash Interface: 8-bit access Placement * Endurance: 1,000,000 Program/Erase cycles * MTBF: 1,000,000 hours * Durability of Connector: 10,000 times A Dimensions D B Transcend Information Inc. C 1 Side Millimeters Inches A 36.40 0.150 1.43 0.005 B 42.80 0.100 1.69 0.004 C 3.30 0.100 0.13 0.004 D 0.63 0.070 0.02 0.003 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Block Diagram Pinouts Pin Pin No. Name 01 Pin Identification Pin Pin Symbol Function Pin Pin Pin Pin No. Name No. Name No. Name D0 ~ D15 Data Bus (Bi-directional) VSS 14 A6 27 D11 40 NC A0 ~ A10 Address Bus (Input) 02 D3 15 A5 28 D12 41 RESET /CE1,/CE2 Card Enable (Input) 03 D4 16 A4 29 D13 42 /WAIT /OE, /WE Output / Write Enable (Input) 04 D5 17 A3 30 D14 43 /INPACK /REG Register Select (Input) 05 D6 18 A2 31 D15 44 /REG /IORD, /IOWR I/O Access (Input) 06 D7 19 A1 32 /CE2 45 DASP /IREQ, /IOIS16, 07 /CE1 20 A0 33 VSS 46 PDIAG RESET, CSEL, 08 A10 21 D0 34 /IORD 47 D8 /INPACK, /WAIT, 09 /OE 22 D1 35 /IOWR 48 D9 DASP, PDIAG 10 A9 23 D2 36 /WE 49 D10 VSS Ground 11 A8 24 /IOIS16 37 /IREQ 50 VSS VCC Vcc Power Input 12 A7 25 VSS 38 VCC 13 VCC 26 VSS 39 CSEL Transcend Information Inc. 2 I/O Handshaking (Input/Output) TTS S3322//6644//112288M MFFllaasshhC CP P Transcend Information Inc. Transcend CompactFlash Card 3 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend Information Inc. Transcend CompactFlash Card 4 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend Information Inc. Transcend CompactFlash Card 5 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Interface Specifications Hitachi flash cards are equipped with Hitachi AND-type flash memories, which are controlled by built-in controllers. For the interface between the controller and the host, you can select either PC card ATA or True-IDE specifications. When turning the power on, set the -OE (-ATASEL) pin at level "H" to select the PC card ATA specification or at GND to select the True-IDE specification (see figure 2). Transcend Information Inc. 6 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Figure 2 Interface Specifications Address Space With the PC card ATA specification interface, the memory and I/O address spaces can be seen from the host as shown in figure 3. Writing and reading are controlled by the -OE and -WE signals in the memory address space and by the -IORD and -IOWR signals in the I/O address space. The memory address space is further divided into attribute and common memory areas. The attribute memory area includes a configuration registers used for setting the card operating mode and card information structure (CIS) describing information for recognizing the card type. The common memory area can contain a task file registers for communicating data with the host. Use the -REG signal to switch between the attribute and common memory areas. Set this signal at level "L" to access the attribute memory area or at level "H" for the common memory area. Task file registers can also be assigned to the I/O address space. Whether it is assigned to the I/O address space or the host determines the common memory area. The True-ID specification only has an I/O address space, so no memory address space is available (figure 4). The task file registers are assigned to the I/O address space and the configuration registers and card information structure (CIS) cannot be seen from the host. Transcend Information Inc. 7 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Figure 3 PC card ATA Specification Address Space Transcend Information Inc. 8 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Figure 4 True-IDE Specification Address Space Card Mode Reading from or writing to the host is executed by transmitting ATA commands to the task file register. The data in the data area is also transmitted via the task file register. The host cannot directly communicate data with the card data area. This method is common to both PC card ATA and True-IDE specifications. With the PC card ATA specification, the task file registers are assigned to the common memory area or the I/O address space. The memory card mode refers to the status when it is assigned to the common memory area and the I/O card mode the status when it is assigned to the I/O address space. The I/O card mode is further divided into three mapping modes (contiguous I/O, primary I/O and secondary I/O mapping modes) depending on which address the task file registers are assigned to. True-IDE specification only has I/O address space, to which the task file registers are assigned. This card mode is called the "True-IDE mode", which has only one mapping mode. The following table summarizes the relationship between the above card modes and task file registers assignment. Transcend Information Inc. 9 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Configuration Registers The host is designed to set the PC card operating environment according to its own configuration after the PC card is inserted. Hitachi flash cards have the following four configuration registers. 1) Configuration option register 2) Configuration status register 3) Pin replacement register 4) Socket copy register The sizes of these registers, assigned at even addresses to the attribute memory area, are 1 byte. These addresses are specified by the base address written in TPCC_RADR in CIS and each register is allocated starting from base address "200H" to the next two added addresses (202H, 204H, ...). Figure 5 shows the configuration registers assignment. Figure 5 Configuration Registers Transcend Information Inc. 10 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card The configuration option register has three independent functions. The INDEX function indicated by bit5 to bit0 is explained here. "Configuration" refers to setting the operating environment for such modes as card and mapping. Either mode is selected after the host writes a value in INDEX. The card status corresponding to each INDEX value is described in the configuration entry tuple in CIS. For this purpose, the host needs to read CIS before configuration. Table 2 shows card and mapping modes corresponding to INDEX values. Table 2 Correspondence Between INDEX and Card Mode Figure 6 CIS Configuration and Tuple Format CIS information is required when the host recognizes or configures card. Typical tuples contain: 1) Device information tuple: Describes device speed, type and capacity. 2) Function class ID tuple: Information relating to card manufacturer. 3) Level 1 version/product information tuple: Contains information on manufacturer, etc. 4) Function class ID tuple: Describes card function information. Transcend Information Inc. 11 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card 5) Configuration tuple: Describes the position and contents of the configuration register. 6) Configuration entry tuple: Describes card configuration and its variation. The INDEX value of TPCE_INDEX in the configuration entry tuple corresponds to the value to be written in INDEX of the configuration optional register. The configuration of the card when writing this value is described in the configuration entry tuple. Table 3 shows a typical configuration entry tuple in the memory card mode at a power supply voltage of 5 V. There are other tuples in the memory card mode at a power supply voltage of 3.3 V and in the I/O card mode at a power supply voltage of 5 V or 3.3 V. Task File Registers Data is transferred between the host and the card and the transfer controlled via the task file registers. The task file registers refer to the following series of registers. 1) Data register 2) Error register 3) Feature register 4) Sector count register 5) Sector number register 6) Cylinder low register 7) Cylinder high register 8) Drive head register 9) Status register 10) Alternate status register 11) Command register 12) Device control register 13) Drive address register These registers are divided into five mapping modes ((1) memory mapping, (2) primary I/O mapping, (3) secondary I/O mapping, (4) contiguous I/O mapping and (5) True-IDE mode I/O mapping) according to the address spaces to which these registers are assigned. The mapping mode is selected after the host writes a value in INDEX of the configuration optional register. Each mapping mode is explained below. In the memory mapping mode, the task file registers are assigned to the common memory area (see figure 7 below). As described in CIS (TPCE_FA and TPCE_MS of the configuration entry tuple), the memory window size is set at 2 Kbyte and the card base address at "0H". This window can be mapped to any address in the memory address space of the host. The position of the task file registers is determined by the offset address from the card base address. The 1-Kbyte memory window from offset "400H" to "7FFH" is secured for the host to access the data register during block transfer from memory to memory. Since this 1-Kbyte memory window accesses FIFO, data cannot be accessed randomly. Transcend Information Inc. 12 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Figure 7 Memory Mapping Mode In the primary or secondary I/O mapping mode, the register functions as the I/O card to be accessed via "1F0H" to "1F7H" and "3F6H " to "3F7H" (primary) or "170H " to "177H" and "376H" to "377H" (secondary) in the standard I/O address space. Address signals of A9 to A0 are used for access and A10 neglected. In the contiguous I/O mapping mode, only four address signals of A3 to A0 in the I/O address space are decoded. Thanks to this function, those other than A3 to A0 can be accessed via any address although host operation is required. Table 3 shows task file registers mapping in the I/O card mode. The contiguous I/O mapping mode has the data and error/feature registers as well as the duplicate even data, duplicate odd data and duplicate error/feature registers. The data register can be accessed as 16-bit data combining 8- bit data indicated by an even address and 8-bit data indicated by an odd address. Since the data register overlaps the error/feature register when handled as 16-bit data, registers duplicating them are equipped. Transcend Information Inc. 13 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Table 3 Task File Registers Mapping at I/O Card Mode In the True-IDE mode I/O mapping mode, only three address signals of A2 to A0 in the I/O address space are decoded as shown in table 3.4, and the -CE2 signal is used to select the alternate status/device control or drive address register and the -CE1 to select other task file registers. Transcend Information Inc. 14 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Table 4 Task File Registers Mapping at True-IDE Mode Card Mode Table 5 summarizes card modes. In the memory card mode, the host configures the card using CIS and the configuration registers and communication between the host and the card are conducted by the task file registers mapped in the 2-Kbyte window in the memory address space. In the I/O card mode, configuration is conducted in the same way as in the memory card mode and the task file registers are mapped to the I/O address space. The True-IDE mode does not have configuration function and the task file registers are mapped in the I/O address space selected by address signal A2 to A0, -CE2 and -CE1. Transcend Information Inc. 15 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Table 5 Card Mode Power up Sequence Since hot insertion is supported in the memory or I/O card mode, the card can be inserted after the host power is turned on. In the True-IDE mode, the host power should be turned on after the card is inserted. In either mode, power-on is reset by the reset signal first generated by the reset IC built into the card. During card default processing after the above operation, the ATA select (-OE(-ATASEL)) pin level is detected and interface specification determined (PC card ATA or True-IDE specification). There are three types of the card pin lengths in order to support hot insertion in PC card ATA specification. After inserting the card in the slot, the power source and the ground pin reconnected first and the card detection pins (-CD1 and -CD2) last. Since -CD1 and -CD2 are connected to the ground inside the card, the host can detect card insertion. When the card is set in PC card ATA specification, the host reads CIS from the card. At this time, power source voltage information is supplied to the host by the voltage sense pins (-VS1 and -VS2). In order to indicate that CIS can be read both at 5 V and 3.3 V, -VS1 is connected to the ground inside the card and -VS2 kept open. The host is designed to recognize and configure the card based on the CIS information read. Recognizing the card means determining the type, manufacturer, system resource to be used (I/O address, IRQ signal and memory window) and the kind of card. The host adjusts and assigns the system resource to be used so as not to compete with other devices and sets an appropriate value in the configuration registers (card configuration). The card mode is determined by the value to be set in INDEX of the configuration optional register. In the True-IDE specification, two connections, namely, the master and slave drives, are allowed. The drive is identified using the card select (-CSEL) pin level, followed by default processing. In this way, the True-IDE mode is determined only by the states of the -OE(-ATASEL) and -CSEL pins. Figure 8 shows the timing chart at power-on. Card insertion is detected when the -CD1 and -CD2 pins are turned to level "L", starting power (VCC) supply. If VCC has already been supplied before detected card, there is possibility that mode setting is disabled. In order to set the card mode, the -OE(-ATASEL) pin level has to be set before supplying VCC until resetting is completed. Setting the pin at level "H" sets the memory or I/O card mode and at "GND", the True-IDE mode. In the True-IDE mode, the master and slave drives are identified by the -CSEL pin which is pulled up inside the card. The level of this pin must also be set before supplying VCC until resetting is completed the same as for the -OE(-ATASEL) pin. Setting it at level "L" sets the master drive and opening it sets the slave drive. Transcend Information Inc. 16 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Figure 8 Timing Chart at Power-on Host Configuration The card inserted in the slot is connected to the PCMCIA controller (PCIC). The socket service provides the card service with an interface which is not dependent on PCIC. The card service has host system resource control functions and configures the card. The card service client driver corresponds to the device driver. After configuring the card, the operating system controls the card via this driver. The ATA commands used here are explained in the next section. The operating system provides the application program with general file operating functions. In the True-IDE mode, no software corresponding to the socket and card services is available since there is no card recognition or configuration. The card is also controlled using ATA commands in this mode as in the memory or I/O card mode. Transcend Information Inc. 17 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card ATA Commands The task file registers are used to execute such functions as reading and writing of the Hitachi flash card. A command is executed by setting parameters relating to it in up to six task file registers and command codes in the command register in this order. The modes for setting the card address are the cylinder*head*sector (CHS) and the logical block address (LBA) modes (refer to section 5 for these modes). Set bit6 (LBA) of the drive head register at "0" to select the CHS mode or "1" to select the LBA mode. Read Sector(s) Command Procedure The read sectors(s) command is designed to transfer data of the 1 to 256 sectors set by the sector count register in the sector set by the sector number register from the card to the host. First, set values in the upper and lower bytes of the cylinder number, the sector count and number, and the drive head registers. The feature register needs not to be set since it is not referred to. The host sets "20H" in the command register to request command execution. The card sets the BSY in the status register at "1" after receiving the command. When BSY = 1, internal card processing is executed. After the processing has been completed, BSY turns to 0 and DRDY, DSC and DRQ to 1 to enable data transfer, indicating that access from the host becomes available. In short, the host waits until the status register value turns from "80H" to "58H". After this, the host reads data in the data register 256 times. Each access of word, byte or odd number byte is available for the data register. The status register turns to "50H" after data transfer is completed, waiting for a next command. Write Sector(s) Command Procedure The write sector(s) command is designed to transfer data of the 1 to 256 sectors set by the sector number register in the sector set by the sector count register from the host to the card. First, set values in the upper and lower bytes of the cylinder number, the sector count and number, and the drive head register. The host sets "30H" in the command registers to request command execution. The card sets the BSY in the status register at "1" after receiving the command. After internal processing has been completed, BSY turns to 0 and DRDY, DSC and DRQ to 1 to enable data transfer, indicating that access from the host becomes available. After this, the host writes data in the data register 256 times. Each access of word, byte or odd number byte is available for the data register. Transcend Information Inc. 18 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card Appendixes Typical Questions and Answers (1) What will happen if power break occurs during writing? Although no physical damage is applied to the chip (no chip or sector breakage), a logical error occurs in the corresponding sector, disabling written data. If the failed sector belongs to a file, the file may seem to break. It can be reused after formatting it again. (2) How does the reading or writing procedure differ between the cylinder head sector address (CHS) and logical block address (LBA) mode? Set bit6 of the drive head register (one of the task file registers) at "0" to select the CHS mode or "1" to select the LBA mode. The sector where transfer starts is specified as follows for each mode: (3) Can data be written starting from the middle of a sector? No. Writing is available only in 1-sector units. (4) Data of more than 512 bytes can be written at one time? As many number of sectors as specified by the sector count register can be written when executing the "Write Sector(s)" command. (5) Is a sector required to be erased before writing data? Since executing the "Write Sector(s)" command erases the sector before writing data, no "Erase Sector(s)" command is required before executing the "Write Sector(s)" command. (6) What state will be assumed after writing to the card has been interrupted? The state to wait for data will be assumed until 512-byte data is transferred. (7) How does the "Format Track" ATA command function? Although the "Format Track" command of the hard disk is designed to reformat a track and initialize a data field, that of the Hitachi flash cards is a NOP command and thus conducts no operation. Transcend Information Inc. 19 TTS S3322//6644//112288M MFFllaasshhC CP P Transcend CompactFlash Card (8) What is the difference between the "Read Long Sector" and "Read Sector(s)" ATA commands? 512-byte data is transferred by the "Read Sector(s)" command and 516-byte data by the "Read Long Sector" command. Since the latter command executes ECC in the host, four more bytes of data are transferred. Since the Hitachi flash cards internally execute ECC, however, no "Read Long Sector" command is required. Above technical information is based on industry standard data and tested to be reliable. However, Transcend makes no warranty, either expressed or implied, as to its accuracy and assumes no liability in connection with the use of this product. Transcend reserves the right to make changes in specifications at any time without prior notice. Transcend Information Inc. 20