1
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
True +3.0V to +5.5V RS-232 Transceivers
SP3222EB/3232EB
DESCRIPTION
FEATURES
Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply
250kbps Transmission Rate Under Load
1µA Low-Power Shutdown with Receivers
Active (SP3222EB)
Interoperable with RS-232 down to +2.7V
power source
Enhanced ESD Specifications:
±15kV Human Body Model
±15kV IEC1000-4-2 Air Discharge
±8kV IEC1000-4-2 Contact Discharge
SELECTION TABLE
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The SP3222EB/3232EB series is an RS-232 transceiver solution intended for portable or
hand-held applications such as notebook or palmtop computers. The SP3222EB/3232EB
series has a high-efficiency, charge-pump power supply that requires only 0.1µF capacitors
in 3.3V operation. This charge pump allows the SP3222EB/3232EB series to deliver true RS-
232 performance from a single power supply ranging from +3.0V to +5.5V. The SP3222EB/
3232EB are 2-driver/2-receiver devices. This series is ideal for portable or hand-held
applications such as notebook or palmtop computers. The ESD tolerance of the SP3222EB/
3232EB devices are over ±15kV for both Human Body Model and IEC1000-4-2 Air discharge
test methods. The SP3222EB device has a low-power shutdown mode where the devices'
driver outputs and charge pumps are disabled. During shutdown, the supply current falls to
less than 1µA.
V-
1
2
3
413
14
15
16
5
6
7
12
11
10
C1+
V+
C1-
C2+
C2-
R1IN
R2IN
GND
VCC
T1OUT
T2IN
89
SP3232EB
T1IN
R1OUT
R2OUT
T2OUT
Now Available in Lead Free Packaging
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
2
NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.
NOTE 2: Driver Input hysteresis is typically 250mV.
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional
operation of the device at these ratings or any other
above those indicated in the operation sections of
the specifications below is not implied. Exposure to
absolute maximum rating conditions for extended
periods of time may affect reliability and cause
permanent damage to the device.
VCC ...................................................... -0.3V to +6.0V
V+ (NOTE 1) ...................................... -0.3V to +7.0V
V- (NOTE 1) ....................................... +0.3V to -7.0V
V+ + |V-| (NOTE 1) ........................................... +13V
ICC (DC VCC or GND current) ......................... ±100mA
Input Voltages
TxIN, EN ............................................ -0.3V to +6.0V
RxIN .................................................................. ±25V
Output Voltages
TxOUT ........................................................... ±13.2V
RxOUT ..................................... -0.3V to (VCC + 0.3V)
Short-Circuit Duration
TxOUT .................................................... Continuous
Storage Temperature ...................... -65°C to +150°C
Power Dissipation Per Package
20-pin SSOP (derate 9.25mW/oC above +70oC) ........ 750mW
18-pin PDIP (derate 15.2mW/oC above +70oC) ....... 1220mW
18-pin SOIC (derate 15.7mW/oC above +70oC) ....... 1260mW
20-pin TSSOP (derate 11.1mW/oC above +70oC) ...... 890mW
16-pin SSOP (derate 9.69mW/oC above +70oC) ........ 775mW
16-pin PDIP (derate 14.3mW/oC above +70oC) ....... 1150mW
16-pin Wide SOIC (derate 11.2mW/oC above +70oC) .... 900mW
16-pin TSSOP (derate 10.5mW/oC above +70oC) ...... 850mW
16-pin nSOIC (derate 13.57mW/°C above +70°C) ...... 1086mW
Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX, C1 to
C4=0.1µF
PARAMETER MIN. TYP. MAX. UNITS CONDITIONS
DC CHARACTERISTICS
Supply Current 0.3 1.0 mA no load, TAMB = +25°C, VCC = 3.3V,
TxIN = VCC or GND
Shutdown Supply Current 1.0 10 µASHDN = GND, TAMB = +25°C,
VCC = +3.3V, TxIN = VCC or GND
LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold LOW GND 0.8 V TxIN, EN, SHDN, Note 2
Input Logic Threshold HIGH 2.0 VCC VV
CC = 3.3V, Note 2
2.4 V VCC = 5.0V, Note 2
Input Leakage Current ±0.01 ±1.0 µATxIN, EN, SHDN, TAMB = +25°C,
VIN = 0V to VCC
Output Leakage Current ±0.05 ±10 µAreceivers disabled, VOUT = 0V to VCC
Output Voltage LOW 0.4 V IOUT = 1.6mA
Output Voltage HIGH VCC-0.6 VCC-0.1 V IOUT = -1.0mA
DRIVER OUTPUTS
Output Voltage Swing ±5.0 ±5.4 V 3k load to ground at all driver
outputs, TAMB = +25°C
Output Resistance 300 VCC = V+ = V- = 0V, TOUT = +2V
Output Short-Circuit Current ±35 ±60 mA VOUT = 0V
Output Leakage Current ±25 µAV
OUT = ±12V,VCC= 0V,
or 3.0V to 5.5V, drivers disabled
ELECTRICAL CHARACTERISTICS
3
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
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Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with TAMB = TMIN to TMAX , C1 to
C4=0.1µF. Typical Values apply at VCC = +3.3V or +5.5V and TAMB = 25oC.
ELECTRICAL CHARACTERISTICS
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
4
Figure 1. Transmitter Output Voltage vs Load
Capacitance.
Figure 2. Slew Rate vs Load Capacitance.
Figure 3. Supply Current vs Load Capacitance when
Transmitting Data.
Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 250kbps data rates, all drivers
loaded with 3k, 0.1µF charge pump capacitors, and TAMB = +25°C.
30
25
20
15
10
5
0
0500 1000 2000 3000 4000 5000
Slew rate (V/µs)
Load Capacitance (pF)
- Slew
+ Slew
T1 at 250Kbps
T2 at 15.6Kbps
All TX loaded 3K // CLoad
Figure 4. Supply Current vs Supply Voltage.
6
4
2
0
-2
-4
-6
2.7 3 3.5 4 4.5 5
Supply Voltage (V)
Transmitter Output
Voltage (V)
TxOUT -
TxOUT +
T1 at 250Kbps
T2 at 15.6Kbps
All TX loaded 3K // 1000 pF
Figure 5. Transmitter Output Voltage vs Supply
Voltage.
35
30
25
20
15
10
5
0
Supply Current (mA)
Load Capacitance (pF)
0 1000 2000 3000 4000 5000
250Kbps
125Kbps
20Kbps
T1 at Full Data Rate
T2 at 1/16 Data Rate
All TX loaded 3K // CLoad
6
4
2
0
-2
-4
-6
01000 2000 3000 4000 5000
TxOUT +
TxOUT -
Transmitter Output
Voltage (V)
Load Capacitance (pF)
T1 at 250Kbps
T2 at 15.6Kbps
All TX loaded 3K // CLoad
16
14
12
10
8
6
4
2
0
2.7 3 3.5 4 4.5 5
Supply Current (mA)
Supply Voltage (V)
1 Transmitter at 250Kbps
1 Transmitter at 15.6Kbps
All transmitters loaded with 3K // 1000pf
TYPICAL PERFORMANCE CHARACTERISTICS
5
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
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Table 1. Device Pin Description
PIN DESCRIPTION
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
6
Figure 7. Pinout Configuration for the SP3232EB
Figure 6. Pinout Configurations for the SP3222EB
V-
1
2
3
417
18
19
20
5
6
7
16
15
14
SHDN
C1+
V+
C1-
C2+
C2-
N.C.
EN
R1IN
GND
VCC
T1OUT
N.C.
8
9
10 11
12
13
R2IN
R2OUT
SP3222EB
T2OUT T1IN
T2IN
R1OUT
SSOP/TSSOP
V-
1
2
3
415
16
17
18
5
6
7
14
13
12
SHDN
C1+
V+
C1-
C2+
C2-
EN
R1IN
GND
V
CC
T1OUT
8
910
11
R2IN
SP3222EB
T2OUT T2IN
T1IN
R1OUT
DIP/SO
R2OUT
V-
1
2
3
413
14
15
16
5
6
7
12
11
10
C1+
V+
C1-
C2+
C2-
R1IN
R2IN
GND
VCC
T1OUT
T2IN
89
SP3232EB
T1IN
R1OUT
R2OUT
T2OUT
7
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
Figure 8. SP3222EB Typical Operating Circuits
Figure 9. SP3232EB Typical Operating Circuit
SP3222EB
2
4
6
5
3
7
19
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
13
12
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+*C3
C4
+
+
0.1µF
0.1µF
8
17
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
18
1
5k
R1IN
R1OUT
15
9
5k
R2IN
R2OUT
10
16
LOGIC
OUTPUTS
EN 20
SHDN
*can be returned to
either V
CC
or GND
SSOP
TSSOP
SP3222EB
2
4
6
5
3
7
17
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
12
11
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+*C3
C4
+
+
0.1µF
0.1µF
8
15
RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
16
1
5k
R1IN
R1OUT
13
9
5k
R2IN
R2OUT
10
14
LOGIC
OUTPUTS
EN 18
SHDN
*can be returned to
either V
CC
or GND
DIP/SO
SP3232EB
1
3
5
4
2
6
16
GND
T1IN
T2IN
T1OUT
T2OUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
11
10
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+*C3
C4
+
+
0.1µF
0.1µF
14
7RS-232
OUTPUTS
RS-232
INPUTS
LOGIC
INPUTS
V
CC
15
5k
R1IN
R1OUT
12 13
5k
R2IN
R2OUT
98
LOGIC
OUTPUTS
*can be returned to
either V
CC
or GND
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
8
DESCRIPTION
The SP3222EB/3232EB transceivers meet the
EIA/TIA-232 and V.28/V.24 communication
protocols and can be implemented in battery-
powered, portable, or hand-held applications
such as notebook or palmtop computers. The
SP3222EB/3232EB devices all feature Sipex's
proprietary on-board charge pump circuitry that
generates 2 x VCC for RS-232 voltage levels
from a single +3.0V to +5.5V power supply.
This series is ideal for +3.3V-only systems,
mixed +3.3V to +5.5V systems, or +5.0V-only
systems that require true RS-232 performance.
The SP3222EB/3232EB series have drivers that
operate at a typical data rate of 250kbps fully
loaded.
The SP3222EB and SP3232EB are 2-driver/2-
receiver devices ideal for portable or hand-held
applications. The SP3222EB features a 1µA
shutdown mode that reduces power consump-
tion and extends battery life in portable systems.
Its receivers remain active in shutdown mode,
allowing external devices such as modems to be
monitored using only 1µA supply current.
THEORY OF OPERATION
The SP3222EB/3232EB series are made up of
three basic circuit blocks: 1. Drivers, 2.
Receivers, and 3. the Sipex proprietary charge
pump.
Drivers
The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to ±5.0V
EIA/TIA-232 levels inverted relative to the in-
put logic levels. Typically, the RS-232 output
voltage swing is ±5.5V with no load and at least
±5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. Driver
outputs will meet EIA/TIA-562 levels of ±3.7V
with supply voltages as low as 2.7V.
The drivers can guarantee a data rate of 250kbps
fully loaded with 3K in parallel with 1000pF,
ensuring compatibility with PC-to-PC commu-
nication software.
The slew rate of the driver output is internally
limited to a maximum of 30V/µs in order to
meet the EIA standards (EIA RS-232D 2.1.7,
Paragraph 5). The transition of the loaded
output from HIGH to LOW also meets the
monotonicity requirements of the standard.
Figure 10 shows a loopback test circuit used to
the RS-232 drivers. Figure 11 shows the test
results of the loopback circuit with all drivers
active at 120kbps with RS-232 loads in parallel
with 1000pF capacitors. Figure 12 shows the
test results where one driver was active at
250kbps and all drivers loaded with an RS-232
receiver in parallel with a 1000pF capacitor. A
solid RS-232 data transmission rate of 250kbps
provides compatibility with many designs in
personal computer peripherals and LAN appli-
cations.
The SP3222EB driver's output stages are turned
off (tri-state) when the device is in shutdown
mode. When the power is off, the SP3222EB
device permits the outputs to be driven up to
±12V. The driver's inputs do not have pull-up
resistors. Designers should connect unused in-
puts to VCC or GND.
In the shutdown mode, the supply current falls
to less than 1µA, where SHDN = LOW. When
the SP3222EB device is shut down, the device's
driver outputs are disabled (tri-stated) and the
charge pumps are turned off with V+ pulled
down to VCC and V- pulled to GND. The time
required to exit shutdown is typically 100µs.
Connect SHDN to VCC if the shutdown mode is
not used.
9
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
Figure 11. Driver Loopback Test Results at 120kbps Figure 12. Driver Loopback Test Results at 250 kbps
Figure 10. SP3222EB/3232EB Driver Loopback Test Circuit
SP3222EB
SP3232EB
GND
TxIN TxOUT
C1+
C1-
C2+
C2-
V+
V-
V
CC
0.1µF
0.1µF
0.1µF
+
C2
C5
C1
+
+
C3
C4
+
+
0.1µF
0.1µF
LOGIC
INPUTS
V
CC
5k
RxIN
RxOUT
LOGIC
OUTPUTS
EN* *SHDN
1000pF
V
CC
* SP3222EB only
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
10
Receivers
The receivers convert EIA/TIA-232 levels to
TTL or CMOS logic output levels. The
SP3222EB receivers have an inverting tri-state
output. These receiver outputs (RxOUT) are tri-
stated when the enable control EN = HIGH. In
the shutdown mode, the receivers can be active
or inactive. EN has no effect on TxOUT. The
truth table logic of the SP3222EB driver and
receiver outputs can be found in Table 2.
Since receiver input is usually from a transmis-
sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, a 5k pulldown resistor to ground
will commit the output of the receiver to a HIGH
state.
Charge Pump
The charge pump is a Sipex–patented design
(5,306,954) and uses a unique approach com-
pared to older less–efficient designs. The charge
pump still requires four external capacitors, but
uses a four–phase voltage shifting technique to
attain symmetrical 5.5V power supplies. The
internal power supply consists of a regulated
dual charge pump that provides output voltages
5.5V regardless of the input voltage (VCC) over
the +3.0V to +5.5V range.
In most circumstances, decoupling the power
supply can be achieved adequately using a 0.1µF
bypass capacitor at C5 (refer to Figures 8 and 9 ).
In applications that are sensitive to power-sup-
ply noise, decouple VCC to ground with a capaci-
tor of the same value as charge-pump capacitor
C1. Physically connect bypass capacitors as
close to the IC as possible.
The charge pumps operate in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pumps are enabled. If the output voltage
exceed a magnitude of 5.5V, the charge pumps
are disabled. This oscillator controls the four
phases of the voltage shifting. A description of
each phase follows.
Phase 1
— VSS charge storage — During this phase of
the clock cycle, the positive side of capacitors
C1 and C2 are initially charged to VCC. Cl
+ is
then switched to GND and the charge in C1
is
transferred to C2
. Since C2
+ is connected to
VCC, the voltage potential across capacitor C2
is now 2 times VCC.
Phase 2
— VSS transfer — Phase two of the clock con-
nects the negative terminal of C2 to the VSS
storage capacitor and the positive terminal of C2
to GND. This transfers a negative generated
voltage to C3. This generated voltage is regu-
lated to a minimum voltage of -5.5V. Simulta-
neous with the transfer of the voltage to C3, the
positive side of capacitor C1 is switched to VCC
and the negative side is connected to GND.
Phase 3
— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C2
+ is at VCC, the
voltage potential across C2 is 2 times VCC.
Phase 4
— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor.
Table 2. SP3222EB Truth Table Logic for Shutdown
and Enable Control
NDHSNETUOxTTUOxR
00 etats-irTevitcA
01 etats-irTetats-irT
10 evitcAevitcA
11 evitcAetats-irT
11
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
This voltage is regulated to +5.5V. At this
voltage, the internal oscillator is disabled. Si-
multaneous with the transfer of the voltage to
C4, the positive side of capacitor C1 is switched
to VCC and the negative side is connected to
GND, allowing the charge pump cycle to begin
again. The charge pump cycle will continue as
long as the operational conditions for the inter-
nal oscillator are present.
Since both V+ and V are separately generated
from VCC; in a no–load condition V+ and V will
be symmetrical. Older charge pump approaches
that generate V from V+ will show a decrease in
the magnitude of V compared to V+ due to the
inherent inefficiencies in the design.
The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.
ESD Tolerance
The SP3222EB/3232EB series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electrostatic discharges and associated
transients. The improved ESD tolerance is at
least ±15kV without damage nor latch-up.
There are different methods of ESD testing
applied:
a) MIL-STD-883, Method 3015.7
b) IEC1000-4-2 Air-Discharge
c) IEC1000-4-2 Direct Contact
The Human Body Model has been the generally
accepted ESD testing method for semiconduc-
tors. This method is also specified in MIL-STD-
883, Method 3015.7 for ESD testing. The premise
of this ESD test is to simulate the human body’s
potential to store electrostatic energy and
discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 18. This method
will test the IC’s capability to withstand an
ESD transient during normal handling such as
in manufacturing areas where the ICs tend to
be handled frequently.
The IEC-1000-4-2, formerly IEC801-2, is
generally used for testing ESD on equipment
and systems. For system manufacturers, they
must guarantee a certain amount of ESD
protection since the system itself is exposed to
the outside environment and human presence.
The premise with IEC1000-4-2 is that the
system is required to withstand an amount of
static electricity when ESD is applied to points
and surfaces of the equipment that are
accessible to personnel during normal usage.
The transceiver IC receives most of the ESD
current when the ESD source is applied to the
connector pins. The test circuit for IEC1000-4-2
is shown on Figure 19. There are two methods
within IEC1000-4-2, the Air Discharge method
and the Contact Discharge method.
With the Air Discharge Method, an ESD
voltage is applied to the equipment under
test (EUT) through air. This simulates an
electrically charged person ready to connect a
cable onto the rear of the system only to find
an unpleasant zap just before the person
touches the back panel. The high energy
potential on the person discharges through
an arcing path to the rear panel of the system
before he or she even touches the system. This
energy, whether discharged directly or through
air, is predominantly a function of the discharge
current rather than the discharge voltage.
Variables with an air discharge such as
approach speed of the object carrying the ESD
potential to the system and humidity will tend to
change the discharge current. For example, the
rise time of the discharge current varies with
the approach speed.
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
12
Figure 13. Charge Pump — Phase 1
Figure 14. Charge Pump — Phase 2
Figure 15. Charge Pump Waveforms
Figure 16. Charge Pump — Phase 3
Figure 17. Charge Pump — Phase 4
Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 5.48V
2
1T
T[]
T
+6V
a) C
2+
b) C
2
-
GND
GND
-6V
V
CC
= +5V
–5V –5V
+5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
VCC = +5V
–10V
VSS Storage Capacitor
VDD Storage Capacitor
C1C2
C3
C4
+
+
++
V
CC
= +5V
–5V
+5V
–5V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
V
CC
= +5V
+10V
V
SS
Storage Capacitor
V
DD
Storage Capacitor
C
1
C
2
C
3
C
4
+
+
++
13
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
The Contact Discharge Method applies the ESD
current directly to the EUT. This method was
devised to reduce the unpredictability of the
ESD arc. The discharge current rise time is
constant since the energy is directly transferred
without the air-gap arc. In situations such as
hand held systems, the ESD charge can be
directly discharged to the equipment from a
person already holding the equipment. The
current is transferred on to the keypad or the
serial port of the equipment directly and then
travels through the PCB and finally to the IC.
The circuit models in Figures 18 and 19
represent the typical ESD testing circuits used
for all three methods. The CS is initially charged
with the DC power supply when the first
switch (SW1) is on. Now that the capacitor is
charged, the second switch (SW2) is on while
SW1 switches off. The voltage stored in the
capacitor is then applied through RS, the current
limiting resistor, onto the device under test
(DUT). In ESD tests, the SW2 switch is pulsed
so that the device under test receives a duration
of voltage.
Figure 18. ESD Test Circuit for Human Body Model
Figure 19. ESD Test Circuit for IEC1000-4-2
R
C
C
S
R
S
SW1 SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
R
S
and
R
V
add up to 330 for IEC1000-4-2.
R
S
and
R
V
add up to 330 for IEC1000-4-2.
Contact-Discharge Module
R
V
R
C
C
S
R
S
SW1 SW2
R
C
Device
Under
Test
DC Power
Source
C
S
R
S
SW1 SW2
R
V
Contact-Discharge Module
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
14
Figure 20. ESD Test Waveform for IEC1000-4-2
30A
I
0A
15A
t=30ns
t
t=0ns
Device Pin Human Body IEC1000-4-2
Tested Model Air Discharge Direct Contact Level
Driver Outputs ±15kV ±15kV ±8kV 4
Receiver Inputs ±15kV ±15kV ±8kV 4
Table 3. Transceiver ESD Tolerance Levels
For the Human Body Model, the current
limiting resistor (RS) and the source capacitor
(CS) are 1.5k an 100pF, respectively. For
IEC-1000-4-2, the current limiting resistor (RS)
and the source capacitor (CS) are 330 an
150pF, respectively.
The higher CS value and lower RS value in the
IEC1000-4-2 model are more stringent than the
Human Body Model. The larger storage capacitor
injects a higher voltage to the test point when SW2
is switched on. The lower current limiting resistor
increases the current charge onto the test point.
15
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
D
EH
PACKAGE: PLASTIC SHRINK
SMALL OUTLINE
(SSOP)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
20–PIN
A
A1
Ø
L
Be
A
A1
B
D
E
e
H
L
Ø
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.278/0.289
(7.07/7.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0°/8°
(0°/8°)
16–PIN
0.068/0.078
(1.73/1.99)
0.002/0.008
(0.05/0.21)
0.010/0.015
(0.25/0.38)
0.239/0.249
(6.07/6.33)
0.205/0.212
(5.20/5.38)
0.0256 BSC
(0.65 BSC)
0.301/0.311
(7.65/7.90)
0.022/0.037
(0.55/0.95)
0°/8°
(0°/8°)
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
16
D
ALTERNATE
END PINS
(BOTH ENDS)
D1 = 0.005" min.
(0.127 min.)
E
PACKAGE: PLASTIC
DUAL–IN–LINE
(NARROW)
A = 0.210" max.
(5.334 max).
E1
C
Ø
L
A2
A1 = 0.015" min.
(0.381min.)
B
B1
e = 0.100 BSC
(2.540 BSC)
e
A
= 0.300 BSC
(7.620 BSC)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A2
B
B1
C
D
E
E1
L
Ø
16–PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.780/0.800
(19.812/20.320)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
18–PIN
0.115/0.195
(2.921/4.953)
0.014/0.022
(0.356/0.559)
0.045/0.070
(1.143/1.778)
0.008/0.014
(0.203/0.356)
0.880/0.920
(22.352/23.368)
0.300/0.325
(7.620/8.255)
0.240/0.280
(6.096/7.112)
0.115/0.150
(2.921/3.810)
0°/ 15°
(0°/15°)
17
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
D
EH
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(WIDE)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
A
A1
Ø
L
Be
A
A1
B
D
E
e
H
L
Ø
16–PIN
0.090/0.104
(2.29/2.649)
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.398/0.413
(10.10/10.49)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0°/8°
(0°/8°)
18–PIN
0.090/0.104
(2.29/2.649))
0.004/0.012
(0.102/0.300)
0.013/0.020
(0.330/0.508)
0.447/0.463
(11.35/11.74)
0.291/0.299
(7.402/7.600)
0.050 BSC
(1.270 BSC)
0.394/0.419
(10.00/10.64)
0.016/0.050
(0.406/1.270)
0°/8°
(0°/8°)
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
18
AA2
A1
SIDE VIEW
Seating Plane
SYMBOL MIN NOM MAX
A 2.35 - 2.65
A1 0.1 - 0.3
A2 2.05 - 2.55
b 0.31 - 0.51
c 0.2 - 0.33
D
E
E1
e
L 0.4 - 1.27
L1
L2
ø0º-8º
ø1 - 15º
Note: Dimensions in (mm)
1.27 BSC
1.04 REF
0.25 BSC
16 Pin SOIC JEDEC MS-013 (AA) Variation
10.30 BSC
10.30 DSC
7.50 BSC
L1
L
Ø
Ø1
Ø1
Seating Plane
Gauge Plane
L2
VIEW C
TOP VIEW
e
E
E/2
E1
b
INDEX AREA
(D/2 X E1/2)
E1/2
D
123
B
B
SEE VIEW C
c
WITH PLATING
BASE METAL
b
SECTION B-B
19
Date: 02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
Seating Plane
A2 A
A1
b
SEE DETAIL “A”
B
B
Seaing Plane
L1
L
Ø1
DETAIL A
Ø2
Ø3
C
b
Section B-B
E1 E
D
INDEX AREA
D
2x2
E1
12
e
SYMBOL MIN NOM MAX
A--1.2
A1 0.05 - 0.15
A2 0.8 1 1.05
b 0.19 - 0.3
c 0.09 - 0.2
D 4.9 5 5.1
E
E1 4.3 4.4 4.5
e
Ø1
ø2
ø3
L 0.45 0.6 0.75
L1
Note: Dimensions in (mm)
16 Pin TSSOP JEDEC MO-153 (AB)
Variation
6.40 BSC
0.65 BSC
12º REF
12º REF
1.00 REF
Date:02/25/05 SP3222EB/3232EB True +3.0 to +5.5V RS-232 Transceivers © Copyright 2005 Sipex Corporation
20
Part Number Temperature Range Package Type
SP3222EBCA .......................................... 0˚C to +70˚C.......................................... 20-Pin SSOP
SP3222EBCA/TR ..................................... 0˚C to +70˚C.......................................... 20-Pin SSOP
SP3222EBCP .......................................... 0˚C to +70˚C............................................ 18-Pin PDIP
SP3222EBCT ........................................... 0˚C to +70˚C........................................ 18-Pin WSOIC
SP3222EBCT/TR ..................................... 0˚C to +70˚C........................................ 18-Pin WSOIC
SP3222EBCY .......................................... 0˚C to +70˚C........................................ 20-Pin TSSOP
SP3222EBCY/TR ..................................... 0˚C to +70˚C........................................ 20-Pin TSSOP
SP3222EBEA .......................................... -40˚C to +85˚C........................................ 20-Pin SSOP
SP3222EBEA/TR .................................... -40˚C to +85˚C........................................ 20-Pin SSOP
SP3222EBEP .......................................... -40˚C to +85˚C.......................................... 18-Pin PDIP
SP3222EBET .......................................... -40˚C to +85˚C...................................... 18-Pin WSOIC
SP3222EBET/TR .................................... -40˚C to +85˚C...................................... 18-Pin WSOIC
SP3222EBEY .......................................... -40˚C to +85˚C...................................... 20-Pin TSSOP
SP3222EBEY/TR .................................... -40˚C to +85˚C...................................... 20-Pin TSSOP
SP3232EBCA .......................................... 0˚C to +70˚C.......................................... 16-Pin SSOP
SP3232EBCA/TR ..................................... 0˚C to +70˚C.......................................... 16-Pin SSOP
SP3232EBCP .......................................... 0˚C to +70˚C............................................ 16-Pin PDIP
SP3232EBCT ........................................... 0˚C to +70˚C........................................ 16-Pin WSOIC
SP3232EBCT/TR ..................................... 0˚C to +70˚C........................................ 16-Pin WSOIC
SP3232EBCN .......................................... 0˚C to +70˚C......................................... 16-Pin nSOIC
SP3232EBCN/TR .................................... 0˚C to +70˚C......................................... 16-Pin nSOIC
SP3232EBCY .......................................... 0˚C to +70˚C........................................ 16-Pin TSSOP
SP3232EBCY/TR ..................................... 0˚C to +70˚C........................................ 16-Pin TSSOP
SP3232EBEA .......................................... -40˚C to +85˚C........................................ 16-Pin SSOP
SP3232EBEA/TR .................................... -40˚C to +85˚C........................................ 16-Pin SSOP
SP3232EBEP .......................................... -40˚C to +85˚C.......................................... 16-Pin PDIP
SP3232EBET .......................................... -40˚C to +85˚C...................................... 16-Pin WSOIC
SP3232EBET .......................................... -40˚C to +85˚C...................................... 16-Pin WSOIC
SP3232EBEN ......................................... -40˚C to +85˚C....................................... 16-Pin nSOIC
SP3232EBEN/TR .................................... -40˚C to +85˚C....................................... 16-Pin nSOIC
SP3232EBEY .......................................... -40˚C to +85˚C...................................... 16-Pin TSSOP
SP3232EBEY/TR .................................... -40˚C to +85˚C...................................... 16-Pin TSSOP
Corporation
ANALOG EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Headquarters and
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
ORDERING INFORMATION
/TR = Tape and Reel
Pack quantity is 1,500 for WSOIC, SSOP or TSSOP and 2,500 for NSOIC.
Available in lead free packaging. To order add "-L" suffix to part number.
Example: SP3232EBEN/TR = standard; SP3232EBEN-L/TR = lead free
CLICK HERE TO ORDER SAMPLES