TL7702B, TL7705B, TL7733B SUPPLY-VOLTAGE SUPERVISORS SLVS037L - SEPTEMBER 1989 - REVISED MAY 2002 D D D D D D D Power-On Reset Generator Automatic Reset Generation After Voltage Drop RESET Output Defined From VCC 1 V Precision Voltage Sensor Temperature-Compensated Voltage Reference True and Complement Reset Outputs Externally Adjustable Pulse Duration TL77xxBC . . . D OR P PACKAGE TL7705BM . . . JG PACKAGE TL7705BQ . . . D PACKAGE (TOP VIEW) REF RESIN CT GND 1 8 2 7 3 6 4 5 VCC SENSE RESET RESET TL7705BM . . . U PACKAGE (TOP VIEW) description An external capacitor (typically 0.1 F) must be connected to REF to reduce the influence of fast transients in the supply voltage. NC REF RESIN CT GND 1 10 2 9 3 8 4 7 5 6 NC VCC SENSE RESET RESET NC - No internal connection NC REF NC VCC NC TL7705BM . . . FK PACKAGE (TOP VIEW) NC RESIN NC CT NC 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 NC SENSE NC RESET NC NC GND NC RESET NC The TL7702B, TL7705B, and TL7733B are integrated-circuit supply-voltage supervisors designed for use as reset controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active (low) when VCC attains a value approaching 1 V. As VCC approaches 3 V (assuming that SENSE is above VT+), the delay timer function activates a time delay, after which outputs RESET and RESET go inactive (high and low, respectively). When an undervoltage condition occurs during normal operation, outputs RESET and RESET go active. To ensure that a complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input exceeds the positive-going threshold value. The time delay is determined by the value of the external capacitor CT: td 2.6 x 104 x CT, where CT is in farads (F) and td is in seconds (s). NC - No internal connection The TL7702BC, TL7705BC, and TL7733BC are characterized for operation from 0C to 70C. The TL7702BI, TL7705BI, and TL7733BI are characterized for operation from -40C to 85C. The TL7705BQ is characterized for operation from -40C to 125C. The TL7705BM is characterized for operation from -55C to 125C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2002, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 1 TL7702B, TL7705B, TL7733B SUPPLY-VOLTAGE SUPERVISORS SLVS037L - SEPTEMBER 1989 - REVISED MAY 2002 AVAILABLE OPTIONS PACKAGED DEVICES TA 0C to 70C -40C to 85C SMALL OUTLINE (D) CHIP CARRIER (FK) CERAMIC DIP (JG) PLASTIC DIP (P) CERAMIC FLATPACK (U) TL7702BCD -- -- TL7702BCP -- TL7705BCD -- -- TL7705BCP -- TL7733BCD -- -- TL7733BCP -- TL7702BID -- -- TL7702BIP -- TL7705BID -- -- TL7705BIP -- TL7733BID -- -- TL7733BIP -- -40C to 125C TL7705BQD -- -- -- -- -55C to 125C -- TL7705BMFK TL7705BMJG -- TL7705BMU The D package is available taped and reeled. Add the suffix R to device type (e.g., TL7702BCDR). functional block diagram The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming network to adjust the reference voltage and sense-comparator trip point. VCC 8 Reference Voltage 1 CT 70 A 6 3 7 Vx SENSE Reference Voltage 2 5 RESET RESET R1 (see Note A) R2 (see Note A) 2 RESIN 1 4 GND Pin numbers shown are for the D, JG, and P packages. NOTE A: TL7702B: R1 = 0 , R2 = open, Vx = VREF1 TL7705B: R1 = 23 k, R2 = 10 k, nominal, Vx 1.43 V TL7733B: R1 = 11.3 k, R2 = 10 k, nominal, Vx 1.43 V 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 REF TL7702B, TL7705B, TL7733B SUPPLY-VOLTAGE SUPERVISORS SLVS037L - SEPTEMBER 1989 - REVISED MAY 2002 typical timing diagram VCC and SENSE VIT+ VIT- VIT- VIT+ Vres Vres 0 RESET IIII IIII td td IIIII IIIII IIIII Output Undefined Output Undefined 0 absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V Input voltage range, VI: RESIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 20 V SENSE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to 20 V High-level output current, IOH (RESET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -30 mA Low-level output current, IOL (RESET) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA Package thermal impedance, JA (see Notes 2 and 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97C/W P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85C/W Case temperature for 60 seconds, TC: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260C Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG or U packages . . . . . . . . . . . . . . 300C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P packages . . . . . . . . . . . . . . . . 260C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to the network ground terminal. 2. Maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) - TA)/JA. Operating at the absolute maximum TJ of 150C can affect reliability. 3. The package thermal impedance is calculated in accordance with JESD 51-7. recommended operating conditions MIN MAX UNIT VCC VIH Supply voltage 3.6 18 V High-level input voltage RESIN 2 18 V VIL VI Low-level input voltage RESIN 0 0.8 V Input voltage SENSE 0 18 V IOH IOL High-level output current RESET 20 mA Low-level output current RESET 20 mA TA Operating O erating free-air tem temperature erature range POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 TL77xxBC -0 70 TL77xxBI -40 85 TL7705BQ -40 125 TL7705BM -55 125 C 3 TL7702B, TL7705B, TL7733B SUPPLY-VOLTAGE SUPERVISORS SLVS037L - SEPTEMBER 1989 - REVISED MAY 2002 electrical characteristics over recommended operating conditions (unless otherwise noted) TL77xxBC TL77xxBI TL7705BQ TEST CONDITIONS PARAMETER MIN VOH VOL High-level output voltage, RESET Low-level output voltage, RESET IOH = -16 mA IOL = 16 mA Vref Reference voltage, REF Iref = 500 A, TA = 25C V 2.53 2.58 2.53 2.555 4.5 4.55 4.6 TL7733B 3.03 3.08 3.13 TL7702B 2.48 2.53 2.58 4.45 4.55 4.65 3 3.08 3.16 TA = 25C TA = full range g TL7733B TL7702B Vhys y Hysteresis, H t i SENSE (VIT+ - VIT- IT ) Vres Power-up reset voltage II Input current IOH IOL High-level output current, RESET ICC V 2.48 TL7705B TL7705B RESIN TL7702B Low-level output current, RESET Supply current V 10 VCC = 3.6 V to 18 V, TA = 25C IOL at RESET = 2 mA, TA = 25C mV 30 TL7733B SENSE V 0.4 2.505 TL7705B VIT IT- MAX VCC-1.5 TL7702B Negative-going input threshold voltage input at SENSE in ut TYP UNIT 10 1 VI = 0.4 V to VCC VI = Vref to 18 V -10 -0.1 -2 V A VO = 18 V, VO = 0 V, See Figure 1 50 A See Figure 1 -50 A VSENSE = 15 V, RESIN 2 V 1.8 3 3.5 VCC = 18 V, TA = full range All electrical characteristics are measured with 0.1-F capacitors connected at REF, CT, and VCC to GND. Full range is 0C to 70C for the C-suffix devices, -40C to 85C for the I-suffix devices, and -40C to 125C for the Q-suffix device. This is the lowest voltage at which RESET becomes active. mA switching characteristics, VCC = 5 V, CT open, TA = 25C PARAMETER FROM ((INPUT)) TO (OUTPUT) ( ) TEST CONDITIONS TL77xxBC TL77xxBI TL7705BQ MIN 4 tPLH Propagation delay time from low- to high-level output RESIN RESET tPHL Propagation delay time from high- to low-level output RESIN RESET tw Effective pulse duration tr tf Rise time tr tf Rise time Fall time Fall time RESIN TYP MAX See Figures 1, 2, and 3 270 500 ns See Figures 1, 2, and 3 270 500 ns See Figure 2 SENSE RESET See Figures 1 and 3 RESET See Figures 1 and 3 POST OFFICE BOX 655303 UNIT * DALLAS, TEXAS 75265 150 ns 100 75 150 200 75 150 50 ns ns TL7702B, TL7705B, TL7733B SUPPLY-VOLTAGE SUPERVISORS SLVS037L - SEPTEMBER 1989 - REVISED MAY 2002 electrical characteristics over recommended operating conditions (unless otherwise noted) VOH VOL High-level output voltage, RESET Low-level output voltage, RESET IOH = -16 mA IOL = 16 mA Vref Reference voltage, REF Iref = 500 A, TL7702B VIT IT- Negative-going input threshold voltage input at SENSE in ut TL7705B TL7702B TA = 25C TA = 25C 55C to 125C TA = -55C Hysteresis, y , SENSE (VIT+ - VIT-) Vres Power-up reset voltage II Input current IOH IOL High-level output current, RESET VI = Vref to VCC - 1.5 V VO = 18 V Low-level output current, RESET VO = 0 TL7705B RESIN Supply current TL7702B TYP MAX VCC-1.5 Vh hys ICC MIN TL7702B TL7705B SENSE TL7705BM TEST CONDITIONS PARAMETER VCC = 3 3.6 6 V to 18 V, V TA = 25C IOL at RESET = 2 mA, VI = 0.4 V to VCC TA = 25C V 0.4 V V 2.48 2.53 2.58 2.505 2.53 2.555 4.5 4.55 4.6 2.48 2.53 2.58 4.45 4.55 4.65 10 1 -10 -0.1 1.8 -2 V A 50 A -50 A 3 4 VCC = 18 V, TA = -55C to 125C All electrical characteristics are measured with 0.1-F capacitors connected at REF, CT, and VCC to GND. This is the lowest value at which RESET becomes active. V mV 30 RESIN 2 V VSENSE = 15 V, UNIT mA switching characteristics, VCC = 5 V, CT open, TA = 25C PARAMETER FROM (INPUT) TO (OUTPUT) TEST CONDITIONS TL7705BM MIN TYP MAX UNIT tPLH Propagation delay time from low- to high-level output RESIN RESET See Figures 1, 2, and 3 270 500* ns tPHL Propagation delay time from high- to low-level output RESIN RESET See Figures 1, 2, and 3 270 500* ns tw Effective pulse duration tr tf Rise time tr tf Rise time Fall time Fall time RESIN See Figure 2 SENSE RESET See Figures 1 and 3 RESET See Figures 1 and 3 150 ns 100 75* 150 200* 75 150* 50* ns ns * On products compliant to MIL-PRF-38535, these parameters are not production tested. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 TL7702B, TL7705B, TL7733B SUPPLY-VOLTAGE SUPERVISORS SLVS037L - SEPTEMBER 1989 - REVISED MAY 2002 PARAMETER MEASUREMENT INFORMATION 5V 5V VCC RL (see Note A) DUT RESET DUT 15 pF (see Note B) RESET RL (see Note A) GND 15 pF (see Note B) RESET OUTPUT CONFIGURATION RESET OUTPUT CONFIGURATION NOTES: A. For IOL and IOH, RL = 10 k. For all switching characteristics, RL = 511 . B. This figure includes jig and probe capacitance. Figure 1. RESET and RESET Output Configurations tw tw VT + 2 V VT 5V 2.5 V 0V VT - 2 V RESIN SENSE WAVEFORMS Figure 2. Input Pulse Definition Voltage Fault VIT+ SENSE VIT+ VIT- 0V VIH RESIN Undefined 2V 0.8 V tf tr VIL tPLH 90% 90% RESET 90% 50% 10% tf td td I I td 90% 50% RESET 10% 10% tr 10% tPHL Figure 3. Voltage Waveforms 6 VOH POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 10% V OL TL7702B, TL7705B, TL7733B SUPPLY-VOLTAGE SUPERVISORS SLVS037L - SEPTEMBER 1989 - REVISED MAY 2002 TYPICAL CHARACTERISTICS DEASSERTION TIME vs LOAD RESISTANCE ASSERTION TIME vs LOAD RESISTANCE 700 20 VCC = 5 V CT = 0.1 F CL = 10 pF TA = 25C 600 t - Deassertion Time - ns t - Assertion Time - ns 18 16 RESET tr 14 12 10 8 6 2 4 500 RESET tf 400 300 RESET tf 200 RESET tr 6 8 0 10 0 2 RL - Load Resistance - k 4 8 10 Figure 5 ASSERTION TIME vs LOAD CAPACITANCE DEASSERTION TIME vs LOAD CAPACITANCE 36 2.1 VCC = 5 V CT = 0.1 F RL = 4.7 k TA = 25C VCC = 5 V CT = 0.1 F RL = 4.7 k TA = 25C 1.9 t - Deassertion Time - s t - Assertion Time - ns 6 RL - Load Resistance - k Figure 4 30 RESET tr 100 RESET tf 0 VCC = 5 V CT = 0.1 F CL = 10 pF TA = 25C 24 RESET tr 18 RESET tf 1.7 1.5 1.3 1.1 RESET tf and RESET tr 0.9 0.7 12 0.5 6 0.3 0 25 50 75 100 125 150 175 200 0 25 50 75 100 125 150 175 200 CL - Load Capacitance - pF CL - Load Capacitance - pF Figure 6 Figure 7 For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted plateauing in either output waveform during switching. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 TL7702B, TL7705B, TL7733B SUPPLY-VOLTAGE SUPERVISORS SLVS037L - SEPTEMBER 1989 - REVISED MAY 2002 APPLICATION INFORMATION VS System Supply 8 7 VCC SENSE RESET 10 k 5 To System RESET 2 Reset Input (from system) RESIN 1 REF RT 3 6 CT (see text) 0.1 F To System RESET RESET GND CT 4 10 k Figure 8. System Reset Controller With Undervoltage Sensing When the TL770xB SENSE terminal is used to monitor VCC, a current-limiting resistor in series with CT is recommended. During normal operation, the timing capacitor is charged by the onboard current source to approximately VCC or an internal voltage clamp (7.1-V zener), whichever is less. When the circuit is then subjected to an undervoltage condition during which VCC is rapidly slewed down, the voltage on CT exceeds that on VCC. This forward biases a secondary path internally, which falsely activates the outputs. A fault is indicated when VCC drops below V(CT), not when VSENSE falls below VT-. Texas Instruments performs a 100% electrical screen to verify that the outputs do not switch with 1 mA forced into the CT terminal. Adding the external resistor, RT, prevents false triggering. Its value is calculated as follows: V (CT) *V * T RT Where: V(CT) = VCC or 7.1 V, whichever is less VT- = 4.55 V (nom) RT = value of series resistor required For VCC = 5 V: 5 * 4.55 t 1 mA R T Therefore, RT u 450 W Using a 20%-tolerance resistor, RT should be greater than 560 . Adding this series resistor changes the duration of the reset pulse by no more than 10%. RT extends the discharge of CT, but also skews the V(CT) threshold. These effects tend to cancel one another. The precise percentage change can be derived theoretically, but the equation is complicated by this interaction and is dependent upon the duration of the supply-voltage fault condition. Both outputs of the TL770xB should be terminated with similar value resistors, even when only one is being used. This prevents unwanted plateauing in either output waveform during switching, which may be interpreted as an undefined state or delay system reset. 8 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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