TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037L – SEPTEMBER 1989 – REVISED MAY 2002
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Power-On Reset Generator
D
Automatic Reset Generation After
Voltage Drop
D
RESET Output Defined From VCC ≥ 1 V
D
Precision Voltage Sensor
D
Temperature-Compensated Voltage
Reference
D
True and Complement Reset Outputs
D
Externally Adjustable Pulse Duration
description
The TL7702B, TL7705B, and TL7733B are
integrated-circuit supply-voltage supervisors
designed for use as reset controllers in
microcomputer and microprocessor systems. The
supply-voltage supervisor monitors the supply for
undervoltage conditions at the SENSE input.
During power up, the RESET output becomes
active (low) when VCC attains a value
approaching 1 V. As VCC approaches 3 V
(assuming that SENSE is above VT+), the delay
timer function activates a time delay, after which
outputs RESET and RESET go inactive (high and
low, respectively). When an undervoltage
condition occurs during normal operation, outputs
RESET and RESET go active. To ensure that a
complete reset occurs, the reset outputs remain
active for a time delay after the voltage at the
SENSE input exceeds the positive-going
threshold value. The time delay is determined by
the value of the external capacitor CT:
td ≈ 2.6 × 104 × CT, where CT is in farads (F) and
td is in seconds (s).
An external capacitor (typically 0.1 µF) must be
connected to REF to reduce the influence of fast
transients in the supply voltage.
The TL7702BC, TL7705BC, and TL7733BC are characterized for operation from 0°C to 70°C. The TL7702BI,
TL7705BI, and TL7733BI are characterized for operation from –40°C to 85°C. The TL7705BQ is characterized
for operation from –40°C to 125°C. The TL7705BM is characterized for operation from –55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2002, Texas Instruments Incorporated
3212019
910111213
4
5
6
7
8
18
17
16
15
14
NC
SENSE
NC
RESET
NC
NC
RESIN
NC
CT
NC
TL7705BM ...FK PACKAGE
(TOP VIEW)
NC
REF
NC
RESET
NC V
NC
NC
GND
NC
CC
1
2
3
4
8
7
6
5
REF
RESIN
CT
GND
VCC
SENSE
RESET
RESET
TL77xxBC ...D OR P PACKAGE
TL7705BM . . . JG PACKAGE
TL7705BQ ...D PACKAGE
(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
NC
REF
RESIN
CT
GND
NC
VCC
SENSE
RESET
RESET
TL7705BM ...U PACKAGE
(TOP VIEW)
NC – No internal connection
NC – No internal connection
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037L – SEPTEMBER 1989 – REVISED MAY 2002
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICES
TASMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
CERAMIC
FLATPACK
(U)
TL7702BCD — — TL7702BCP —
0°C to 70°CTL7705BCD — — TL7705BCP —
TL7733BCD — — TL7733BCP —
TL7702BID — — TL7702BIP —
–40°C to 85°CTL7705BID — — TL7705BIP —
TL7733BID — — TL7733BIP —
–40°C to 125°C TL7705BQD — — — —
–55°C to 125°C—TL7705BMFK TL7705BMJG —TL7705BMU
The D package is available taped and reeled. Add the suffix R to device type (e.g., TL7702BCDR).
functional block diagram
The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.
RESIN
≈70 µA
R1
(see Note A)
R2
(see Note A)
Reference
Voltage 1
SENSE
GND
VCC
CT
RESET
RESET
REF
8
3
7
2
4
6
5
1
Pin numbers shown are for the D, JG, and P packages.
NOTE A: TL7702B: R1 = 0 Ω, R2 = open, Vx = VREF1
TL7705B: R1 = 23 kΩ, R2 = 10 kΩ, nominal, Vx ≈1.43 V
TL7733B: R1 = 11.3 kΩ, R2 = 10 kΩ, nominal, Vx ≈1.43 V
Reference
Voltage 2
Vx
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037L – SEPTEMBER 1989 – REVISED MAY 2002
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
typical timing diagram
VIT–
RESET
Vres
0
td
0
VCC and
SENSE
td
VIT– VIT+
VIT+
Vres
ÎÎÎÎÎ
ÎÎÎÎÎ
ÎÎÎÎÎ
Output
Undefined
ÎÎÎÎ
ÎÎÎÎ
Output
Undefined
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI: RESIN –0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SENSE –0.3 V to 20 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
High-level output current, IOH (RESET) –30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Low-level output current, IOL (RESET) 30 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Notes 2 and 3): D package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
P package 85°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds, TC: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: JG or U packages 300°C. . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P packages 260°C. . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN MAX UNIT
VCC Supply voltage 3.6 18 V
VIH High-level input voltage RESIN 2 18 V
VIL Low-level input voltage RESIN 0 0.8 V
VIInput voltage SENSE 0 18 V
IOH High-level output current RESET 20 mA
IOL Low-level output current RESET 20 mA
TL77xxBC –0 70
TA
O
p
erating free-air tem
p
erature range
TL77xxBI –40 85 °
C
TA
O erating
free
-
air
tem erature
range
TL7705BQ –40 125
°C
TL7705BM –55 125
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037L – SEPTEMBER 1989 – REVISED MAY 2002
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS
†
TL77xxBC
TL77xxBI
TL7705BQ UNIT
MIN TYP MAX
VOH High-level output voltage, RESET IOH = –16 mA VCC–1.5 V
VOL Low-level output voltage, RESET IOL = 16 mA 0.4 V
Vref Reference voltage, REF Iref = 500 µA, TA = 25°C 2.48 2.53 2.58 V
TL7702B 2.505 2.53 2.555
TL7705B TA = 25°C4.5 4.55 4.6
VIT
Negative-going
in
p
ut threshold voltage
TL7733B 3.03 3.08 3.13
V
V
IT–
i
npu
t
th
res
h
o
ld
vo
lt
age
a
t
S
EN
S
E inp
u
tTL7702B
‡
2.48 2.53 2.58
V
at
SENSE
in ut
TL7705B TA = full range
‡
4.45 4.55 4.65
TL7733B
Ag
3 3.08 3.16
H t i SENSE
TL7702B 10
Vh
y
sHysteresis, SENSE
(VIT+
–
VIT )
TL7705B VCC = 3.6 V to 18 V, TA = 25°C30 mV
y
(VIT
+ –
VIT
–
)
TL7733B 10
Vres§Power-up reset voltage IOL at RESET = 2 mA, TA = 25°C 1 V
II
In
p
ut current
RESIN VI = 0.4 V to VCC –10
µA
I
I
Input
current
SENSE TL7702B VI = Vref to 18 V –0.1 –2µ
A
IOH High-level output current, RESET VO = 18 V, See Figure 1 50 µA
IOL Low-level output current, RESET VO = 0 V, See Figure 1 –50 µA
ICC
pp
VSENSE = 15 V, RESIN ≥ 2 V 1.8 3
mA
I
CC
VCC = 18 V, TA = full range‡3.5
mA
†All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND.
‡Full range is 0°C to 70°C for the C-suffix devices, –40°C to 85°C for the I-suffix devices, and –40°C to 125°C for the Q-suffix device.
§This is the lowest voltage at which RESET becomes active.
switching characteristics, VCC = 5 V, CT open, TA = 25°C
PARAMETER FROM
(INPUT) TO
(OUTPUT) TEST CONDITIONS
TL77xxBC
TL77xxBI
TL7705BQ UNIT
()
()
MIN TYP MAX
tPLH Propagation delay time from
low- to high-level output RESIN RESET See Figures 1, 2, and 3 270 500 ns
tPHL Propagation delay time from
high- to low-level output RESIN RESET See Figures 1, 2, and 3 270 500 ns
t
Effective
p
ulse duration
RESIN
See Figure 2
150
ns
t
w
Effective
pulse
duration
SENSE
See
Figure
2
100
ns
trRise time
RESET
See Figures 1 and 3
75
ns
tfFall time
RESET
See
Figures
1
and
3
150 200
ns
trRise time
RESET
See Figures 1 and 3
75 150
ns
tfFall time
RESET
See
Figures
1
and
3
50
ns
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037L – SEPTEMBER 1989 – REVISED MAY 2002
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
TEST CONDITIONS†
TL7705BM
UNIT
PARAMETER
TEST
CONDITIONS†
MIN TYP MAX
UNIT
VOH High-level output voltage, RESET IOH = –16 mA VCC–1.5 V
VOL Low-level output voltage, RESET IOL = 16 mA 0.4 V
Vref Reference voltage, REF Iref = 500 µA, TA = 25°C 2.48 2.53 2.58 V
TL7702B
TA=25°C
2.505 2.53 2.555
VIT
Negative-going
in
p
ut threshold voltage
TL7705B
T
A =
25°C
4.5 4.55 4.6
V
V
IT–
i
npu
t
th
res
h
o
ld
vo
lt
age
a
t
S
EN
S
E inp
u
tTL7702B
T 55°Cto125°C
2.48 2.53 2.58
V
at
SENSE
in ut
TL7705B
T
A = –
55°C
t
o
125°C
4.45 4.55 4.65
Vh
H
y
steresis, SENSE TL7702B
VCC =36Vto18V
TA=25°C
10
mV
V
hys
y,
(VIT+ – VIT–)TL7705B
V
CC =
3
.
6
V
to
18
V
,
T
A =
25°C
30
mV
Vres‡Power-up reset voltage IOL at RESET = 2 mA, TA = 25°C1 V
II
In
p
ut current
RESIN VI = 0.4 V to VCC –10
µA
I
I
Input
current
SENSE TL7702B VI = Vref to VCC – 1.5 V –0.1 –2µ
A
IOH High-level output current, RESET VO = 18 V 50 µA
IOL Low-level output current, RESET VO = 0 –50 µA
ICC
Su
pp
ly current
VSENSE = 15 V, RESIN ≥ 2 V 1.8 3
mA
I
CC
Supply
current
VCC = 18 V, TA = –55°C to 125°C4
mA
†All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and VCC to GND.
‡This is the lowest value at which RESET becomes active.
switching characteristics, VCC = 5 V, CT open, TA = 25°C
PARAMETER
FROM TO
TEST CONDITIONS
TL7705BM
UNIT
PARAMETER
(INPUT) (OUTPUT)
TEST
CONDITIONS
MIN TYP MAX
UNIT
tPLH Propagation delay time from
low- to high-level output RESIN RESET See Figures 1, 2, and 3 270 500* ns
tPHL Propagation delay time from
high- to low-level output RESIN RESET See Figures 1, 2, and 3 270 500* ns
t
Effective
p
ulse duration
RESIN
See Figure 2
150
ns
t
w
Effective
pulse
duration
SENSE
See
Figure
2
100
ns
trRise time
RESET
See Figures 1 and 3
75*
ns
tfFall time
RESET
See
Figures
1
and
3
150 200*
ns
trRise time
RESET
See Figures 1 and 3
75 150*
ns
tfFall time
RESET
See
Figures
1
and
3
50*
ns
* On products compliant to MIL-PRF-38535, these parameters are not production tested.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037L – SEPTEMBER 1989 – REVISED MAY 2002
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
15 pF
(see Note B)
RESET
DUT
GND
5 V
RL
(see Note A)
RESET OUTPUT CONFIGURATION
VCC
5 V
DUT
RESET
RESET OUTPUT CONFIGURATION
NOTES: A. For IOL and IOH, RL = 10 kΩ. For all switching characteristics, RL = 511 Ω.
B. This figure includes jig and probe capacitance.
RL
(see Note A) 15 pF
(see Note B)
Figure 1. RESET and RESET Output Configurations
tw5 V
2.5 V
0 V
RESIN SENSE
VT + 2 V
WAVEFORMS
VT – 2 V
VT
tw
Figure 2. Input Pulse Definition
10%
VIT+ VIT–VIT+
0 V
VIH
VIL
2 V
0.8 V
tPLH
50%
50%
10%10%
90%
10%
td
SENSE
Undefined
RESET
Voltage
Fault
tftr
90%
tftd
tr
RESIN
RESET
Î
Î
td
tPHL
10%
90% 90% VOH
VOL
Figure 3. Voltage Waveforms
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037L – SEPTEMBER 1989 – REVISED MAY 2002
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS†
Figure 4
14
10
8
6024 6810
t – Assertion Time – ns
18
20
ASSERTION TIME
vs
LOAD RESISTANCE
16
12
RL – Load Resistance – kΩ
VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C
RESET tr
RESET tf
Figure 5
400
200
100
0024 6810
t – Deassertion Time – ns
600
700
DEASSERTION TIME
vs
LOAD RESISTANCE
500
300
RL – Load Resistance – kΩ
VCC = 5 V
CT = 0.1 µF
CL = 10 pF
TA = 25°C
RESET tf
RESET tr
RESET tr
RESET tf
Figure 6
24
18
12
60 25 50 75 100 125
t – Assertion Time – ns
30
36
ASSERTION TIME
vs
LOAD CAPACITANCE
150 175 200
VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ
TA = 25°C
RESET tr
RESET tf
CL – Load Capacitance – pF
Figure 7
0.9
0.7
0.5
0.30 25 50 75 100 125
t – Deassertion Time –
1.1
1.3
DEASSERTION TIME
vs
LOAD CAPACITANCE
150 175 200
1.7
1.5
1.9
2.1 VCC = 5 V
CT = 0.1 µF
RL = 4.7 kΩ
TA = 25°C
RESET tf and RESET tr
CL – Load Capacitance – pF
µs
†For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted
plateauing in either output waveform during switching.
TL7702B, TL7705B, TL7733B
SUPPLY-VOLTAGE SUPERVISORS
SLVS037L – SEPTEMBER 1989 – REVISED MAY 2002
8POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
VS
10 kΩ
0.1 µF
SENSE
RESIN
GND
REF
RESET
RESET
VCC
CT
To System
RESET
RT
CT
System Supply
Reset Input
(from system)
To System
RESET
(see text)
7
2
1
3
5
6
8
410 kΩ
Figure 8. System Reset Controller With Undervoltage Sensing
When the TL770xB SENSE terminal is used to monitor VCC, a current-limiting resistor in series with CT is
recommended. During normal operation, the timing capacitor is charged by the onboard current source to
approximately VCC or an internal voltage clamp (≈7.1-V zener), whichever is less. When the circuit is then subjected
to an undervoltage condition during which VCC is rapidly slewed down, the voltage on CT exceeds that on VCC. This
forward biases a secondary path internally, which falsely activates the outputs. A fault is indicated when VCC drops
below V(CT), not when VSENSE falls below VT–.
Texas Instruments performs a 100% electrical screen to verify that the outputs do not switch with 1 mA forced into
the CT terminal. Adding the external resistor, RT, prevents false triggering. Its value is calculated as follows:
V(CT)
*
VT
*
RT
Where:
V(CT) = VCC or 7.1 V, whichever is less
VT–= 4.55 V (nom)
RT= value of series resistor required
For VCC = 5 V:
5
*
4.55
RT
t
1mA
Therefore,
RT
u
450
W
Using a 20%-tolerance resistor, RT should be greater than 560 Ω.
Adding this series resistor changes the duration of the reset pulse by no more than 10%. R T extends the discharge
of CT, but also skews the V(CT) threshold. These effects tend to cancel one another . The precise percentage change
can be derived theoretically, but the equation is complicated by this interaction and is dependent upon the duration
of the supply-voltage fault condition.
Both outputs of the TL770xB should be terminated with similar value resistors, even when only one is being used.
This prevents unwanted plateauing in either output waveform during switching, which may be interpreted as an
undefined state or delay system reset.
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accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty . Except where mandated by government requirements, testing of all
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Copyright 2002, Texas Instruments Incorporated