Rev.6.00 Apr 19, 2006 page 1 of 6
RJK0302DPB
Silicon N Channel Power MOS FET
Power Switching REJ03G1340-0600
Rev.6.00
Apr 19, 2006
Features
• High speed switching
• Capable of 4.5 V gate drive
• Low drive current
• High densit y mounting
• Low on-resistance
RDS(on) = 2.6 mΩ typ. (at VGS = 10 V)
Outline
RENESAS Package code: PTZZ0005DA-A
(Package name: LFPAK)
G
D
SSS
4
123
5
1, 2, 3 Source
4 Gate
5 Drain
1234
5
Absolute Maximum Ratings
(Ta = 25°C)
Item Symbol Ratings Unit
Drain to source voltage VDSS 30 V
Gate to source voltage VGSS +16/-12 V
Drain current ID 50 A
Drain peak current ID(pulse)Note1 200 A
Body-drain diode reverse drain current IDR 50 A
Avalanche current IAP Note 2 20 A
Avalanche energy EAR Note 2 40 mJ
Channel dissipation Pch Note3 60 W
Channel to Case Thermal Resistance θch-C 2.09 °C/W
Channel temperature Tch 150 °C
Storage temperature Tstg –55 to +150 °C
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at Tch = 25°C, Rg ≥ 50 Ω
3. Tc = 25°C
RJK0302DPB
Rev.6.00 Apr 19, 2006 page 2 of 6
Electrical Characteristics
(Ta = 25°C)
Item Symbol Min Typ Max Unit Test Conditions
Drain to source breakdown voltage V(BR)DSS 30 — — V ID = 10 mA, VGS = 0
Gate to source leak current IGSS — — ± 0.1 µA VGS = +16/–12 V, VDS = 0
Zero gate voltage drain current IDSS — — 1 µA VDS = 30 V, VGS = 0
Gate to source cutoff voltage VGS(off) 1.2 — 2.5 V VDS = 10 V, ID = 1 mA
RDS(on) — 2.6 3.1 mΩ I
D = 25 A, VGS = 10 V Note4
Static drain to source on state
resistance RDS(on) — 3.5 4.6 mΩ I
D = 25 A, VGS = 4.5 V Note4
Forward transfer admittance |yfs| — 95 — S ID = 25 A, VDS = 10 V Note4
Input capacitance Ciss — 4200 — pF
Output capacitance Coss — 1380 — pF
Reverse transfer capacitance Crss — 210 — pF
VDS = 10 V, VGS = 0,
f = 1 MHz
Gate Resistance Rg — 0.7 — Ω
Total gate charge Qg — 28 — nC
Gate to source charge Qgs — 12 — nC
Gate to drain charge Qgd — 6.0 — nC
VDD = 10 V, VGS = 4.5 V,
ID = 50 A
Turn-on delay time td(on) — 11 — ns
Rise time t r — 4.0 — ns
Turn-off delay time td(off) — 54 — ns
Fall time tf — 5.5 — ns
VGS = 10 V, ID = 25 A,
VDD ≅ 10 V,RL = 0.4 Ω,
Rg = 4.7 Ω
Body–drain diode forward voltage VDF — 0.84 1.10 V IF = 50 A, VGS = 0 Note4
Body–drain diode reverse recovery
time trr — 40 — ns
IF = 50 A, VGS = 0
diF/ dt = 100 A/ µs
Notes: 4. Pulse test
RJK0302DPB
Rev.6.00 Apr 19, 2006 page 3 of 6
Main Characteristics
Drain to Source Voltage V
DS
(V)
Drain Current I
D
(A)
Typical Output Characteristics
Drain Current I
D
(A) Drain Current I
D
(A)
Channel Dissipation Pch (W)
Case Temperature Tc (°C)
Power vs. Temperature Derating
Gate to Source Voltage V
GS
(V)
Drain to Source Saturation Voltage
V
DS (on)
(mV)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Gate to Source Voltage V
GS
(V)
Typical Transfer Characteristics
Drain to Source Voltage V
DS
(V)
Maximum Safe Operation Area
Drain Current I
D
(A)
Static Drain to Source on State Resistance
vs. Drain Current
100
80
60
40
20
0246810
100
80
60
40
20
012 34 5
Tc = 75°C
25°C
–25°C
80
60
40
20
050 100 150 200
V
DS
= 10 V
Pulse Test
V
GS
= 2.5 V
Pulse Test
10
3
1
30 3001 10 100 1000
3
200
150
100
50
04 8 12 16 20
Pulse Test
I
D
= 20 A
10 A
100
30
V
GS
= 4.5 V
10 V
2.7 V
2.9 V
10 V
3.1 V
4.5 V
Pulse Test
0.1 1 10 100
1
0
1
00
1000
1
0.1
µ
µ
µ
s
s
O
p
eration in
limited by R
DS(on)
Tc = 25°C
1 shot Pulse
5 A
Drain to Source on State Resistance
R
DS (on)
(mΩ)
RJK0302DPB
Rev.6.00 Apr 19, 2006 page 4 of 6
Case Temperature Tc (
°
C)
Static Drain to Source on State Resistance
vs. Temperature
Capacitance C (pF)
Drain to Source Voltage VDS (V)
Typical Capacitance vs.
Drain to Source Voltage
Gate Charge Qg (nc)
Drain to Source Voltage VDS (V)
Gate to Source Voltage VGS (V)
Dynamic Input Characteristics
010 30
20
10000
3000
1000
300
100
30
10
VGS = 0
f = 1 MHz
50
40
30
20
10
0
20
16
12
8
4
20 40 60 80 100
00
Crss
Coss
Ciss
ID = 50 A
VGS
VDS
VDD = 25 V
10 V
VDD = 25 V
10 V
10
8
6
4
2
–25 0 25 50 75 100 125 150
0
ID = 5 A, 10 A, 20 A
VGS = 4.5 V
10 V
Pulse Test
5 A, 10 A, 20 A
Static Drain to Source on State Resistance
RDS (on) (mΩ)
Source to Drain Voltage VSD (V)
Reverse Drain Current IDR (A)
Reverse Drain Current vs.
Source to Drain Voltage
Channel Temperature Tch (°C)
Repetitive Avalanche Energy EAR (mJ)
Maximum Avalanche Energy vs.
Channel Temperature Derating
50
40
30
20
10
25 50 75 100 125 150
0
100
80
60
40
20
00.4 0.8 1.2 1.6 2.0
Pulse Test
5 V
VGS = 0, –5 V
10 V
IAP = 20 A
VDD = 15 V
duty < 0.1 %
Rg ≥ 50 Ω
RJK0302DPB
Rev.6.00 Apr 19, 2006 page 5 of 6
D. U. T
Rg
I
AP
Monitor
V
DS
Monitor
V
DD
50 Ω
Vin
15 V
0
I
D
V
DS
I
AP
V
(BR)DSS
L
V
DD
E
AR
= L • I
AP2
•
2
1V
DSS
V
DSS
– V
DD
Avalanche Test Circuit Avalanche Waveform
Pulse Width PW (s)
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance γs (t)
Vin Monitor
D.U.T.
Vin
10 V
R
L
V
DS
= 10 V
tr
td(on)
Vin
90% 90%
10%
10%
Vout
td(off)
Vout
Monitor 90%
10%
tf
Switching Time Test Circuit Switching Time Waveform
Rg
3
1
0.3
0.1
0.03
0.01
1 m 10 m 100 m 1 10
D = 1
0.5
0.2
0.1
0.05
0.02
0.01
1shot pulse
10 µ100 µ
Tc = 25°C
P
DM
PW
T
D = PW
T
θch – c (t) = γ s (t) • θch – c
θch – c = 2.09°C/W, Tc = 25°C
RJK0302DPB
Rev.6.00 Apr 19, 2006 page 6 of 6
Package Dimensions
0.25
M
1.3 Max
1.0
3.95
1.1 Max
4.9
5.3 Max
4.0 ± 0.2
14
5
4.2
3.3
0° – 8°
0.07
+0.03
–0.04
0.20
+0.05
–0.03
0.6
+0.25
–0.20
0.25
+0.05
–0.03
6.1
+0.1
–0.3
Previous Code
PTZZ0005DA-A LFPAKV
MASS[Typ.]
0.080gSC-100
RENESAS CodeJEITA Package Code
1.27
0.40 ± 0.06
0.75 Max
0.10
(Ni/Pd/Au plating)
Unit: mm
Package Name
LFPAK
Ordering Information
Part Name Quantity Shipping Container
RJK0302DPB-00-J0 2500 pcs Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
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