International Rectifier PD-9.754 IRFPO64 HEXFET Power MOSFET Dynamic dv/dt Rating Repetitive Avalanche Rated @ Ultra-Low On-Resistance e Very Low Thermal Resistance @ Isolated Central Mounting Hole 175C Operating Temperature Fast Switching Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low Rps(on) = 0.0092 Ip = 70*A on-resistance and cost-effectiveness. The TO-247 package is preferred for commercial-industrial applications where higher power levels preclude the use of TO-220 devices. The TO-247 is similar but superior to the earlier TO-218 package because of its isolated mounting hole. It also provides greater creepage distance between pins to meet the requirements of most safety specifications. \ TO-247AC Absolute Maximum Ratings Parameter Max. Units Ip @ To = 25C Continuous Drain Current, Vas @ 10 V 70* Ip @ Tc= 100C | Continuous Drain Current, Vas @ 10 V 70* A lom Pulsed Drain Current 520 Pp @ Tc = 25C _| Power Dissipation 300 Ww Linear Derating Factor 2.0 WC Vas Gate-to-Source Voltage +20 Vv Eas Single Pulse Avalanche Energy @ 1000 mJ lAR Avalanche Current 70 A Ear Repetitive Avalanche Energy 30 mJ | dv/at Peak Diode Recovery dv/dt_ @ 45 Vins Ty Operating Junction and -55 to +175 Tsta Storage Temperature Range C Soldering Temperature, for 10 seconds 300 (1.6mm from case) L Mounting Torque, 6-32 or M3 screw 10 Ibfein (1.1 Nem) Thermal Resistance Parameter Min. Typ. Max. Units Resc Junction-to-Case _ 0.50 Recs Case-to-Sink, Flat, Greased Surface _ 0.24 _ oCiW Raa dunction-to-Ambient | = 40 935IRFP064 Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. ; Max. | Units Test Conditions Vieryoss Drain-to-Source Breakdown Voltage 60 _ V_ | Vag=0V, Ip= 250A AV erypss/ATy| Breakdown Voltage Temp. Coefficient |0.048| | VIC | Reference to 25C, Ip= 1mA Rosvon) Static Drain-to-Source On-Resistance _ |0.009) QQ | Vas=10V, Ilp=78A @ Vasith) Gate Threshold Voltage 2.0 _ 4.0 V__ | Vos=Ves, In= 250A Ofs Forward Transconductance 38 _ = S| Vos=25V, lp=78A Ipss Drain-to-Source Leakage Current = = 25 LA Vos=60V, Ves=-0V _ _ 250 Vps=48V, Vas=0V, Ty=150C less Gate-to-Source Forward Leakage _ _ 100 nA Vas=20V Gate-to-Source Reverse Leakage _ | -100 Vas=-20V Qg Total Gate Charge _ | 190 Ip=130A Qgs Gate-to-Source Charge = _ 55 nC | Vos=48V Qga Gate-to-Drain ("Miller) Charge _ _ 90 Ves=10V See Fig. 6 and 13 taon) Turn-On Delay Time _ 21 _ Vpp=30V t Rise Time _ 190 _ ns [p=130A ta(otty Turn-Off Delay Time _ 110 Re=4.3Q t Fall Time _ 190 _ Rp=0.22Q See Figure 10 Lp Internal Drain Inductance _ 5.0 _ Bom oon i nH | from package if: ) Ls Internal Source Inductance _ 13 _ and center of die contact 8 Ciss Input Capacitance | 7400; Veg=0V Coss Output Capacitance | 3200} pF | Vps= 25V Crss Reverse Transfer Capacitance _ 540 f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 70" MOSFET symbol D (Body Diode) A showing the Ism Pulsed Source Current _ | 520 integral reverse & (Body Diode) p-n junction diode. 8 Vsp Diode Forward Voltage = _ 3.0 Vs | Ty#25C, Is=130A, Ves=0V tr Reverse Recovery Time _ 160 | 250 | ns | Ty=25C, Ir=130A On Reverse Recovery Charge | 090] 1.7 | pC j|di/dt=100A/us ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: @ Repetitive rating; pulse width limited by @ Igps130A, di/dts300A/us, Vpp<ViBR)Dss, max. junction temperature (See Figure 11) Tys<175C Vop=25V, starting Tj=25C, L=69H @ Pulse width < 300 us; duty cycle <2%. Re=25Q, las=130A (See Figure 12) * Current limited by the package, (Die Current =130A) 936IRFP064 Ip, Drain Current (Amps) {p, Drain Current (Amps) @ a E = 5 102 5 Oo Cc g a 6 20us PULSE WIDTH 20us PULSE WIDTH ' To = 25C ' To = 175C on 100 to! eo 40 to! Vos, Drain-to-Source Voltage (volts) Vos, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Fig 2. Typical Output Characteristics, To=25C To=175C 2.5 2.0 in (Normalized) Vpg = 25V 20us PULSE WIOTH 8 10 Rpsjon), Drain-to-Source On Resistance V6S = 10V 404 0.0 4 ~60 -40 -20 0 20 40 60 80 100 120 140 160 180 Ves, Gate-to-Source Voltage (volts) Ty, Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resisance Vs. Temperature 937IRFP064 14000 Gs = OV, fF = IMaz Cgg + Cgq. Cys SHORTED b 3 S S 2000 Chgs ~ 2 12000 Cga 3 Cas + = & x 10000 8 i = a $ 8000 oO e e g 3 S g 5000 8 = oO 2 w Oo a > SEE FIGURE 13 950 101 % 50 100 150 200 250 Vos, Drain-to-Source Voltage (volts) Qe, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage 4104 OPERATION IN THIS AREA LIMITED Q 5 BY Ros (ON) E _ = g Cc @ < 10 3 ~ oO 58 = = oO 3 4 Oo 2 @ 5 % x 108 a B As g L a T 2 a TJ=175C Ves = OV SINGLE 0.5 1.5 2.5 3.6 4.5 Oo 2 6 1 2 5 40 2 5 402 2 SH 493 Vsp, Source-to-Drain Voltage (volts) Vos, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 938Ip, Drain Current (Amps) IRFP064 Vos WA D.U.T. 1 X ="Vop IMITED 8Y PACKAGE \Tiov 4 Pulse Width < 1ps Duty Factor < 0.1% t 8 Fig 10a. Switching Time Test Circuit os TN [T"N [- 90% 40 | | | | 20 I | | | | | 10% + 0 I \ j\ T 25 50 75 100 125 150 175 Ves | \ Tc, Case Temperature (C) tajon) tr tao) tt Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature Oo ~_ Co N @ 0-4 a Cc Qo Qa a a o 10 SINGLE PULSE - (THERMAL RESPONSE) I F mo pte ta, NOTES: 4. DUTY FACTOR, O=t4i/t2 . 2. PEAK Ty=Pom x Zthjc + Te 10 to 10-4 107 10? 0.4 4 10 ty, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case 939IRFP064 Vary tp to obtain Vps > required las Tp TOP 853A g2A BOTTOM 130A Eas. Single Pulse Energy (mJ) = 25V Vos 0 25 50 75 100 125 150 175 Starting Ty, Junction Temperature(C) lag ee Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator Charge -+ Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing See page 1511 Appendix C: Part Marking information See page 1517 International Rectifier 940