FEATURES
DGAIN OF 0.2 TO INTERFACE ±10V SIGNALS
TO SINGLE-SUPPLY ADCs
DGAIN ACCURACY: ±0.024% (max)
DWIDE BANDWIDTH: 1.5MHz
DHIGH SLEW RATE: 15V/µs
DLOW OFFSET VOLTAGE: ±100µV
DLOW OFFSET DRIFT: ±1.5µV/°C
DSINGLE-SUPPLY OPERATION DOWN TO 1.8V
APPLICATIONS
DINDUSTRIAL PROCESS CONTROLS
DINSTRUMENTATION
DDIFFERENTIAL TO SINGLE-ENDED
CONVERSION
DAUDIO LINE RECEIVERS
DESCRIPTION
The INA159 is a high slew rate, G = 1/5 difference amplifier
consisting of a precision op amp with a precision resistor
network. The gain of 1/5 makes the INA159 useful to
couple ±10V signals to single-supply analog-to-digital
converters (ADCs), particularly those operating on a single
+5V supply. The on-chip resistors are laser-trimmed for
accurate gain and high common-mode rejection. Excellent
temperature coefficient of resistance (TCR) tracking of the
resistors maintains gain accuracy and common-mode
rejection over temperature. The input common-mode
voltage range extends beyond the positive and negative
supply rails. It operates on a total of +1.8V to +5.5V single
or split supplies. The INA159 reference input uses two
resistors for easy mid-supply or reference biasing.
The difference amplifier is the foundation of many
commonly-used circuits. The INA159 provides this circuit
function without using an expensive external precision
resistor network. The INA159 is available in an MSOP-8
surface-mount package and is specified for operation over
the extended industrial temperature range, −40°C to
+125°C.
20kΩ
100kΩ
40kΩ
100kΩ
40kΩ
R1
100ΩADS8325
ADC
DOUT
DCLOCK
CS
REF
VREF
5V
+IN
−IN
V+
V+
GND
C1
1000pF
SENSE
REF 2
REF 1
VIN
+IN
−IN
INA159
Figure 1. Typical Application
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters.
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
Precision, Gain of 0.2 Level Translation
DIFFERENCE AMPLIFIER
www.ti.com
Copyright 2005, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
2
ABSOLUTE MAXIMUM RATINGS(1)
Supply Voltage +5.5V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Signal Input Terminals (−IN and +IN), Voltage ±30V. . . . . . . . . . . . .
Reference (REF 1 and REF2) and Sense Pins
Current ±10mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage (V−) − 0.5V to (V+) + 0.5V. . . . . . . . . . . . . . . . . . . . . . . .
Output Short Circuit Continuous. . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature −40°C to +150°C. . . . . . . . . . . . . . . . . . . . .
Storage Temperature −65°C to +150°C. . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature +150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Rating
Human Body Model 4000V. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charged Device Model 1000V. . . . . . . . . . . . . . . . . . . . . . . . . . .
(1) Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not supported.
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ORDERING INFORMATION(1)
PRODUCT PACKAGE-LEAD
PACKAGE
DESIGNATOR
PACKAGE
MARKING
INA159 MSOP-8 DGK CJB
(1) For the most current package and ordering information, see the
Package Option Addendum at the end of this document, or see
the TI web site at www.ti.com.
PIN CONFIGURATIONS
REF 1
−IN
+IN
V−
REF 2
V+
OUT
SENSE
1
2
3
4
8
7
6
5
INA159
TOP VIEW MSOP
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
3
ELECTRICAL CHARACTERISTICS: VS = +5V
Boldface limits apply over the specified temperature range, TA = −40°C to +125°C.
At TA = +25°C, RL = 10kΩ connected to VS/2, REF pin 1 connected to ground, and REF pin 2 connected to VREF = 5V, unless otherwise noted.
INA159
PARAMETER CONDITIONS MIN TYP MAX UNIT
OFFSET VOLTAGE(1) RTO
Initial (1) VOS VS = ±2.5V, Reference and Input Pins Grounded ±100 ±500 µV
vs Temperature ±1.5 µV/°C
vs Power Supply PSRR VS = ±0.9V to ±2.75V ±20 ±100 µV/V
Reference Divider Accuracy(2) ±0.002 ±0.024 %
over Temperature ±0.002 %
INPUT IMPEDANCE(3)
Differential 240 kΩ
Common-Mode 60 kΩ
INPUT VOLTAGE RANGE RTI
Common-Mode Voltage
Range VCM
Positive 17.5 V
Negative −12.5 V
Common-Mode Rejection
Ratio CMRR VCM = −10V to +10V, RS = 0Ω80 96 dB
over Temperature 94 dB
OUTPUT VOLTAGE NOISE(4) RTO
f = 0.1Hz to 10Hz 10 µVPP
f = 10kHz 30 nV/√Hz
GAIN VREF2 = 4.096V, RL Connected to GND,
(VIN+) − (VIN−) = −10V to +10V, VCM = 0V
Initial G 0.2 V/V
Error ±0.005 ±0.024 %
vs Temperature ±1 ppm/°C
Nonlinearity ±0.0002 % of FS
OUTPUT
Voltage, Positive VREF2 = 4.096V, RL Connected to GND (V+) − 0.1 (V+) − 0.02 V
Voltage, Negative VREF2 = 4.096V, RL Connected to GND (V−) + 0.048 (V−) + 0.01 V
Current Limit, Continuous to Common ±60 mA
Capacitive Load See Typical Characteristic pF
Open-Loop Output Impedance ROf = 1MHz, IO = 0 110 Ω
FREQUENCY RESPONSE
Small-Signal Bandwidth −3dB 1.5 MHz
Slew Rate SR 15 V/µs
Settling Time, 0.01% tS4V Output Step, CL = 100pF 1µs
Overload Recovery Time 50% Overdrive 250 ns
POWER SUPPLY
Specified Voltage Range VS+5 V
Operating Voltage Range +1.8 +5.5 V
Quiescent Current IQ
IO = 0mA, VS = ±2.5V,
Reference and Input Pins Grounded 1.1 1.5 mA
TEMPERATURE RANGE
Specified Range −40 +125 °C
Operating Range −40 +150 °C
Storage Range −65 +150 °C
Thermal Resistance qJA
MSOP-8 Surface-Mount 150 °C/W
(1) Includes effects of amplifier input bias and offset currents.
(2) Reference divider accuracy specifies the match between the reference divider resistors using the configuration in Figure 2.
(3) Internal resistors are ratio matched but have ±20% absolute value.
(4) Includes effects of amplifier input current noise and thermal noise contribution of resistor network.
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
4
20kΩ
40kΩ
100kΩ
2
3
7
5
OUT
1
8
6
V+
4
V−
+5V
100kΩ
40kΩ
INA159
The test is performed by
measuring the output
with the reference
appliedtoalternate
reference resistors, and
calculating a result such
that the amplifier offset is
cancelled in the final
measurement.
Figure 2. Test Circuit for Reference Divider Accuracy
TYPICAL CHARACTERISTICS
At TA = +25°C, RL = 10kΩ connected to VS/2, REF pin 1 connected to ground, and REF pin 2 connected to VREF = 5V, unless otherwise noted.
OFFSET VOLTAGE PRODUCTION DISTRIBUTION
Offset Voltage (µV)
Population
−500
−450
−400
−350
−300
−250
−200
−150
−100
−50
0
50
100
150
200
250
300
350
400
450
500
OFFSET VOLTAGE DRIFT PRODUCTION DISTRIBUTION
Offset Voltage Drift (µV/_C)
Population
−10
−9
−8
−7
−6
−5
−4
−3
−2
−1
0
1
2
3
4
5
6
7
8
9
10
GAIN vs FREQUENCY
Frequency (Hz)
Gain (dB)
0
−10
−20
−30
−40
−50
100 1k 10k 100k 1M 10M
10
POWER−SUPPLY REJECTION RATIO vs FREQUENCY
Frequency (Hz)
PSRR (dB)
130
120
110
100
90
80
70
60
50
40
30
20
10
0
−10
100 1k 10k 100k 1M 10M10
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
5
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10kΩ connected to VS/2, REF pin 1 connected to ground, and REF pin 2 connected to VREF = 5V, unless otherwise noted.
COMMON−MODE REJECTION RATIO vs FREQUENCY
Frequency (Hz)
CMRR (dB)
120
110
100
90
80
70
60
50
40
30
20
100 1k 10k 100k 1M 10M10
QUIESCENT CURRENT vs TEMPERATURE
Temperature (_C)
IQ(mA)
1.20
1.15
1.10
1.05
1.00
0.95
0.90
0.85
0.80
−250 255075100125
−50
VS=5.5V
VS=1.8V
VS=5V
SHORT−CIRCUIT CURRENT vs TEMPERATURE
Temperature (_C)
ISC (mA)
120
100
80
60
40
20
0
−20
−40
−60
−80
−100
−25 0 25 50 75 100 125
−50
VS=±2.75V
VS=±2.75V
VS=±0.9V
VS=±2.5V
VS=±2.5V
OUTPUT VOLTAGE SWING vs OUTPUT CURRENT
Output Current (mA)
3.0
2.5
2.0
1.5
1.0
0.5
0
−0.5
−1.0
−1.5
−2.0
−2.5
−3.0
10 20 30 40 50 60 70 80 90
0
Output Swing (V)
VS=±0.9V
VS=±2.5V
TA=+25
_C
TA= +125_C
TA=
+125_C
TA=−40_C
TA=−40_C
TOTAL HARMONIC DISTORTION + NOISE
vs FREQUENCY
Frequency (Hz)
THD+Noise (%)
0.01
0.001
100 1k 10k 100k
10
0.25VPP
4VPP
2kΩ
600Ω
OUTPUT VOLTAGE NOISE SPECTRAL DENSITY
vs FREQUENCY
Frequency (Hz)
1000
100
10
10 100 1k 10k 100k
1
Output Voltage Noise (nV/√Hz)
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
6
TYPICAL CHARACTERISTICS (continued)
At TA = +25°C, RL = 10kΩ connected to VS/2, REF pin 1 connected to ground, and REF pin 2 connected to VREF = 5V, unless otherwise noted.
0.1Hz TO 10Hz NOISE
Time (1s/div)
5µV/div
SMALL−SIGNAL OVERSHOOT vs LOAD CAPACITANCE
Load Capacitance (pF)
60
50
40
30
20
10
0
1000 3000
100
Overshoot (%)
VS=5V
SMALL−SIGNAL STEP RESPONSE
Time (500ns/div)
200mV/div
LARGE−SIGNAL STEP RESPONSE
Time (500ns/div)
1V/div
SETTLING TIME
Time (250ns/div)
2mV/div
VOUT =4VStep
CL= 100pF
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
7
APPLICATION INFORMATION
The internal op amp of the INA159 has a rail-to-rail
common-mode voltage capability at its inputs. A rail-to-rail
op amp allows the use of ±10V inputs into a circuit biased
to 1/2 of a 5V reference (2.5V quiescent output). The inputs
to the op amp will swing from approximately 400mV to
3.75V in this application.
The unique input topology of the INA159 eliminates the
input offset transition region typical of most rail-to-rail
complementary stage operational amplifiers. This allows
the INA159 to provide superior glitch- and transition-free
performance over the entire common-mode range.
Good layout practice includes the use of a 0.1µF bypass
capacitor placed closely across the supply pins.
COMMON-MODE RANGE
The common-mode range of the INA159 is a function of
supply voltage and reference. Where both pins, REF1 and
REF2, are connected together:
VCM)+(V)))5[(V))*VREF]
VCM*+(V*)*5[VREF *(V*)]
Where one REF pin is connected to the reference, and the
other pin grounded (1/2 reference connection):
VCM)+(V)))5[(V))*(0.5VREF)]
VCM*+(V*)*5[(0.5VREF)*(V*)]
Some typical values are shown in Table 1.
Table 1. Common-Mode Range For Various
Supply and Reference Voltages
REF 1 and REF 2 Connected Together
V+ V−VREF VCM+ VCM−
5 0 3 15 −15
5 0 2.5 17.5 −12.5
5 0 1.25 23.75 −6.25
1/2 Reference Connection
V+ V−VREF VCM+ VCM−
5 0 5 17.5 −12.5
5 0 4.096 19.76 −10.24
5 0 2.5 23.75 −6.25
3.3 0 3.3 11.55 −8.25
3.3 0 2.5 13.55 −6.25
3.3 0 1.25 16.675 −3.125
(1)
(2)
(3)
(4)
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
8
Table 2. Input and Output Relationships for Various Reference and Connection Combinations
VREF
(V) REF CONNECTION
VOUT for VIN = 0
(V)
LINEAR VIN RANGE
(V)
USEFUL VOUT SWING
(V)
55V
V+
2.5
+10
0
−10
4.5
(±2V swing)
0.5
4.096
20kΩ100kΩSENSE
−IN
2.048
+10
0
−10
4.048
(±2V swing)
0.048
3.3
40kΩ
100kΩ
OUT
1.65
+10
0
−7.885
3.65
(−1.577V, +2V swing)
0.048
2.5
40kΩ
100kΩ
40kΩ
VREF
REF 2
REF 1
VIN
+IN
INA159
1.25
+10 (also +5)
0
−6 (also −5)
3.25
(−1.2V, +2V swing)
0.048
1.8
INA159
0.9
+10
0
−4.26
2.9
(−0.852V, +2V swing)
0.048
2.5
20kΩ
100kΩ
5V
V+
SENSE
−IN
2.5
+10
0
−10
4.5
(±2V swing)
0.5
1.8
40kΩ
100kΩ
OUT
VREF
REF 2
VIN
+IN
1.8
+10
0
−8.76
3.8
(−1.752V, +2V swing)
0.048
1.2
40kΩ
REF
REF 1
INA159
1.2
+10
0
−5.76
3.2
(−1.15V, +2V swing)
0.048
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
9
20kΩ
100kΩ
40kΩ
100kΩ
40kΩ
R1
100ΩADS8325
ADC
DOUT
DCLOCK
CS
REF
VREF5V
+IN
−IN
V+
V+
GND
C1
1000pF
SENSE
REF 2
REF 1
VIN
+IN
−IN
INA159
Figure 3. Typical Application Circuit Interfacing to Medium-Speed, Single-Supply ADCs
20kΩ
100kΩ
40kΩ
100kΩ
40kΩ
R1
100ΩADS8361 or
ADS7861
ADC
DOUT
DCLOCK
CS
REF
VREF5V
+IN
−IN
V+
V+
GND
C1
1000pF
SENSE
REF 2
REF 1
VIN
+IN
−IN
INA159
Figure 4. Typical Application Circuit Interfacing to Medium-Speed, Single-Supply ADCs with
Pseudo-Differential Inputs (such as the ADS7861 and ADS8361)
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
10
20kΩ
100kΩ
40kΩ
100kΩ
40kΩ
R1
100Ω
REF
VREF5V
+IN
−IN
V+
V+
GND
C1
1000pF
SENSE
REF 2
REF 1
VIN
+IN
−IN
INA159
a) Unipolar, Noninverting, G = 0.2
20kΩ
100kΩ
40kΩ
100kΩ
40kΩ
R1
100Ω
REF
VREF5V
+IN
−IN
V+
V+
GND
C1
1000pF
SENSE
REF 2
REF 1
VIN
+IN
−IN
INA159
b) Bipolar, Noninverting, G = 0.2
20kΩ
100kΩ
40kΩ
100kΩ
40kΩ
R1
100Ω
ADC
ADC
ADC
REF
VREF5V
+IN
−IN
V+
V+
GND
C1
1000pF
SENSE
REF 2
REF 1
+IN
−IN
INA159
c) Unipolar, Unity Gain
VIN
Figure 5. Basic INA159 Configurations
INA159
SBOS333B − JULY 2005 − REVISED OCTOBER 2005
www.ti.com
11
20kΩ
100kΩ
40kΩ
100kΩ
40kΩ
5V
V+
SENSE A
OUT A
REF 2A
REF 1A
VIN+
VIN−
+IN A
−IN A
INA159
20kΩ
100kΩ
40kΩ
100kΩ
40kΩ
5V
ADC
REF
VREF
+IN
−IN
V+
V+
GND
SENSE B
OUT B
REF 2B
REF 1B
+IN B
−IN B
INA159
100Ω
100Ω
1000pF
1000pF
Figure 6. Differential ADC Drive
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status (1) Package Type Package
Drawing Pins Package Qty Eco Plan (2) Lead/
Ball Finish MSL Peak Temp (3) Samples
(Requires Login)
INA159AIDGKR ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
INA159AIDGKRG4 ACTIVE VSSOP DGK 8 2500 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
INA159AIDGKT ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
INA159AIDGKTG4 ACTIVE VSSOP DGK 8 250 Green (RoHS
& no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF INA159 :
PACKAGE OPTION ADDENDUM
www.ti.com 16-Aug-2012
Addendum-Page 2
•Enhanced Product: INA159-EP
NOTE: Qualified Version Definitions:
•Enhanced Product - Supports Defense, Aerospace and Medical Applications
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
INA159AIDGKR VSSOP DGK 8 2500 330.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
INA159AIDGKT VSSOP DGK 8 250 180.0 12.4 5.3 3.4 1.4 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
INA159AIDGKR VSSOP DGK 8 2500 367.0 367.0 35.0
INA159AIDGKT VSSOP DGK 8 250 210.0 185.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 16-Aug-2012
Pack Materials-Page 2
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