International Rectifier IRF820S HEXFET Power MOSFET PD-9.10114 @ Surface Mount Available in Tape & Reel D _ Dynamic dv/dt Rating Voss = SO0V @ Repetitive Avalanche Rated * Fast Switching _ 6 Rpsvon) = 3.02 e Ease of Paralleling Simple Drive Requirements 5 Ib= 2 5A Description Third Generation HEXFETs from International Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SMD-220 is a surface mount power package capable of accommodating die sizes up to HEX-4. It provides the highest power capability and the lowest possible on-resistance in any existing surface mount package. The SMD-220 is suitable for high current applications because of its low internal connection resistance and can dissipate up to 2.0W in a typical surface mount application. SMD-220 Absolute Maximum Ratings Parameter Max. Units Ip @ To = 25C Continuous Drain Current, Ves @ 10 V 25 Ip @ Tc =100C | Continuous Drain Current, Ves @ 10 V 16 A lom Pulsed Drain Current 8.0 Pp @ Tc = 25C _| Power Dissipation 50 Ww Pp @ Ta=25C_ | Power Dissipation (PCB Mount)" 3.1 Linear Derating Factor 0.40 wre Linear Derating Factor (PCB Mount)** 0.025 Vas Gate-to-Source Voliage +20 Vv Eas Single Pulse Avalanche Energy 210 mJ lAR Avalanche Current 2.5 A Ear Repetitive Avalanche Energy 5.0 mJ dv/dt Peak Diode Recovery dv/dt_ 3.5 Vins Tu, Tste Junction and Storage Temperature Range -55 to +150 ' C Soldering Temperature, for 10 seconds 300 (1.6mm from case) Thermal Resistance Parameter Min. Typ. Max. Units Reuc Junction-to-Case _ - 25 Raia Junction-to-Ambient (PCB mount)** _ - 40 Ciw Roa Junction-to-Ambient _ _ 62 ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994.IRF820S Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Vieryoss Drain-to-Source Breakdown Voltage 500 _ _ V1 Vas=0V, Ip= 250A AVerjss/ATs| Breakdown Voltage Temp. Coefficient | 059 | | VC | Reference to 25C, Ip= 1mA Rosven) Static Drain-to-Source On-Resistance = = 3.0 Q | Ves=10V, Ip=1.5A Vesith) Gate Threshold Voltage 2.0 _ 4.0 V_ | Vos=Ves, Ip= 250A Os Forward Transconductance 1.5 _ _ S| Vps=50V, Ip=1.5A @ lpss Drain-to-Source Leakage Current = 25 HA Vos=500V, Ves=0V _ _ 250 Vps=400V, Vas=0V, Ty=125C lass Gate-to-Source Forward Leakage _ _ 100 nA Ves=20V Gate-to-Source Reverse Leakage = - | -100 Ves=-20V Qg Total Gate Charge = _ 24 lo=2.1A Qos Gate-to-Source Charge _ ~ 3.3 nC | Vps=400V Qoa Gate-to-Drain ("Miller") Charge _ =_ 13 Ves=10V See Fig. 6 and 13 ta(on) Turn-On Delay Time _ 8.0 _ Vpp=250V tr Rise Time = 8.6 = ns lp=2.1A ta(or) Turn-Off Delay Time _ 33 _ Re=18Q tt Fall Time _ 16 _ Rpo=100Q See Figure 10 Lp Internal Drain Inductance _ 4.5 ~~ ean 328 ) j nH | from package ii | Ls Internal Source Inductance | 75) and center of die contact s Ciss Input Capacitance _ 360 _ Vas=0V Coss Output Capacitance _ 92 _ PF | Vps= 25V Ciss Reverse Transfer Capacitance _ 37 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. | Units Test Conditions Is Continuous Source Current _ _ 25 MOSFET symbol . (Body Diode) A showing the Ism Pulsed Source Current _ _ 8.0 integral reverse @ (Body Diode) p-n junction diode. 8 Vsp Diode Forward Voltage _ _ 1.6 V__ | Tye25C, Is=2.5A, Ves=0V tr Reverse Recovery Time | 260 | 520 | ns_ | Ty=25C, Ir=2.1A On Reverse Recovery Charge | 0.70] 1.4 | nC | di/dt=100A/is ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp} h Notes: Repetitive rating; pulse width limited by max. junction temperature (See Figure 11) Vpp=50V, starting Ty=25C, L=60mH Re@=25Q, las=2.5A (See Figure 12) Isp<2.5A, di/dt<50A/us, Voo<ViBR)Dss, Tys150C Pulse width < 300 ys; duty cycle <2%.Ip, Drain Current (Amps) Ip, Drain Current (Amps) 10 4.5V 20us PULSE WIDTH Te = 25C 107 100 10! Vos, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Tc=25C Vpg = SOV 20us PULSE WIDTH 4 6 7 a g 10 Vas, Gate-to-Source Voltage (volts) Fig 3. Typical Transfer Characteristics Rpscon), Drain-to-Source On Resistance Ip, Drain Current (Amps) (Normalized) IRF820S 20us PULSE WIDTH Te = 150C 107! 100 10 Vps, Drain-to-Source Voltage (volts) Fig 2. Typical Output Characteristics, Tco=150C 3.0 nm un nm a ves = 10V 0.0 -60 -40 -20 0 20 40 60 '80 100 i20 140 160 Ty, Junction Temperature (C) Fig 4. Normalized On-Resistance Vs. TemperatureIRF820S Veg = OV, f = 1MHz Ciss = Cgs + Cgg Cos Coss Coq Capacitance (pF) Ves, Gate-to-Source Voltage (volts) SEE FIGURE 13 190 40! 9 4 8 42 16 20 24 Vps, Drain-to-Source Voltage (volts) Qg, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voitage 108 = 5 n Q ex = Q 10 3 5 = oO ce 2 = 31 o 5 5 Os 2 gs g 2 2 a oD = 0.4 cc 2 ; a Toresie 2 2 T =150C Veg = OV 5 5 SE 0.4 0.6 0.8 1.0 4.2 10 0.12 5 4 2 $ 10 2 5 1082 1 5 4032 5 404 Vgp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward VoltageIRF820S Rb Vos D.U.T. 2.5 A ="Vpp gq 20 If1ov = Pulse Width < tus < Duty Factor < 0.1% + ers op: Tn 2 Fig 10a. Switching Time Test Circuit a 3 c 1.0 Vv a DS a 90% A 0.5 0 10% 75 100 Vas Tc, Case Temperature (C) taon) tr tafon) tf Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature 10 Thermal Response (Zajc) Po 1 [eet tel NOTES: k 4. DUTY FACTOR, Dety/to 2, PEAK T. x +7, 1072 1075 1074 4073 10-2 0.4 4 10! ty, Rectangular Pulse Duration (seconds) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-CaseIRF820S Vary tp to obtain Vos > required las Ip TOP 4.48 1.68 BOTTOM 2.54 Eng, Single Pulse Energy (mJ) Dp = 50V Vps-___| / 25 50 75 100 125 150 Starting Ty, Junction Temperature(C) lag mL ~ Fig 12c. Maximum Avalanche Energy Fig 12b. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator ._______ Q tov SE [ [Ses yr Se Ve la *F Ip Current Sampling Resistors Charge > Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit Appendix B: Package Outline Mechanical Drawing Appendix C: Part Marking Information , International Appendix D: Tape & Reel Information Rectifier