2000 Infineon Technologies Corp. • Optoelectronics Division • San Jose, CA
www.infineon.com/opto • 1-888-Infineon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG • Regensburg, Germany
www.osram-os.com • +49-941-202-7178 1 March 28, 2000-10
STANDARD RED
SCE5740
YELLOW
SCE5741
HIGH EFFICIENCY RED
SCE5742
GREEN
SCE5743
HIGH EFFICIENCY GREEN
SCE5744
ORANGE
SCE5745
0.180" 4-Character 5 x 7 Dot Matrix
Serial Input Dot Addressable
Intelligent Display
®
Devices
ALSO AVAILABLE WITH OPTIONS
(see pages 14 and 15)
SCE574xP-SIP
SCE574xQ-SIP with right angle bends
FEATURES
Four 0.180" (4.57 mm) 5 x 7 Dot Matrix Characters
in Red, Yellow, High Efficiency Red, Green, High
Efficiency Green, Orange
Optimum Display Surface Efficiency
(display area to package ratio)
High Speed Data Input Rate: 5.0 MHz
ROMless Serial Input, Dot Addressable Display
Ideal for User Defined Characters
Built-in Decoders, Multiplexers and LED Drivers
Wide Viewing Angle, X Axis ±55
°
, Y Axis ±55
°
ATTRIBUTES
140 Bit RAM for User Defined Characters
Eight Dimming Levels plus eight fine dimming
levels.
Power Down Model (<250 mW)
Hardware/Software Clear Functions
External Clock-SCE574x only
DESCRIPTION
The SCE574x is a four digit, dot addressable 5 x 7 dot matrix, serial
input, alphanumeric Intelligent Display device. The four digits are
packaged in a rugged, high quality, optically transparent, plastic 14 pin
DIP with 0.1" pin spacing.
The SCE574xP is a SIP version of SCE574x. The SCE574xQ is also a
SIP version of the SCE574x but the leads are at right angles to the
package so that the part can be mounted vertically. The SIP version
parts have only 7 pins. The SIP parts do not have the option of using
an external clock. All the electrical descriptions for the SCE574x apply
to the SIP versions except the allusions to the external clock.
The on-Board CMOS has a 140 bit RAM, one bit associated with one
LED, each to generate User Defined Characters. In Power Down
Mode, quiescent current is <50
µ
A.
The SCE574x is designed for work with the serial port of most com-
mon microprocessors. Data is transferred into the display through the
Serial Data Input (DATA), clocked by the Serial Data Clock (SDCLK),
and enabled by the Load Input (LOAD).
The SCE574x Clock I/O (Clk I/O) and Clock Select (CLKSEL) pins offer
the user the capability to supply a high speed external multiplex clock.
This feature can minimize audio in-band interference for portable com-
munication equipment or eliminate the visual synchronization effects
found in high vibration environments such as avionic equipment.
(Description continued on next page)
0.400 ±.015
(10.16 ±.38)
0.180
(4.57)
0.784 (19.91)
Dimensions in Inches (mm)
2000 Inneon Technologies Corp. Optoelectronics Division San Jose, CA SCE5740/1/2/3/4/5
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DESCRIPTION
(continued)
A divide by 16 prescalar is built into the part and can be
accessed by software to reduce the multiplex frequency if a
high speed external clock is used.
Maximum Ratings
DC Supply Voltage............................................–0.5 to +7.0 Vdc
Input Voltage Levels Relative
to Ground............................................... –0.5 to
V
CC
+0.5 Vdc
Operating Temperature .....................................–40
°
C to +85
°
C
Storage Temperature.......................................–40
°
C to +100
°
C
Maximum Solder Temperature 0.063"
below Seating Plane, t<5.0 s........................................ 260
°
C
Relative Humidity at 85
°
C ...................................................85%
Maximum Number of LEDs at 100% Brightness................... 64
Maximum Power Dissipation ............................................0.6 W
ESD (100 pF, 1.5 kW)........................................................ 2.0 kV
Maximum Input Current .................................................130 mA
Electrical Characteristics
(over operating temperature)
Notes:
1)
Unused inputs must be tied high.
2)
External oscillator must be stopped.
3)
Peak current
5
/
3
x
I
CC.
Electrical Characteristics for SCE574x only
Parameter Min. Typ. Max. Units Conditions
V
CC
4.5 5.0 5.5 V
I
CC
(Power Down)
(1)(2)
——50
µ
A
V
CC
=5.0 V, all inputs=0 V or
V
CC
I
CC
4 digits 20 dots/character
(3)
90 115 130 mA
V
CC
=5.0 V, “#” displayed in all 4 digits
at 100% brightness at 25
°
C
I
IL
Input current –10
µ
A
V
CC
=5.0 V,
V
IN
=0 (all inputs)
I
IH
Input current
—10
µ
A
V
CC
=V
IN
=5.0 V (all inputs)
V
IH
3.5 V
V
CC
=4.5 V to 5.5 V
V
IL
1.5 V
V
CC
=4.5 V to 5.5 V
Row Multiplex Rate 375 768 1086 Hz
θ
JC-pin
——45
°
C/W
Parameter Min. Typ. Max. Units Conditions
I
OH
(CLK I/O) –28 mA
V
CC
=4.5 V,
V
OH
=2.4 V
I
OL
(CLK I/O) 23 mA
V
CC
=4.5 V,
V
OL
=0.4 V
F
ext
External Clock Input Frequency 120 3 MHz
V
CC
=5.0 V, CLKSEL=0
F
osc
Internal Clock Input Frequency 120 347 kHz
V
CC
=5.0 V, CLKSEL=1
Clock I/O Bus Loading 240 pF
Clock Out Rise Time 500 ns
V
CC
=4.5 V,
V
OH
=2.4 V
Clock Out Fall Time 500 ns
V
CC
=4.5 V,
V
OH
=0.4 V
2000 Inneon Technologies Corp. Optoelectronics Division San Jose, CA SCE5740/1/2/3/4/5
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OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
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Optical Characteristics at 25
°
C
(
V
CC
=5.0 V at 100% brightness level, viewing angle:
X axis ±55
°
, Y axis ±65
°
)
Red SCE5740
Yellow SCE5741
High Efficiency Red SCE5742
Green SCE5743
High Efficiency Green SCE5744
Orange SCE5745
Notes:
1. Dot to dot intensity matching at 100% brightness is 1.8:1.
2. Displays within a given intensity category have an intensity match-
ing of 1.5:1 (max.)
Description Sym. Min. Typ. Units
Luminous Intensity
I
V
30 60
µ
cd/dot
Peak Wavelength
λ
peak
655 nm
Dominant Wavelength
λ
dom
639 nm
Description Sym. Min. Typ. Units
Luminous Intensity
I
V
60 150
µ
cd/dot
Peak Wavelength
λ
peak
583 nm
Dominant Wavelength
λ
dom
585 nm
Description Sym. Min. Typ. Units
Luminous Intensity
I
V
60 150
µ
cd/dot
Peak Wavelength
λ
peak
630 nm
Dominant Wavelength
λ
dom
620 nm
Description Sym. Min. Typ. Units
Luminous Intensity
I
V
60 150
µ
cd/dot
Peak Wavelength
λ
peak
565 nm
Dominant Wavelength
λ
dom
573 nm
Description Sym. Min. Typ. Units
Luminous Intensity
I
V
80 180
µ
cd/dot
Peak Wavelength
λ
peak
568 nm
Dominant Wavelength
λ
dom
574 nm
Description Sym. Min. Typ. Units
Luminous Intensity
I
V
60 150
µ
cd/dot
Peak Wavelength
λ
peak
605 nm
Dominant Wavelength
λ
dom
610 nm
Switching Specifications
(over operating temperature range and
V
CC
=4.5 V to 5.5 V)
Note:
T
SDCW
is the minimum time the SDCLK may be low or high.
The SDCLK period must be a minimum of 200 ns.
Symbol Description Min. Units
T
RC
Reset Active Time 600 ns
T
LDS
Load Setup Time 50 ns
T
DS
Data Setup Time 50 ns
T
SDCLK
Clock Period 200 ns
T
SDCW
Clock Width 70 ns
T
LDH
Load Hold Time 0 ns
T
DH
Data Hold Time 25 ns
T
WR
Total Write Time 2.2
µ
s
T
BL
Time Between Loads 600 ns
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Figure 1. Timing Diagram—Data Write Cycle
Figure 2. Timing Diagram—Instruction Cycle
SDCLK
SDCLK
T
SDCW
T
DATA
LOAD
D0
DS
T
LDS
T
TDH
D7
LDH
T
LOAD
LOAD
DATA
DATA
SDCLK
SDCLK
D0 D1 D2 D3 D4 D5 D6 D7
D0 D1 D2 D3 D4 D5 D6 D7
D0
D0
BL
T
WR
T
OR
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Display Column and Row Format
Column Data Ranges
Input/Output Circuits
Figures 3 and 4 show the input and output resistor/diode
networks used for ESD protection and to eliminate substrate
latch-up caused by input voltage over/under shoot.
Figure 3. Inputs
Figure 4. Clock I/O (SCE574x only).
Figure 5. Top View
C0 C1 C2 C3 C4
Row 0 11111
Row 1 00100
Row 2 00100
Row 3 00100
Row 4 00100
Row 5 00100
Row 6 00100
Row 0
00H to 1FH
Row 4
00H to LFH
Row 1
00H to LFH
Row 5
00H to LFH
Row 2
00H to LFH
Row 6
00H to LFH
Row 3
00H to LFH
VCC
1 k
GND
input
VCC
1 k
GND
input/output
Digit 0 Digit1 Digit 2 Digit 3
Pins 8
14
Pins 7
1
Pin Assignment
Figure 6. Dot Matrix Format
Pin Definitions
Pin Function Pin Function
1VCC 6RESET
2 Load 7 GROUND
3 Data 8 CLK I/O
4 no connection 9 13 No Pins
5 SDCLK 14 CLK SELECT
Pin Function Definitions
1VCC Power supply
2 LOAD Low input enables data clocking
into 8-bit serial shift register.
When load goes high, the con-
tents of 8-bit serial shift register
will be decoded.
3 DATA Serial input data
4 N/C
5 SDCLK For loading data into the 8-bit
serial data register
6 RST Asynchronous input, when low
clears the multiplex counter,
address register, control word reg-
ister, user RAM and data register.
Control word register is set to
100% brightness. The display will
be blank.
7 GND Supply ground
8 CLK I/O Outputs Master Clock or inputs
External Clock
913 No Pins
14 CLKSEL High=Internal Clock (Master)
Low=External Clock (Slave)
0.175
(4.45)
0.043
(1.09)
typ.
0.009
(0.23)
typ. 0.045
(1.14) typ.
0.270
(6.86)
R1
C1 C2 C3 C4 C5R0
R2
R3
R4
R5
R6
Dimensions in inches (mm)
Tolerance:.XXX ±.010 (.25)
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Figure 7. Block Diagram
Operation of the SCE574x
The SCE574x display consists of a CMOS IC containing control
logic and drivers for four 5 x 7 characters. These components
are assembled in a compact plastic package.
Individual LED dot addressability allows the user great freedom
in creating special characters or mini-icons.
The serial data interface provides a highly efcient interconnec-
tion between the display and the mother board. The SCE574x
requires only three lines as compared to 14 lines for an equiva-
lent four character parallel input part.
The on-board CMOS IC is the electronic heart of the display.
The IC accepts decoded serial data, which is stored in the inter-
nal RAM. Asynchronously the RAM is read by the character
multiplexer at a strobe rate that results in a icker free display.
Figure 7 shows the three functional areas of the IC. These
include: the input serial data register and control logic, a 140
bits two port RAM, and an internal multiplexer/display driver.
Y Address Decode
RST
CLKSEL
CLK I/O
Data
SDCLK
Load
Columns
0 to 20
User RAM
Memory
7x20 Bits
X Address Decode
3 Bit Address Register
6 Bit Control
Word Register
Control Word Logic
8 Bit Serial Register
Column
Drivers
Digit
0 to 4
Display
OSC Counter
Row Control Logic
and Row Drivers
Rows
0 to 6
0 1 2 3
Counter Mux
Rate
7
64
The following explains how to format the serial data to be
loaded into the display. The user supplies a string of bit mapped
decoded characters. The contents of this string is shown in Fig-
ure 8a. Figure 8b shows that each character consist of eight 8
bit words. The rst word encodes the display character location
and the succeeding seven bytes are row data. The row data
represents the status (On, Off) of individual column LEDs. Fig-
ure 8c shows that each 8 bit word is formatted to represent
Character Address, or Column Data.
Figure 8d shows the sequence for loading the bytes of data.
Bringing the LOAD line low enables the serial register to accept
data. The shift action occurs on the low to high transition of the
serial data clock (SDCLK). The least signicant bit (D0) is loaded
rst. After eight clock pulses the LOAD line is brought high.
With this transition the OPCODE is decoded. The decoded
OPCODE directs D4D0 to be latched in the Character Address
register, stored in the RAM as Column data, or latched in the
Control Word register. The control IC requires a minimum 600
ns delay between successive byte loads.
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Figure 8. Loading Serial Character Data
Table 1 shows the Row Address for the example character
D. Column data is written and read asynchronously from the
140 bit RAM. Once loaded the internal oscillator and character
multiplexer reads the data from the RAM. These characters are
row strobed with column data as shown in Figures 9 and 10.
The character strobe rate is determined by the internal or user
supplied external MUX Clock, the ICs counter and the pres-
caler.
Table 1. Character “D”
Op code
D 7 D 6 D 5
Column Data
D4 D3 D2 D1 D0
C0 C1 C2 C3 C4
Hex
Row 0 0 0 0 1 1 1 1 0 1E
Row 1 0 0 0 1 0 0 0 1 11
Row 2 0 0 0 1 0 0 0 1 11
Row 3 0 0 0 1 0 0 0 1 11
Row 4 0 0 0 1 0 0 0 1 11
Row 5 0 0 0 1 0 0 0 1 11
Row 6 0 0 0 1 1 1 1 0 1E
Character 0 Character 1 Character 2 Character 3
352 Clock Cycles, 70.4 µs
Example: Serial Clock=5.0 MHz, Clock Period=200 ns
Time between Loads
LOAD
Serial
Clock
DATA
Clock
Period
t0
D0 D1 D2 D3 D4 D5 D6 D7
11 Clock Cycles, 2.2 µs
Time
Between
Loads
600ns(min)
OPCODE
Character Address OPCODE
Column Data
D0
D D1
D D2
D D3
D D4
D
11 Clock Cycles, 2.2 µs
Character 0
Address
Row 0
Column Data Row 1
Column Data Row 2
Column Data Row 3
Column Data Row 4
Column Data Row 5
Column Data Row 6
Column Data
88 Clock Cycles, 17.6 µs
D0
0 D1
0 D2
0 D3
0 D4
0 D5
1 D6
0 D7
1
a.
b.
c.
d.
D5
0 D6
0 D7
0
Time
Between
Loads
600ns(min)
Figure 9. Row and Column Locations for a Character “D”
off LED
on LED
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
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Figure 10. Row Strobing
Multiplexer and Display Driver
The four characters are row multiplexed with RAM resident col-
umn data. The strobe rate is established by the internal or
external MUX Clock rate. The MUX Clock frequency is divided
by a 448 counter chain. This results in a typical strobe rate of
768 Hz. By pulling the Clock SEL line low, the display can be
operated from an external MUX Clock. The external clock is
attached to the CLK I/O connection (pin 8). The maximum
external MUX Clock frequency should be limited to 3 MHz.
When a high speed external clock is used the frequency can be
further divided down by 16 by using the built in prescaler. In the
control word format data bit D4 is set high (D4=1). It is not rec-
ommended to use the prescaler with the internal clock.
An asynchronous hardware Reset (pin 6) is also provided.
Bringing this pin low will clear the Character Address Register,
Control Word Register, RAM, and blanks the display. This
action leaves the display set at Character Address 0, and the
Brightness Level set at 100%.
The user can activate four Control functions. These include: LED
Brightness Level, IC Power Down, Prescaler, or Display Clear.
OPCODEs and six bit words are used to initiate these functions.
The OPCODEs and Control Words for the Character Address
and Loading Column Data are shown in Tables 2 and 3.
Basic Instruction Set
Instruction Opcode Address/Data Comments
LCD 000 D4 D3 D2 D1 D0 Load Column Data
LDA 101 X X A2 A1 A0 Load Digit Address
SCL 110 PS B3 B2 B1 B0 Software Clear
LCWD 111 PS B3 B2 B1 B0 Load Control Word Data
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
ROW LOAD LOAD ROW 0 LOAD ROW 1 LOAD ROW 2 LOAD ROW 3 LOAD ROW 4 LOAD ROW 5 LOAD ROW 6
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
Row 0
Row 1
Row 2
Row 3
Row 4
Row 5
Row 6
0 1 2 3 4
Columns
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Control Word Register:
The Control Word is a 5 bit write only register which controls
the display attributes. Below are the truth tables which denes
each bit in the Control Word Register and a description of their
functions.
Control Word Format
Table 2. Load Character Address
Table 3. Load Column Data
D7 D6 D5 D4 D3 D2 D1 D0
1 1 1 PS B3 B2 B1 B0
Pre-Scalar
B2 B1 B0 Brightness
PS=1 MUX Clock/16 0 0 0 100%
0 0 1 53%
=0 No divide
by 16
0 1 0 40%
0 1 1 27%
1 0 0 20%
1 0 1 13%
1 1 0 6.6%
1 1 1 Blank Display &
Power Down
0 Full Peak Current
1 Reduce Peak Current to 12.5%
Op code
D 7 D 6 D 5
Character Address
D4 D3 D2 D1 D0
Hex Operation
Load
1 0 1 0 0 0 0 0 A0 Character 0
1 0 1 0 0 0 0 1 A1 Character 1
1 0 1 0 0 0 1 0 A2 Character 2
1 0 1 0 0 0 1 1 A3 Character 3
Op code
D 7 D 6 D 5
Column Data
D4 D3 D2 D1 D0
Operation Load
0 0 0 C0 C1 C2 C3 C4 Row 0
0 0 0 C0 C1 C2 C3 C4 Row 1
0 0 0 C0 C1 C2 C3 C4 Row 2
0 0 0 C0 C1 C2 C3 C4 Row 3
0 0 0 C0 C1 C2 C3 C4 Row 4
0 0 0 C0 C1 C2 C3 C4 Row 5
0 0 0 C0 C1 C2 C3 C4 Row 6
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The user can select eight specic LED brightness levels (Table
4) by changing the peak current driving the LEDs. The peak cur-
rent is varied by varying the ON time of the row drivers. Note
that data line 3 is low (logic 0).
If dimming is required with ner control between 12.5% bright-
ness and 0.0% brightness, data line 3 can be set high (logic 1).
The 12.5% peak current is now the brightness reference
(100%-E8) for further dimming and as shown in Table 5 eight
levels of dimming are provided. For example the hex code EC
in Table 5 will provide a brightness level 29% lower than the
12.5% brightness level.
Table 4. Display Brightness
Table 5. Display Brightness
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1 D0
Hex Brightness
Level
1 1 1 0 0 0 0 0 E0 100%
111 00001 E1 53%
111 00010 E2 40%
111 00011 E3 27%
111 00100 E4 20%
111 00101 E5 13%
1 1 1 0 0 1 1 0 E6 6.6%
1 1 1 0 0 1 1 1 E7 0.0%
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1 D0
Hex Brightness
Level
1 1 1 0 1 0 0 0 E8 100%
111 01001 E9 53%
111 01010 EA 40%
111 01011 EB 27%
111 01100 EC 20%
111 01101 ED 13%
1 1 1 0 1 1 1 0 EE 6.6%
1 1 1 0 1 1 1 1 EF 0.0%
The SCE574x offers a unique Display Power Down feature which
reduces ICC to less than 50 µA. When EFHEX is loaded (Table 6) the
display is set to 0% brightness. When in the Power Down mode
data may still be written into the RAM. The display is reactivated by
loading a new brightness Level Control Word into the display.
Table 6. Power Down
The Software Clear (C0HEX), given in Table 7, clears the
Address Register and the RAM. The display is blanked and the
Character Address Register will be set to Character 0. The
internal counter and the Control Word Register are unaffected.
The Software Clear will remain active until the next data input
cycle is initiated.
Table 7. Software Clear
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1 D0
Hex Operation
Level
111 01111 EF 0%
brightness
Op code
D7 D6 D5
Control Word
D4 D3 D2 D1 D0
Hex Operation
1 1 0 0 0 0 0 0 C0 CLEAR
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Electrical and Mechanical Considerations
Thermal Considerations
Optimum product performance can be had when the following
electrical and mechanical recommendations are adopted. The
IC is constructed in a high speed CMOS process, consequently
noise on the SERIAL DATA, SERIAL DATA CLOCK, LOAD and
RESET lines may cause incorrect data to be written into the
serial shift register. Adhere to transmission line termination
procedures when using fast line drivers and long cables
(>10 cm).
Good ground and power supply decoupling will insure that ICC
(<400 mA peak) switching currents do not generate localized
ground bounce. Therefore it is recommended that each display
package use a 0.1 µF and 0 µF capacitor between VCC and
ground.
When the internal MUX Clock is being used connect the
CLKSEL pin to VCC. In those applications where RESET will not
be connected to the systems reset control, it is recommended
that this pin be connected to the center node of a series 0.1, µF
and 100 k RC network. Thus upon initial power up the RESET
will be held low for 10 ms allowing adequate time for the sys-
tem power supply to stabilize.
ESD Protection
The input protection structure of the SCE574x provides signi-
cant protection against ESD damage. It is capable of withstand-
ing discharges greater than 2.0 kV. Take all the standard
precautions, normal for CMOS components. These include
properly grounding personnel, tools, tables, and transport carri-
ers that come in contact with unshielded parts. If these condi-
tions are not, or cannot be met, keep the leads of the device
shorted together or the parts in anti-static packaging.
Soldering Considerations
The SCE574x can be hand soldered with SN63 solder using a
grounded iron set to 260°C.
Wave soldering is also possible following these conditions: Pre-
heat that does not exceed 93°C on the solder side of the PC
board or a package surface temperature of 85°C. Water soluble
organic acid ux (except carboxylic acid) or rosin-based RMA
ux without alcohol can be used.
Wave temperature of 245°C ±5°C with a dwell between 1.5 sec.
to 3.0 sec. Exposure to the wave should not exceed tempera-
tures above 260°C for ve seconds at 0.063" below the seating
plane. The packages should not be immersed in the wave.
Post Solder Cleaning Procedures
The least offensive cleaning solution is hot D.I. water (60°C) for
less than 15 minutes. Addition of mild saponiers is accept-
able. Do not use commercial dishwasher detergents.
For faster cleaning, solvents may be used. Exercise care in
choosing solvents as some may chemically attack the nylon
package. For further information refer to Appnotes 18 and 19.
An alternative to soldering and cleaning the display modules is
to use sockets. Naturally, 14 pin DIP sockets .300 wide with
.100" centers work well for single displays. Multiple display
assemblies are best handled by longer SIP sockets or DIP sock-
ets when available for uniform package alignment.
Optical Considerations
The 0.180" high character of the SCE574x gives readability up
to ve feet. Proper lter selection enhances readability over
this distance.
Using lters emphasizes the contrast ratio between a lit LED
and the character background. This will increase the discrimina-
tion of different characters. The only limitation is cost. Take into
consideration the ambient lighting environment for the best
cost/benet ratio for lters.
Incandescent (with almost no green) or uorescent (with
almost no red) lights do not have the at spectral response of
sunlight. Plastic band-pass lters are an inexpensive and effec-
tive way to strengthen contrast ratios. The SCE5740 is a red
display and should be used with long wavelength pass lter
having a sharp cut-off in the 600 nm to 620 nm range. The
SCE5742 is a high efciency red display and should be used
with long wavelength pass lter having a sharp cut-off in the
570 nm to 600 nm range. The SCE5744 is a high efciency
green display and should be used with long wavelength pass
lter that peaks at 565 nm.
Additional contrast enhancement is gained by shading the
displays. Plastic band-pass lters with built-in louvers offer the
next step up in contrast improvement. Plastic lters can be
improved further with anti-reective coatings to reduce glare.
Optimal lter enhancements are gained by using circular polar-
ized, anti-reective, band-pass lters. The circular polarizing fur-
ther enhances contrast by reducing the light that travels
through the lter and reects back off the display to less
than 1%.
Several lter manufacturers supply quality lter materials.
Some of them are: Panelgraphic Corporation, W. Caldwell, NJ;
SGL Homalite, Wilmington, DE; 3M Company, Visual Products
Division, St. Paul, MN; Polaroid Corporation, Polarizer Division,
Cambridge, MA; Marks Polarized Corporation, Deer Park, NY,
Hoya Optics, Inc., Fremont, CA.One last note on mounting l-
ters: recessing displays and bezel assemblies is an inexpensive
way to provide a shading effect in overhead lighting situations.
Several Bezel manufacturers are: R.M.F. Products, Batavia, IL;
Nobex Components, Grifth Plastic Corp., Burlingame, CA;
Photo Chemical Products of California, Santa Monica, CA;
I.E.E.-Atlas, Van Nuys, CA. The trade-off is fuzzy characters.
Mounting the lters close to the display reduces this effect.
Take care not to overheat the plastic lter by allowing for
proper air ow.
Microprocessor Interface
The microprocessor interface is through the serial port, SPI
port or one out of eight data bits on the eight bit parallel port
and also control lines SDCLK and LOAD.
Power Up Sequence
Upon power up display will come on at random. Thus the dis-
play should be reset at power-up. The reset will set the
Address Register to Digit 0, User RAM is set to 0 (display
blank) the Control Word is set to 0 (100% brightness) and the
internal counters are reset.
2000 Inneon Technologies Corp. Optoelectronics Division San Jose, CA SCE5740/1/2/3/4/5
www.inneon.com/opto 1-888-Inneon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178 12 March 28, 2000-10
Figure 11. Display Interface to Siemens/Intel 8031
Microprocessor (using serial port in mode 0)
Figure 12. Display Interface to Siemens/Intel 8031
Microprocessor (using one bit of parallel port as serial port)
Figure 13. Display Interface with Motorola 68HC05C4
Microprocessor (using SPI port)
U1
8031
9RST
18
19
XTAL2
XTAL1
40 RxD
TxD
10
11
1
14
22 µf
TAN
.01 µf
P3.7 17
P3.3 13
P3.4 14
DATA
VCC
VCC
VCC
VCC
CLKSEL
CLK I/O
SDCLK
LD
RST
GND
ID +
5
2
6
7
3
8
V
CC
V
CC
U1
8031
1
9
20
RST
P1.0
18
19
XTAL2
XTAL1
40 P3.0
P3.1
P3.6
P0.0
10
11
16
39
V
CC
1
14
8
22 µF
TAN
.01 µF
DATA
V
CC
CLKSEL
CLK I/O
SDCLK
LD
RST
GND
ID
+
5
2
6
7
3
VCC
VCC U1
68HC05C4
1
9
20
RST
PA2
38
39
OSC1
OSC2
40 PA0
PA1
SCLK
MOSI
11
10
33
32
VCC
1
14
8
22 µF
TAN
.01 µF
DATA
VCC
CS
CLK I/O
SDCLK
LD
RST
GND
ID +
5
2
6
7
3
2000 Inneon Technologies Corp. Optoelectronics Division San Jose, CA SCE5740/1/2/3/4/5
www.inneon.com/opto 1-888-Inneon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178 13 March 28, 2000-10
Figure 14. Cascading Multiple Displays using only the SCE574x.
Multiple displays can be cascaded using the CLK SEL and CLK I/O pins (Figure 14). The display designated as the MasterClock
source should have its CLK SEL pin tied high and the slaves should have their CLK SEL pins tied low. All CLK I/O pins should be
tied together. One display CLK I/O can drive 15 slave CLK I/Os. Use RST to synchronize all display counters.
RST CLK I/O CLK SEL
DATA SDCLK LOAD
14 more displays
in between
RST CLK I/O CLK SEL
DATA SDCLK LOAD
Chip
Address
Decoder
0
15
Address Decode 114
VCC
RST
DATA
SDCLK
A0
A1
A2
A3
LD
Intelligent Display Intelligent Display
CE
Loading Data into the Display
Use following procedure to load data into the display:
1. Power up the display.
2. Bring RST low (600 ns duration minimum) to clear the Multi-
plex Counter, Address Register, Control Word
Register, User Ram and Data Register. The display will be
blank. Display brightness is set to 100%.
3. If a different brightness is desired, load the proper bright-
ness opcode into the Control Word Register.
4. Load the Digit Address into the display.
5. Load display row and column data for the selected digit.
6. Repeat steps 4 and 5 for all digits.
Data Contents for the Word “ABCD”
Step D7 D6 D5 D4 D3 D2 D1 D0 Function
A
B (optional) 1 1 0
1 1 1 00 0 0 0
00 0 0 0 CLEAR
100% BRIGHTNESS
1
2
3
4
5
6
7
8
10 1
00 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
00 0 0 0
00100
01 0 1 0
10 0 0 1
11 1 1 1
10001
10001
10 0 0 1
DIGIT D0 SELECT
ROW 0 (A)
ROW 1 (A)
ROW 2 (A)
ROW 3 (A)
ROW 4 (A)
ROW 5 (A)
ROW 6 (A)
9
10
11
12
13
14
15
16
1 0 1
00 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
00001
11111
10001
10 0 0 1
1 1 1 1 0
10 0 0 1
10 0 0 1
11 1 1 1
DIGIT D1 SELECT
ROW 0 (B)
ROW 1 (B)
ROW 2 (B)
ROW 3 (B)
ROW 4 (B)
ROW 5 (B)
ROW 6 (B)
17
18
19
20
21
22
23
24
1 0 1
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
00 0 1 0
00111
01000
10 0 0 0
10 0 0 0
10000
01 0 0 0
00 1 1 1
DIGIT D2 SELECT
ROW 0 (C)
ROW 1 (C)
ROW 2 (C)
ROW 3 (C)
ROW 4 (C)
ROW 5 (C)
ROW 6 (C)
25
26
27
28
29
30
31
32
1 0 1
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
0 0 0
00011
11 1 1 0
10 0 0 1
10001
10 0 0 1
10 0 0 1
10001
11110
DIGIT D3 SELECT
ROW 0 (D)
ROW 1 (D)
ROW 2 (D)
ROW 3 (D)
ROW 4 (D)
ROW 5 (D)
ROW 6 (D)
2000 Inneon Technologies Corp. Optoelectronics Division San Jose, CA SCE5740/1/2/3/4/5
www.inneon.com/opto 1-888-Inneon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178 14 March 28, 2000-10
Figure 15. Detail Drawing of SCE574x
Table 8. Pin Functions for SCE574x
Pin # Function Pin # Function Top View Typical Character
1V
CC 6 RESET
2 Load 7 GROUND
3 Data 8 CLK I/O
4 No Pin 913 No Pins
5 SDCLK 14 CLK SELECT
0.100
(2.54)
0.197 ( 3 pl.)
(5.00)
0.400 ±.015
(10.16 ±.38)
0.018 (.46)
0.180
(4.57)
0.784 (19.91)
EIA Date Code
Luminous
Intensity
Code
Pin 1
Indicator
.100 (2.54)
Non-cumulative (12 pl.)
0.200
(5.08)
Part Number
XXYY
SCE574x
SIEMENS Z
0.150
(3.81)
0.012 (.3)
±.002 (.05)
0.300 ±0.020
(7.62 ±0.51)
0.160 ±.020
(4.06 ±.51)
Dimensions in Inches (mm)
Pin 8
Pin 7
Pin 1
Pin 14 0.028
(0.71)
0.022
(0.56)
2000 Inneon Technologies Corp. Optoelectronics Division San Jose, CA SCE5740/1/2/3/4/5
www.inneon.com/opto 1-888-Inneon (1-888-463-4636)
OSRAM Opto Semiconductors GmbH & Co. OHG Regensburg, Germany
www.osram-os.com +49-941-202-7178 15 March 28, 2000-10
Figure 16. Detail Drawing of SCE574xP (SIP configuration)
Figure 17. Detail Drawing of SCE574xQ (SIP configuration with right angle bend)
Table 9. Pin Functions for SCE574xP and SCE574xQ
Pin # Function Top View Typical Character
1VCC
2 Load
3 Data
4 No Pin
5 SDCLK
6 RESET
7 GND
Dimensions in Inches (mm) 0.784 (19.91)
0.197 (5.00)
(3 plcs)
0.048
(1.22)
0.180
(4.57) 0.400
(10.16)
0.100 (2.54)
(4 plcs)
0.200
(5.08)
0.012
(0.30)
(6 plcs)
0.150
(3.81)
Part Number EIA Date Code
Luminous
Intensity Code
0.160±0.020
(4.06±0.51)
0.018 (0.46) (8 plcs)
0.200 (5.08)
0.100 (2.54)
(Tol. Non Accum.)
(4 plcs)
Pin 1
Indicator
SCE574XP
SIEMENS XXYY Z
Note: Unless otherwise specified, tolerance on dimensions is ±.010 in. (0.25 mm)
0.784 (19.91)
0.197 (5.00)
(3 plcs)
0.048
(1.22)
0.180
(4.57) 0.400
(10.16)
0.100 (2.54)
(4 plcs)
0.200
(5.08)
0.150
(3.81)
Part Number EIA Date Code
Luminous
Intensity Code
0.050±0.020
(1.26±0.51)
0.018 (0.46) (6 plcs)
0.200 (5.08)
0.100 (2.54)
(Tol. Non Accum.)
(4 plcs)
Pin 1
Indicator
SCE574XQ
SIEMENS XXYY Z
0.160±0.020
(4.06±0.51)
Note: Unless otherwise specified, tolerance on dimensions is ±.010 in. (0.25 mm)
Dimensions in Inches (mm)
Pin 1 Pin 7
0.028
(0.71)
0.022
(0.56)